From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29454 invoked by alias); 8 Aug 2012 22:02:30 -0000 Received: (qmail 29444 invoked by uid 22791); 8 Aug 2012 22:02:29 -0000 X-SWARE-Spam-Status: No, hits=-5.1 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,KHOP_RCVD_TRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE X-Spam-Check-By: sourceware.org Received: from mail-gg0-f169.google.com (HELO mail-gg0-f169.google.com) (209.85.161.169) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 08 Aug 2012 22:02:15 +0000 Received: by ggnf4 with SMTP id f4so1502029ggn.0 for ; Wed, 08 Aug 2012 15:02:15 -0700 (PDT) Received: by 10.50.85.196 with SMTP id j4mr376633igz.30.1344463335098; Wed, 08 Aug 2012 15:02:15 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id iw1sm3573328igc.13.2012.08.08.15.02.14 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 08 Aug 2012 15:02:14 -0700 (PDT) Message-ID: <5022E1E4.7040801@twiddle.net> Date: Wed, 08 Aug 2012 22:02:00 -0000 From: Richard Henderson User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:14.0) Gecko/20120717 Thunderbird/14.0 MIME-Version: 1.0 To: Roland McGrath CC: libc-ports@sourceware.org Subject: Re: [PATCH roland/arm-atomic-warn] Fiddle ARM atomic.h to avoid -Wvolatile-register-var warnings. References: <20120808204442.9B9F82C085@topped-with-meat.com> In-Reply-To: <20120808204442.9B9F82C085@topped-with-meat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact libc-ports-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: libc-ports-owner@sourceware.org X-SW-Source: 2012-08/txt/msg00065.txt.bz2 On 08/08/2012 01:44 PM, Roland McGrath wrote: > + We use the union trick rather than simply using __typeof (...) in the > + declarations of A_OLDVAL et al because when NEWVAL or OLDVAL is of the > + form *PTR and PTR has a 'volatile ... *' type, then __typeof (*PTR) has > + a 'volatile ...' type and this triggers -Wvolatile-register-var to > + complain about 'register volatile ... asm ("reg")'. */ > #elif defined __thumb2__ > /* Thumb-2 has ldrex/strex. However it does not have barrier instructions, > so we still need to use the kernel helper. */ > #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ > - ({ register __typeof (oldval) a_oldval asm ("r0"); \ > - register __typeof (oldval) a_newval asm ("r1") = (newval); \ > + ({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\ > + union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\ > + register uint32_t a_oldval asm ("r0"); \ > + register uint32_t a_newval asm ("r1") = newval_arg.v; \ > register __typeof (mem) a_ptr asm ("r2") = (mem); \ > - register __typeof (oldval) a_tmp asm ("r3"); \ > - register __typeof (oldval) a_oldval2 asm ("r4") = (oldval); \ > + register uint32_t a_tmp asm ("r3"); \ > + register uint32_t a_oldval2 asm ("r4") = oldval_arg.v; \ > __asm__ __volatile__ \ > ("0:\tldr\t%[tmp],[%[ptr]]\n\t" \ Is it really worth working so hard to avoid the gcc builtins? Yes, gcc before 4.7 doesn't have __atomic to avoid the extra barriers, but at least 4.7 and later will. May I ask what gcc version you're targeting, anyway? r~