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From: Dinar Temirbulatov <dtemirbulatov@gmail.com>
To: "Joseph S. Myers" <joseph@codesourcery.com>
Cc: libc-ports@sourceware.org, adeb@nvidia.com,
		Maxim Kuvyrkov <maxim@kugelworks.com>
Subject: Re: [Patch] ARM define atomic_exchange_acq/atomic_exchange_rel to __atomic_exchange_n
Date: Thu, 05 Sep 2013 12:56:00 -0000	[thread overview]
Message-ID: <CAMnfPmOyoRNNu62uAvTPDfa42XCwBdrW0n5jAW0Ab+nPS8u86Q@mail.gmail.com> (raw)
In-Reply-To: <Pine.LNX.4.64.1309021457010.17654@digraph.polyomino.org.uk>

[-- Attachment #1: Type: text/plain, Size: 2450 bytes --]

Hi,
Here is updated version of change. Ok to commit?
                thanks, Dinar.

On Mon, Sep 2, 2013 at 7:08 PM, Joseph S. Myers <joseph@codesourcery.com> wrote:
> On Mon, 2 Sep 2013, Dinar Temirbulatov wrote:
>
>> Hi,
>> Another version of change, I added
>> atomic_compare_and_exchange_val_acq/atomic_compare_and_exchange_val_rel
>> and atomic_compare_and_exchange_bool_acq/atomic_compare_and_exchange_boot_rel
>> defenitions and also for gcc-4.7 and higher in the case of unsupported
>> atomic compare and swap operation, it uses the kernel helper inlines.
>> Tested on arm a9 with no new regressions. Ok to commit?
>> Oh, sorry. I missed to attach the change. Here it is.
>
> For subsequent patch revisions, please note there should be an extra space
> after "#" for preprocessor directives inside #if conditionals, one per
> level of #if nesting (other than toplevel multiple-inclusion guards) -
> which means that if conditioning existing code, you need to adjust
> directives inside that code.
>
> This patch appears to have too much duplication.  For example, you
> duplicate the definition of __arm_assisted_compare_and_exchange_val_32_acq
> - but that should not need any extra conditionals at all (beyond the
> existing #ifndef __arm_assisted_compare_and_exchange_val_32_acq), there's
> no reason ever not to define it.  Similarly, you duplicate
> __arch_compare_and_exchange_val_64_acq, but with proper #if structure
> there should only need to be one copy of the version that uses
> __arm_link_error.
>
> What I think you should aim for is that each definition, or small group of
> definitions, uses conditionals in the form
>
> #if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
> /* Version using __atomic_*.  */
> #elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
> /* Version using __sync_*.  */
> #else
> /* Version using __arm_assisted_*.  */
> #endif
>
> with cases omitted if not useful for that particular macro (this may
> include some macros not being defined at all in some cases).  So don't
> insert any global conditionals affecting all the existing definitions at
> all - look at each block of conditionals and add a third case as needed,
> along with any new macros (again with conditionals in that form) that are
> appropriate.
>
> Where you use abort () in some definitions, use __arm_link_error ()
> instead, like for the existing definitions.
>
> --
> Joseph S. Myers
> joseph@codesourcery.com

[-- Attachment #2: arm_atomic7.patch --]
[-- Type: application/octet-stream, Size: 5558 bytes --]

--- glibc-orig/ports/sysdeps/arm/bits/atomic.h	2013-08-19 21:46:44.592731210 +0400
+++ glibc/ports/sysdeps/arm/bits/atomic.h	2013-09-05 15:53:52.752801514 +0400
@@ -35,9 +35,6 @@ typedef uintmax_t uatomic_max_t;
 
 void __arm_link_error (void);
 
-/* Use the atomic builtins provided by GCC in case the backend provides
-   a pattern to do this efficiently.  */
-
 #ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
 # define atomic_full_barrier() __sync_synchronize ()
 #else
@@ -51,26 +48,107 @@ void __arm_link_error (void);
 # define __arm_assisted_full_barrier()  __arm_link_error()
 #endif
 
-/* Atomic compare and exchange.  */
+/* Use the atomic builtins provided by GCC in case the backend provides
+   a pattern to do this efficiently.  */
+#if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
 
-#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
-# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+# define atomic_exchange_acq(mem, value)                                \
+  __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE)
+
+# define atomic_exchange_rel(mem, value)                                \
+  __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_RELEASE)
+
+/* Atomic exchange (without compare).  */
+
+# define __arch_exchange_8_int(mem, newval, model)      \
+  (__arm_link_error (), (typeof(*mem)) 0)
+
+# define __arch_exchange_16_int(mem, newval, model)     \
+  (__arm_link_error (), (typeof(*mem)) 0)
+
+# define __arch_exchange_32_int(mem, newval, model)     \
+  __atomic_exchange_n (mem, newval, model)
+
+# define __arch_exchange_64_int(mem, newval, model)     \
+  (__arm_link_error (), (typeof(*mem)) 0)
+
+/* Compare and exchange with "acquire" semantics, ie barrier after.  */
+
+# define atomic_compare_and_exchange_bool_acq(mem, new, old)    \
+  __atomic_bool_bysize (__arch_compare_and_exchange_bool, int,  \
+                        mem, new, old, __ATOMIC_ACQUIRE)
+
+# define atomic_compare_and_exchange_val_acq(mem, new, old)     \
+  __atomic_val_bysize (__arch_compare_and_exchange_val, int,    \
+                       mem, new, old, __ATOMIC_ACQUIRE)
+
+/* Compare and exchange with "release" semantics, ie barrier before.  */
+
+# define atomic_compare_and_exchange_bool_rel(mem, new, old)    \
+  __atomic_bool_bysize (__arch_compare_and_exchange_bool, int,  \
+                        mem, new, old, __ATOMIC_RELEASE)
+
+# define atomic_compare_and_exchange_val_rel(mem, new, old)      \
+  __atomic_val_bysize (__arch_compare_and_exchange_val, int,    \
+                       mem, new, old, __ATOMIC_RELEASE)
+
+/* Compare and exchange.
+   For all "bool" routines, we return FALSE if exchange succesful.  */
+
+# define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \
+  ({                                                                    \
+    typeof (*mem) __oldval = (oldval);                                  \
+    !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0,   \
+                                  model, __ATOMIC_RELAXED);             \
+  })
+
+# define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \
+  ({                                                                    \
+    typeof (*mem) __oldval = (oldval);                                  \
+    __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0,    \
+                                 model, __ATOMIC_RELAXED);              \
+    __oldval;                                                           \
+  })
+
+# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+#elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+/* Atomic compare and exchange.  */
+# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \$                                   
   __sync_val_compare_and_swap ((mem), (oldval), (newval))
 #else
 # define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
   __arm_assisted_compare_and_exchange_val_32_acq ((mem), (newval), (oldval))
 #endif
 
+#if !__GNUC_PREREQ (4, 7) || !defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
 /* We don't support atomic operations on any non-word types.
    So make them link errors.  */
-#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
+# define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
   ({ __arm_link_error (); oldval; })
 
-#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
+# define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
   ({ __arm_link_error (); oldval; })
 
-#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
+# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
   ({ __arm_link_error (); oldval; })
+#endif
 
 /* An OS-specific bits/atomic.h file will define this macro if
    the OS can provide something.  If not, we'll fail to build

  parent reply	other threads:[~2013-09-05 12:56 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-01 20:43 Dinar Temirbulatov
2013-09-02 15:08 ` Joseph S. Myers
2013-09-03 17:31   ` Abhishek Deb
2013-09-05 12:56   ` Dinar Temirbulatov [this message]
2013-09-05 15:48     ` Joseph S. Myers
2013-09-05 17:09       ` Abhishek Deb
2013-09-11 19:25         ` Dinar Temirbulatov
2013-09-11 19:27         ` Dinar Temirbulatov
2013-09-11 20:40           ` Abhishek Deb
2013-09-13 17:14           ` Joseph S. Myers
2013-09-14  3:29             ` Dinar Temirbulatov
2013-09-18 17:16               ` Joseph S. Myers
2013-09-19  6:53                 ` Maxim Kuvyrkov
2013-09-19 16:29                   ` Joseph S. Myers
  -- strict thread matches above, loose matches on Subject: below --
2013-09-01 20:42 Dinar Temirbulatov
2013-08-13 17:11 Dinar Temirbulatov
2013-08-15 21:46 ` Abhishek Deb
2013-08-16 22:57   ` Dinar Temirbulatov
2013-08-17  2:42     ` Abhishek Deb
2013-08-19 19:21       ` Dinar Temirbulatov
2013-08-18 20:29 ` Joseph S. Myers

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