From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 17414 invoked by alias); 16 Aug 2013 22:57:48 -0000 Mailing-List: contact libc-ports-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: libc-ports-owner@sourceware.org Received: (qmail 17401 invoked by uid 89); 16 Aug 2013 22:57:48 -0000 X-Spam-SWARE-Status: No, score=-4.1 required=5.0 tests=BAYES_00,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE,SPF_PASS autolearn=ham version=3.3.2 Received: from mail-wi0-f171.google.com (HELO mail-wi0-f171.google.com) (209.85.212.171) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Fri, 16 Aug 2013 22:57:47 +0000 Received: by mail-wi0-f171.google.com with SMTP id hr7so1365024wib.4 for ; Fri, 16 Aug 2013 15:57:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=uSIOoB5r5ovhyBkd+cVZHhlVQa6HG66dJXQwX/e4gpI=; b=DvhrMPUzWhIPrYShaea0uLe7GfJGxhHPCYZdzmCuIsxmoTiFTetjk5aHIw41WMC5dM E7t1SIdJ0WUK3cLLgdRcuePdUSphLmyHltX4HvDUX6xPDNisNI9HpCDx3C4zkr6+O75l Rq+9t+kSF2Lw16a+sFcJ+UjWUX/SyexAa6wZvxnsq+NFWJxygPN+mWAsg0Q2Hihts+xE zgEYwIC2PS0u6s+ZH6ZZCOzKi6GPIZ5ombdO1H+7INHloTvXStlL7FTer+JepTnWN4KQ c4OPbXMURK7moDV5uguJDLtmHUCXsn35syAUD4cjzxAWMZsdYdtMC0GcjIqYwPVK4RbG nn6g== X-Gm-Message-State: ALoCoQkIEVejnGXBJmSbjwcbDfw9YStlx66PEBtoM4DJx2zsOYX8F/cmLTsk20q7QUWIYiHtWNru MIME-Version: 1.0 X-Received: by 10.194.11.67 with SMTP id o3mr14508wjb.0.1376693865210; Fri, 16 Aug 2013 15:57:45 -0700 (PDT) Received: by 10.194.238.72 with HTTP; Fri, 16 Aug 2013 15:57:45 -0700 (PDT) In-Reply-To: <0E42B6C0C4628E48B8DF5D3F3C8FCA8898F1F8BF56@HQMAIL02.nvidia.com> References: <0E42B6C0C4628E48B8DF5D3F3C8FCA8898F1F8BF56@HQMAIL02.nvidia.com> Date: Fri, 16 Aug 2013 22:57:00 -0000 Message-ID: Subject: Re: [Patch] ARM define atomic_exchange_acq/atomic_exchange_rel to __atomic_exchange_n From: Dinar Temirbulatov To: Abhishek Deb Cc: "libc-ports@sourceware.org" , "joseph@codesourcery.com" Content-Type: text/plain; charset=ISO-8859-1 X-SW-Source: 2013-08/txt/msg00006.txt.bz2 Hello Abhishek, >However, taking a deeper look into atomic_compare_and_exchange_acq/rel, following is how the compiled code looks like > > 34: f57ff05f dmb sy > 38: e1903f9f ldrex r3, [r0] > 3c: e3530000 cmp r3, #0 > 40: 1a000002 bne 50 > 44: e1801f92 strex r1, r2, [r0] > 48: e3510000 cmp r1, #0 > 4c: 1afffff9 bne 38 > 50: e3530000 cmp r3, #0 > 54: f57ff05f dmb sy > 58: 1afffff5 bne 34 oh, I see that lll_unlock looks correct on my side: .LBB12: .loc 1 42 0 dmb sy .L21: ldrex r2, [r4] strex r1, r3, [r4] cmp r1, #0 bne .L21 .LVL10: and for example __lll_cond_lock/__lll_timedlock also look right. But, I see that for lll_lock defined as : #define __lll_lock(futex, private) \ ((void) ({ \ int *__futex = (futex); \ if (__builtin_expect (atomic_compare_and_exchange_val_acq (__futex, \ 1, 0), 0)) \ { \ if (__builtin_constant_p (private) && (private) == LLL_PRIVATE) \ __lll_lock_wait_private (__futex); \ else \ __lll_lock_wait (__futex, private); \ } \ })) and we could see that on instruction level it looks like this: dmb sy .L91: ldrex r0, [r4] cmp r0, r3 bne .L92 strex r1, r7, [r4] cmp r1, #0 bne .L91 .L92: .LBE10: .loc 1 204 0 cmp r3, r0 .LBB11: .loc 1 202 0 dmb sy , so nothing wrong on my side. thanks, Dinar.