[Patch, mips]: Add support for FR=1/o32. Update implemention of setjmp/longjmp

[Matheus Almeida <Matheus.Almeida@imgtec.com>]

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Mips allow the width of FPU registers to be controlled by specifying the FR configuration bit:
FR=0 -> 32-bit FPU registers
FR=1 -> 64-bit FPU registers
This can be controlled by -mfp32/-mfp64 command line options.

This patch updates the definition of setjmp, longjmp and jmp_buf so that on a call to setjmp/longjmp, all the required floating-point callee-saved registers are properly saved/restored. 

We are aware that updating the size of jmp_buf can potentially break existing applications but we expect the number of applications built with FR=1 mode to be very small, possibly zero. Nevertheless this should be clearly stated in the release notes that existing applications built with FR=1 (-mfp64) need to be recompiled in order to use new versions of the library.

Regards,
Matheus

Matheus Almeida
MIPS processor IP
www.imgtec.com


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diff --git a/ports/sysdeps/mips/__longjmp.c b/ports/sysdeps/mips/__longjmp.c
index d1d7d64..ea60b1d 100644
--- a/ports/sysdeps/mips/__longjmp.c
+++ b/ports/sysdeps/mips/__longjmp.c
@@ -41,12 +41,29 @@ ____longjmp (env_arg, val_arg)
 
 #ifdef __mips_hard_float
   /* Pull back the floating point callee-saved registers.  */
+#if __mips_fpr == 32
   asm volatile ("l.d $f20, %0" : : "m" (env[0].__fpregs[0]));
   asm volatile ("l.d $f22, %0" : : "m" (env[0].__fpregs[1]));
   asm volatile ("l.d $f24, %0" : : "m" (env[0].__fpregs[2]));
   asm volatile ("l.d $f26, %0" : : "m" (env[0].__fpregs[3]));
   asm volatile ("l.d $f28, %0" : : "m" (env[0].__fpregs[4]));
   asm volatile ("l.d $f30, %0" : : "m" (env[0].__fpregs[5]));
+#elif __mips_fpr == 64
+  asm volatile ("l.d $f20, %0" : : "m" (env[0].__fpregs[0]));
+  asm volatile ("l.d $f21, %0" : : "m" (env[0].__fpregs[1]));
+  asm volatile ("l.d $f22, %0" : : "m" (env[0].__fpregs[2]));
+  asm volatile ("l.d $f23, %0" : : "m" (env[0].__fpregs[3]));
+  asm volatile ("l.d $f24, %0" : : "m" (env[0].__fpregs[4]));
+  asm volatile ("l.d $f25, %0" : : "m" (env[0].__fpregs[5]));
+  asm volatile ("l.d $f26, %0" : : "m" (env[0].__fpregs[6]));
+  asm volatile ("l.d $f27, %0" : : "m" (env[0].__fpregs[7]));
+  asm volatile ("l.d $f28, %0" : : "m" (env[0].__fpregs[8]));
+  asm volatile ("l.d $f29, %0" : : "m" (env[0].__fpregs[9]));
+  asm volatile ("l.d $f30, %0" : : "m" (env[0].__fpregs[10]));
+  asm volatile ("l.d $f31, %0" : : "m" (env[0].__fpregs[11]));
+#else
+#error "Unsupported FPU configuration."
+#endif
 #endif
 
   /* Get the GP. */
diff --git a/ports/sysdeps/mips/bits/setjmp.h b/ports/sysdeps/mips/bits/setjmp.h
index 437848f..0714d5a 100644
--- a/ports/sysdeps/mips/bits/setjmp.h
+++ b/ports/sysdeps/mips/bits/setjmp.h
@@ -66,7 +66,14 @@ typedef struct __jmp_buf_internal_tag
 #if _MIPS_SIM == _ABI64
     double __fpregs[8];
 #else
+    /* Assuming the ABI is _ABIO32. */
+# if __mips_fpr == 32
     double __fpregs[6];
+# elif __mips_fpr == 64
+    double __fpregs[12];
+# else
+#  error "Unsupported FPU configuration."
+# endif
 #endif
   } __jmp_buf[1];
 
diff --git a/ports/sysdeps/mips/setjmp_aux.c b/ports/sysdeps/mips/setjmp_aux.c
index 26715b7..2374cfc 100644
--- a/ports/sysdeps/mips/setjmp_aux.c
+++ b/ports/sysdeps/mips/setjmp_aux.c
@@ -28,12 +28,29 @@ __sigsetjmp_aux (jmp_buf env, int savemask, int sp, int fp)
 {
 #ifdef __mips_hard_float
   /* Store the floating point callee-saved registers...  */
+#if __mips_fpr == 32
   asm volatile ("s.d $f20, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[0]));
   asm volatile ("s.d $f22, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[1]));
   asm volatile ("s.d $f24, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[2]));
   asm volatile ("s.d $f26, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[3]));
   asm volatile ("s.d $f28, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[4]));
   asm volatile ("s.d $f30, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[5]));
+#elif __mips_fpr == 64
+  asm volatile ("s.d $f20, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[0]));
+  asm volatile ("s.d $f21, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[1]));
+  asm volatile ("s.d $f22, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[2]));
+  asm volatile ("s.d $f23, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[3]));
+  asm volatile ("s.d $f24, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[4]));
+  asm volatile ("s.d $f25, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[5]));
+  asm volatile ("s.d $f26, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[6]));
+  asm volatile ("s.d $f27, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[7]));
+  asm volatile ("s.d $f28, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[8]));
+  asm volatile ("s.d $f29, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[9]));
+  asm volatile ("s.d $f30, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[10]));
+  asm volatile ("s.d $f31, %0" : : "m" (env[0].__jmpbuf[0].__fpregs[11]));
+#else
+#error "Unsupported FPU configuration."
+#endif
 #endif
 
   /* .. and the PC;  */