* RE: [Patch, mips]: Add support for FR=1/o32. Update implementation of setjmp/longjmp
@ 2013-11-26 14:52 Matheus Almeida
0 siblings, 0 replies; only message in thread
From: Matheus Almeida @ 2013-11-26 14:52 UTC (permalink / raw)
To: libc-ports; +Cc: Doug Gilmore
Fixed typo in subject line.
From: Matheus Almeida
Sent: 26 November 2013 11:14
Cc: Doug Gilmore
Subject: [Patch, mips]: Add support for FR=1/o32. Update implemention of setjmp/longjmp
Mips allow the width of FPU registers to be controlled by specifying the FR configuration bit:
FR=0 -> 32-bit FPU registers
FR=1 -> 64-bit FPU registers
This can be controlled by -mfp32/-mfp64 command line options.
This patch updates the definition of setjmp, longjmp and jmp_buf so that on a call to setjmp/longjmp, all the required floating-point callee-saved registers are properly saved/restored.
We are aware that updating the size of jmp_buf can potentially break existing applications but we expect the number of applications built with FR=1 mode to be very small, possibly zero. Nevertheless this should be clearly stated in the release notes that existing applications built with FR=1 (-mfp64) need to be recompiled in order to use new versions of the library.
MIPS processor IP
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2013-11-26 11:34 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-11-26 14:52 [Patch, mips]: Add support for FR=1/o32. Update implementation of setjmp/longjmp Matheus Almeida
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).