From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16870 invoked by alias); 12 Mar 2013 15:58:35 -0000 Received: (qmail 16860 invoked by uid 22791); 12 Mar 2013 15:58:33 -0000 X-SWARE-Spam-Status: No, hits=-4.8 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_HOSTKARMA_W,RCVD_IN_HOSTKARMA_WL X-Spam-Check-By: sourceware.org Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 12 Mar 2013 15:58:16 +0000 Received: from svr-orw-fem-01.mgc.mentorg.com ([147.34.98.93]) by relay1.mentorg.com with esmtp id 1UFRaf-00000S-22 from joseph_myers@mentor.com ; Tue, 12 Mar 2013 08:58:13 -0700 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by svr-orw-fem-01.mgc.mentorg.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Tue, 12 Mar 2013 08:58:12 -0700 Received: from digraph.polyomino.org.uk (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.1.289.1; Tue, 12 Mar 2013 15:58:10 +0000 Received: from jsm28 (helo=localhost) by digraph.polyomino.org.uk with local-esmtp (Exim 4.76) (envelope-from ) id 1UFRab-0000nH-Go; Tue, 12 Mar 2013 15:58:09 +0000 Date: Tue, 12 Mar 2013 15:58:00 -0000 From: "Joseph S. Myers" To: Richard Henderson CC: Roland McGrath , Subject: Re: [PATCH roland/arm-memchr] ARM: Make armv6t2 memchr implementation usable without Thumb. In-Reply-To: <513EC685.1020803@twiddle.net> Message-ID: References: <20130311233120.C2F1B2C083@topped-with-meat.com> <513EC685.1020803@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Mailing-List: contact libc-ports-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: libc-ports-owner@sourceware.org X-SW-Source: 2013-03/txt/msg00114.txt.bz2 On Mon, 11 Mar 2013, Richard Henderson wrote: > On 2013-03-11 17:30, Joseph S. Myers wrote: > > On Mon, 11 Mar 2013, Roland McGrath wrote: > > > > > This changes the memchr implementation to be usable without Thumb. > > > > I'm not clear on how the register allocation changes relate to making this > > implementation usable without Thumb. > > > > This re ldrd. ARM mode requires r2 = r + 1, and r even. > Thumb2 allows arbitrary r2. Thanks. In that case I think the register allocation part of the patch should be separated from the cbz/cbnz part to make each change easier to review. -- Joseph S. Myers joseph@codesourcery.com