From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24579 invoked by alias); 15 Mar 2013 01:49:29 -0000 Received: (qmail 24505 invoked by uid 22791); 15 Mar 2013 01:49:29 -0000 X-SWARE-Spam-Status: No, hits=-4.7 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_HOSTKARMA_W,RCVD_IN_HOSTKARMA_WL,TW_GJ,TW_TJ X-Spam-Check-By: sourceware.org Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 15 Mar 2013 01:49:18 +0000 Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1UGJll-00013u-23 from joseph_myers@mentor.com ; Thu, 14 Mar 2013 18:49:17 -0700 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Thu, 14 Mar 2013 18:49:17 -0700 Received: from digraph.polyomino.org.uk (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.1.289.1; Fri, 15 Mar 2013 01:49:15 +0000 Received: from jsm28 (helo=localhost) by digraph.polyomino.org.uk with local-esmtp (Exim 4.76) (envelope-from ) id 1UGJli-0005VN-75; Fri, 15 Mar 2013 01:49:14 +0000 Date: Fri, 15 Mar 2013 01:49:00 -0000 From: "Joseph S. Myers" To: Roland McGrath CC: Subject: Re: [PATCH 1/2 roland/arm-sfi-macros] ARM: sfi_breg assembler macro In-Reply-To: <20130313230841.B880B2C097@topped-with-meat.com> Message-ID: References: <20130313230841.B880B2C097@topped-with-meat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Mailing-List: contact libc-ports-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: libc-ports-owner@sourceware.org X-SW-Source: 2013-03/txt/msg00138.txt.bz2 On Wed, 13 Mar 2013, Roland McGrath wrote: > * sysdeps/arm/sysdep.h [!ARM_SFI_MACROS] > (ARM_SFI_MACROS): Define it. > (sfi_breg, sfi_pld): New assembler macros. > * sysdeps/arm/__longjmp.S: Use them for all memory references not > through the pc or sp registers. > * sysdeps/arm/add_n.S: Likewise. > * sysdeps/arm/addmul_1.S: Likewise. > * sysdeps/arm/arm-mcount.S: Likewise. > * sysdeps/arm/armv6/rawmemchr.S: Likewise. > * sysdeps/arm/armv6/strchr.S: Likewise. > * sysdeps/arm/armv6/strcpy.S: Likewise. > * sysdeps/arm/armv6/strlen.S: Likewise. > * sysdeps/arm/armv6/strrchr.S: Likewise. > * sysdeps/arm/armv6t2/memchr.S: Likewise. > * sysdeps/arm/memcpy.S: Likewise. > * sysdeps/arm/memmove.S: Likewise. > * sysdeps/arm/memset.S: Likewise. > * sysdeps/arm/setjmp.S: Likewise. > * sysdeps/arm/strlen.S: Likewise. > * sysdeps/arm/submul_1.S: Likewise. OK, supposing that the changes to the iWMMXt code in setjmp / longjmp are deliberate to avoid potential confusion from parts of a source file using this pattern and other parts not using it. (Given that the document pointed to implies that NaCl will define ARM_ASSUME_NO_IWMMXT, so the iWMMXt code won't ever actually be built with the non-null version of this macro.) -- Joseph S. Myers joseph@codesourcery.com