From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32686 invoked by alias); 2 Sep 2013 15:08:34 -0000 Mailing-List: contact libc-ports-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: libc-ports-owner@sourceware.org Received: (qmail 32635 invoked by uid 89); 2 Sep 2013 15:08:33 -0000 Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 02 Sep 2013 15:08:33 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.7 required=5.0 tests=AWL,BAYES_00,KHOP_THREADED,RDNS_NONE,SPF_HELO_FAIL autolearn=no version=3.3.2 X-HELO: relay1.mentorg.com Received: from svr-orw-fem-01.mgc.mentorg.com ([147.34.98.93]) by relay1.mentorg.com with esmtp id 1VGVjw-0005xR-Ho from joseph_myers@mentor.com ; Mon, 02 Sep 2013 08:08:28 -0700 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by svr-orw-fem-01.mgc.mentorg.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 2 Sep 2013 08:08:28 -0700 Received: from digraph.polyomino.org.uk (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.2.247.3; Mon, 2 Sep 2013 16:08:26 +0100 Received: from jsm28 (helo=localhost) by digraph.polyomino.org.uk with local-esmtp (Exim 4.76) (envelope-from ) id 1VGVjt-0004y1-5Z; Mon, 02 Sep 2013 15:08:25 +0000 Date: Mon, 02 Sep 2013 15:08:00 -0000 From: "Joseph S. Myers" To: Dinar Temirbulatov CC: , Subject: Re: [Patch] ARM define atomic_exchange_acq/atomic_exchange_rel to __atomic_exchange_n In-Reply-To: Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" X-SW-Source: 2013-09/txt/msg00008.txt.bz2 On Mon, 2 Sep 2013, Dinar Temirbulatov wrote: > Hi, > Another version of change, I added > atomic_compare_and_exchange_val_acq/atomic_compare_and_exchange_val_rel > and atomic_compare_and_exchange_bool_acq/atomic_compare_and_exchange_boot_rel > defenitions and also for gcc-4.7 and higher in the case of unsupported > atomic compare and swap operation, it uses the kernel helper inlines. > Tested on arm a9 with no new regressions. Ok to commit? > Oh, sorry. I missed to attach the change. Here it is. For subsequent patch revisions, please note there should be an extra space after "#" for preprocessor directives inside #if conditionals, one per level of #if nesting (other than toplevel multiple-inclusion guards) - which means that if conditioning existing code, you need to adjust directives inside that code. This patch appears to have too much duplication. For example, you duplicate the definition of __arm_assisted_compare_and_exchange_val_32_acq - but that should not need any extra conditionals at all (beyond the existing #ifndef __arm_assisted_compare_and_exchange_val_32_acq), there's no reason ever not to define it. Similarly, you duplicate __arch_compare_and_exchange_val_64_acq, but with proper #if structure there should only need to be one copy of the version that uses __arm_link_error. What I think you should aim for is that each definition, or small group of definitions, uses conditionals in the form #if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 /* Version using __atomic_*. */ #elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 /* Version using __sync_*. */ #else /* Version using __arm_assisted_*. */ #endif with cases omitted if not useful for that particular macro (this may include some macros not being defined at all in some cases). So don't insert any global conditionals affecting all the existing definitions at all - look at each block of conditionals and add a third case as needed, along with any new macros (again with conditionals in that form) that are appropriate. Where you use abort () in some definitions, use __arm_link_error () instead, like for the existing definitions. -- Joseph S. Myers joseph@codesourcery.com