From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21214 invoked by alias); 30 Mar 2013 14:30:40 -0000 Mailing-List: contact libc-ports-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: libc-ports-owner@sourceware.org Received: (qmail 21184 invoked by uid 89); 30 Mar 2013 14:30:33 -0000 X-Spam-SWARE-Status: No, score=-3.9 required=5.0 tests=AWL,BAYES_00,KAM_STOCKGEN,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_W,RCVD_IN_HOSTKARMA_WL,RCVD_IN_HOSTKARMA_YE autolearn=no version=3.3.1 X-Spam-User: qpsmtpd, 2 recipients Received: from co1ehsobe001.messaging.microsoft.com (HELO co1outboundpool.messaging.microsoft.com) (216.32.180.184) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Sat, 30 Mar 2013 14:30:30 +0000 Received: from mail78-co1-R.bigfish.com (10.243.78.243) by CO1EHSOBE015.bigfish.com (10.243.66.78) with Microsoft SMTP Server id 14.1.225.23; Sat, 30 Mar 2013 14:30:28 +0000 Received: from mail78-co1 (localhost [127.0.0.1]) by mail78-co1-R.bigfish.com (Postfix) with ESMTP id 9C569D004A4; Sat, 30 Mar 2013 14:30:28 +0000 (UTC) X-Forefront-Antispam-Report: CIP:149.199.60.83;KIP:(null);UIP:(null);IPV:NLI;H:xsj-gw1;RD:unknown-60-83.xilinx.com;EFVD:NLI X-SpamScore: 6 X-BigFish: VPS6(zz936eI154dIcefaozz1f42h1fc6h1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275bhz2fh95h668h839hd24hf0ah119dh1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14ddh1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1b0ah906i1155h) Received-SPF: pass (mail78-co1: domain of xilinx.com designates 149.199.60.83 as permitted sender) client-ip=149.199.60.83; envelope-from=david.holsgrove@xilinx.com; helo=xsj-gw1 ;helo=xsj-gw1 ; Received: from mail78-co1 (localhost.localdomain [127.0.0.1]) by mail78-co1 (MessageSwitch) id 1364653826403545_11898; Sat, 30 Mar 2013 14:30:26 +0000 (UTC) Received: from CO1EHSMHS011.bigfish.com (unknown [10.243.78.237]) by mail78-co1.bigfish.com (Postfix) with ESMTP id 56DE2D40058; Sat, 30 Mar 2013 14:30:26 +0000 (UTC) Received: from xsj-gw1 (149.199.60.83) by CO1EHSMHS011.bigfish.com (10.243.66.21) with Microsoft SMTP Server id 14.1.225.23; Sat, 30 Mar 2013 14:30:26 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66] helo=xsj-smtp1.xilinx.com) by xsj-gw1 with esmtp (Exim 4.63) (envelope-from ) id 1ULwna-00015Y-1z; Sat, 30 Mar 2013 07:30:26 -0700 From: David Holsgrove To: , CC: , , , , , , , Subject: [PATCH v2 1/2] Add MicroBlaze support to elf/elf.h Date: Sat, 30 Mar 2013 14:30:00 -0000 In-Reply-To: <1364652885-28535-1-git-send-email-david.holsgrove@xilinx.com> References: <1364652885-28535-1-git-send-email-david.holsgrove@xilinx.com> X-RCIS-Action: ALLOW MIME-Version: 1.0 Content-Type: text/plain Message-ID: X-OriginatorOrg: xilinx.com X-SW-Source: 2013-03/txt/msg00165.txt.bz2 Changelog 2013-03-30 David Holsgrove * elf/elf.h: Add EM_MICROBLAZE and MicroBlaze relocations. Signed-off-by: David Holsgrove --- elf/elf.h | 32 ++++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+), 0 deletions(-) diff --git a/elf/elf.h b/elf/elf.h index d096a97..4adfd63 100644 --- a/elf/elf.h +++ b/elf/elf.h @@ -251,6 +251,7 @@ typedef struct #define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ #define EM_AARCH64 183 /* ARM AARCH64 */ #define EM_TILEPRO 188 /* Tilera TILEPro */ +#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ #define EM_TILEGX 191 /* Tilera TILE-Gx */ #define EM_NUM 192 @@ -2955,6 +2956,37 @@ typedef Elf32_Addr Elf32_Conflict; #define R_M32R_GOTOFF_LO 64 /* Low 16 bit offset to GOT */ #define R_M32R_NUM 256 /* Keep this the last entry. */ +/* MicroBlaze relocations */ +#define R_MICROBLAZE_NONE 0 /* No reloc. */ +#define R_MICROBLAZE_32 1 /* Direct 32 bit. */ +#define R_MICROBLAZE_32_PCREL 2 /* PC relative 32 bit. */ +#define R_MICROBLAZE_64_PCREL 3 /* PC relative 64 bit. */ +#define R_MICROBLAZE_32_PCREL_LO 4 /* Low 16 bits of PCREL32. */ +#define R_MICROBLAZE_64 5 /* Direct 64 bit. */ +#define R_MICROBLAZE_32_LO 6 /* Low 16 bit. */ +#define R_MICROBLAZE_SRO32 7 /* Read-only small data area. */ +#define R_MICROBLAZE_SRW32 8 /* Read-write small data area. */ +#define R_MICROBLAZE_64_NONE 9 /* No reloc. */ +#define R_MICROBLAZE_32_SYM_OP_SYM 10 /* Symbol Op Symbol relocation. */ +#define R_MICROBLAZE_GNU_VTINHERIT 11 /* GNU C++ vtable hierarchy. */ +#define R_MICROBLAZE_GNU_VTENTRY 12 /* GNU C++ vtable member usage. */ +#define R_MICROBLAZE_GOTPC_64 13 /* PC-relative GOT offset. */ +#define R_MICROBLAZE_GOT_64 14 /* GOT entry offset. */ +#define R_MICROBLAZE_PLT_64 15 /* PLT offset (PC-relative). */ +#define R_MICROBLAZE_REL 16 /* Adjust by program base. */ +#define R_MICROBLAZE_JUMP_SLOT 17 /* Create PLT entry. */ +#define R_MICROBLAZE_GLOB_DAT 18 /* Create GOT entry. */ +#define R_MICROBLAZE_GOTOFF_64 19 /* 64 bit offset to GOT. */ +#define R_MICROBLAZE_GOTOFF_32 20 /* 32 bit offset to GOT. */ +#define R_MICROBLAZE_COPY 21 /* Runtime copy. */ +#define R_MICROBLAZE_TLS 22 /* TLS Reloc. */ +#define R_MICROBLAZE_TLSGD 23 /* TLS General Dynamic. */ +#define R_MICROBLAZE_TLSLD 24 /* TLS Local Dynamic. */ +#define R_MICROBLAZE_TLSDTPMOD32 25 /* TLS Module ID. */ +#define R_MICROBLAZE_TLSDTPREL32 26 /* TLS Offset Within TLS Block. */ +#define R_MICROBLAZE_TLSDTPREL64 27 /* TLS Offset Within TLS Block. */ +#define R_MICROBLAZE_TLSGOTTPREL32 28 /* TLS Offset From Thread Pointer. */ +#define R_MICROBLAZE_TLSTPREL32 29 /* TLS Offset From Thread Pointer. */ /* TILEPro relocations. */ #define R_TILEPRO_NONE 0 /* No reloc */ -- 1.7.0.4