From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from hall.aurel32.net (hall.aurel32.net [IPv6:2001:bc8:30d7:100::1]) by sourceware.org (Postfix) with ESMTPS id 4FA7F385AE58 for ; Mon, 3 Oct 2022 21:56:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4FA7F385AE58 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=aurel32.net Authentication-Results: sourceware.org; spf=none smtp.mailfrom=aurel32.net DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=aurel32.net ; s=202004.hall; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Content-Type:From:Reply-To: Subject:Content-ID:Content-Description:X-Debbugs-Cc; bh=PqwTuL9nvR9/lX+FwI9jiQYai5CIALbcq10dJR9WjUc=; b=S0XUHQzNHlphdynyjT7UAg5h1L m7i+C78kXIG21740QBfdHD2s/gFiWIS17VpXahwJdA2rP/3YPo8eNzgQ1x5Kq9M+b3VYOjCDcrKwE eSUfKeS/tY7Rzhqx+jV+S1TiaP/bQtZuLJO+K7ITHBiQD09gaN2nlrHImL+ecSOtloyJAvynnX4dC LaYSQVT68c4yUudljtckwfmYUq9xbul6EeUZ8L7I8ng+P3r01sQtpDAvbDoeZqVCoD/5CyPUqM9MC Kq260PpaVOCJbERIwpV3YAnKtziA6yB4K+vl18OTBMPtZTRDoZhU9pHxBlR+OQBC5M2V55qj+Lz74 oPcpPYyw==; Received: from [2a01:e34:ec5d:a741:8a4c:7c4e:dc4c:1787] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ofTQ9-00GL4W-So; Mon, 03 Oct 2022 23:56:17 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.96) (envelope-from ) id 1ofTQ8-00DozV-30; Mon, 03 Oct 2022 23:56:16 +0200 From: Aurelien Jarno To: libc-stable@sourceware.org Cc: Aurelien Jarno , Noah Goldstein Subject: [COMMITTED 2.35 7/8] x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementation Date: Mon, 3 Oct 2022 23:56:13 +0200 Message-Id: <20221003215614.3294221-7-aurelien@aurel32.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221003215614.3294221-1-aurelien@aurel32.net> References: <20221003215614.3294221-1-aurelien@aurel32.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-13.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,SPF_HELO_PASS,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The AVX2 memrchr implementation uses the 'shlxl' instruction, which belongs to the BMI2 CPU feature and uses the 'lzcnt' instruction, which belongs to the LZCNT CPU feature. Fixes: af5306a735eb ("x86: Optimize memrchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein (cherry picked from commit 3c0c78afabfed4b6fc161c159e628fbf14ff370b) --- sysdeps/x86_64/multiarch/ifunc-avx2.h | 1 + sysdeps/x86_64/multiarch/ifunc-impl-list.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/sysdeps/x86_64/multiarch/ifunc-avx2.h b/sysdeps/x86_64/multiarch/ifunc-avx2.h index 4289df29ec..5cc1e4b0bc 100644 --- a/sysdeps/x86_64/multiarch/ifunc-avx2.h +++ b/sysdeps/x86_64/multiarch/ifunc-avx2.h @@ -31,6 +31,7 @@ IFUNC_SELECTOR (void) if (CPU_FEATURE_USABLE_P (cpu_features, AVX2) && CPU_FEATURE_USABLE_P (cpu_features, BMI2) + && CPU_FEATURE_USABLE_P (cpu_features, LZCNT) && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load)) { if (CPU_FEATURE_USABLE_P (cpu_features, AVX512VL) diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c index 9959f7b228..a7c8ebbe85 100644 --- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c +++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c @@ -192,15 +192,21 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, /* Support sysdeps/x86_64/multiarch/memrchr.c. */ IFUNC_IMPL (i, name, memrchr, IFUNC_IMPL_ADD (array, i, memrchr, - CPU_FEATURE_USABLE (AVX2), + (CPU_FEATURE_USABLE (AVX2) + && CPU_FEATURE_USABLE (BMI2) + && CPU_FEATURE_USABLE (LZCNT)), __memrchr_avx2) IFUNC_IMPL_ADD (array, i, memrchr, (CPU_FEATURE_USABLE (AVX2) + && CPU_FEATURE_USABLE (BMI2) + && CPU_FEATURE_USABLE (LZCNT) && CPU_FEATURE_USABLE (RTM)), __memrchr_avx2_rtm) IFUNC_IMPL_ADD (array, i, memrchr, (CPU_FEATURE_USABLE (AVX512VL) - && CPU_FEATURE_USABLE (AVX512BW)), + && CPU_FEATURE_USABLE (AVX512BW) + && CPU_FEATURE_USABLE (BMI2) + && CPU_FEATURE_USABLE (LZCNT)), __memrchr_evex) IFUNC_IMPL_ADD (array, i, memrchr, 1, __memrchr_sse2)) -- 2.35.1