[2.26 COMMITTED][AArch64] Backport ifunc support for Ares

[Wilco Dijkstra <Wilco.Dijkstra@arm.com>]

commit d6613ad24f708706c24bffa38351e26e1dd5b5d1
Author: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Date:   Wed Dec 19 18:28:24 2018 +0000

    [AArch64] Add ifunc support for Ares
    
    Add Ares to the midr_el0 list and support ifunc dispatch.  Since Ares
    supports 2 128-bit loads/stores, use Neon registers for memcpy by
    selecting __memcpy_falkor by default (we should rename this to
    __memcpy_simd or similar).
    
        * manual/tunables.texi (glibc.cpu.name): Add ares tunable.
        * sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use
        __memcpy_falkor for ares.
        * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES):
        Add new define.
        * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list):
        Add ares cpu.
    
    (cherry picked from commit 02f440c1ef5d5d79552a524065aa3e2fabe469b9)

diff --git a/ChangeLog b/ChangeLog
index 0482b0c..2a9b6ed 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,13 @@
+2019-01-09  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       * manual/tunables.texi (glibc.cpu.name): Add ares tunable.
+       * sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use
+       __memcpy_falkor for ares.
+       * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES):
+       Add new define.
+       * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list):
+       Add ares cpu.
+
 2019-09-06  Siddhesh Poyarekar  <siddhesh@sourceware.org>
 
        * sysdeps/aarch64/multiarch/memcpy_falkor.S (__memcpy_falkor):
diff --git a/manual/tunables.texi b/manual/tunables.texi
index a23c8d0..b230cde 100644
--- a/manual/tunables.texi
+++ b/manual/tunables.texi
@@ -253,7 +253,7 @@ This tunable is specific to i386 and x86-64.
 @deftp Tunable glibc.tune.cpu
 The @code{glibc.tune.cpu=xxx} tunable allows the user to tell @theglibc{} to
 assume that the CPU is @code{xxx} where xxx may have one of these values:
-@code{generic}, @code{falkor}, @code{thunderxt88}.
+@code{generic}, @code{falkor}, @code{thunderxt88}, @code{ares}.
 
 This tunable is specific to aarch64.
 @end deftp
diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c
index b395df1..ee4d78e 100644
--- a/sysdeps/aarch64/multiarch/memcpy.c
+++ b/sysdeps/aarch64/multiarch/memcpy.c
@@ -35,7 +35,7 @@ extern __typeof (__redirect_memcpy) __memcpy_falkor attribute_hidden;
 libc_ifunc (__libc_memcpy,
             (IS_THUNDERX (midr)
             ? __memcpy_thunderx
-            : (IS_FALKOR (midr)
+            : (IS_FALKOR (midr) || IS_ARES (midr)
                ? __memcpy_falkor
                : __memcpy_generic)));
 
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
index 0c7e13f..50297bc 100644
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
@@ -30,6 +30,7 @@ struct cpu_list
 static struct cpu_list cpu_list[] = {
       {"falkor",       0x510FC000},
       {"thunderxt88",  0x430F0A10},
+      {"ares",         0x411FD0C0},
       {"generic",      0x0}
 };
 
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
index 73cb53d..d2ad5c6 100644
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
@@ -44,6 +44,9 @@
 #define IS_FALKOR(midr) (MIDR_IMPLEMENTOR(midr) == 'Q'                       \
                         && MIDR_PARTNUM(midr) == 0xc00)
 
+#define IS_ARES(midr) (MIDR_IMPLEMENTOR(midr) == 'A'                         \
+                       && MIDR_PARTNUM(midr) == 0xd0c)
+
 struct cpu_features
 {
   uint64_t midr_el1;