From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30862 invoked by alias); 28 Oct 2014 18:53:57 -0000 Mailing-List: contact libffi-discuss-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libffi-discuss-owner@sourceware.org Received: (qmail 30703 invoked by uid 89); 28 Oct 2014 18:53:56 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL,BAYES_00,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-qa0-f45.google.com Received: from mail-qa0-f45.google.com (HELO mail-qa0-f45.google.com) (209.85.216.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 28 Oct 2014 18:53:55 +0000 Received: by mail-qa0-f45.google.com with SMTP id dc16so952750qab.32 for ; Tue, 28 Oct 2014 11:53:52 -0700 (PDT) X-Received: by 10.224.74.194 with SMTP id v2mr1927754qaj.60.1414522432858; Tue, 28 Oct 2014 11:53:52 -0700 (PDT) Received: from anchor.com (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPSA id 69sm1717430qgy.19.2014.10.28.11.53.51 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Oct 2014 11:53:52 -0700 (PDT) From: Richard Henderson To: libffi-discuss@sourceware.org Cc: Richard Henderson Subject: [PATCH 04/16] aarch64: Simplify AARCH64_STACK_ALIGN Date: Tue, 28 Oct 2014 18:54:00 -0000 Message-Id: <1414522393-19169-5-git-send-email-rth@twiddle.net> In-Reply-To: <1414522393-19169-1-git-send-email-rth@twiddle.net> References: <1414522393-19169-1-git-send-email-rth@twiddle.net> X-SW-Source: 2014/txt/msg00142.txt.bz2 From: Richard Henderson The iOS abi doesn't require padding between arguments, but that's not what AARCH64_STACK_ALIGN meant. The hardware will in fact trap if the SP register is not 16 byte aligned. --- src/aarch64/ffi.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/src/aarch64/ffi.c b/src/aarch64/ffi.c index f065be5..a6fcc11 100644 --- a/src/aarch64/ffi.c +++ b/src/aarch64/ffi.c @@ -35,13 +35,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ # define FFI_TYPE_LONGDOUBLE 4 #endif -/* Stack alignment requirement in bytes */ -#if defined (__APPLE__) -#define AARCH64_STACK_ALIGN 1 -#else -#define AARCH64_STACK_ALIGN 16 -#endif - #define N_X_ARG_REG 8 #define N_V_ARG_REG 8 @@ -799,8 +792,7 @@ ffi_status ffi_prep_cif_machdep (ffi_cif *cif) { /* Round the stack up to a multiple of the stack alignment requirement. */ - cif->bytes = - (cif->bytes + (AARCH64_STACK_ALIGN - 1)) & ~ (AARCH64_STACK_ALIGN - 1); + cif->bytes = ALIGN(cif->bytes, 16); /* Initialize our flags. We are interested if this CIF will touch a vector register, if so we will enable context save and load to -- 1.9.3