Re: Xeon Phi

[Andrew Haley <aph@redhat.com>]

On 10/14/2014 11:08 AM, Jakub Jelinek wrote:
> On Tue, Oct 14, 2014 at 10:17:22AM +0100, Andrew Haley wrote:
>> On 14/10/14 10:16, pinskia@gmail.com wrote:
>>
>>>
>>>> On Oct 14, 2014, at 2:14 AM, Andrew Haley <aph@redhat.com> wrote:
>>>>
>>>> What's the status of Xeon Phi support?  There seem to be some packages on the
>>>> Interweb, but I don't see anything in libffi git.
>>>
>>> Xeon phi is just x86_64 linux. 
>>
>> No it's not.  There is a completely different FPU and a different ABI.
> 
> I guess it really depends on which Xeon Phi you are talking about.

Right now, the one which exists.  :-)

> There is Knights Ferry, which has been a prototype only, then
> Knights Corner, which is the one currently shipping, which AFAIK is
> a stripped down i586-ish (but 64-bit) ISA (so, no MMX/SSE and later,
> no CMOV and various other post-i586 ISA additions) with i387 FPU and
> a 512-bit vector unit.  This isn't really supported by vanilla GCC,
> patches exist AFAIK for the non-vector unit part, but the vector
> unit isn't really supported in GCC.  Not sure what exact ABI is this
> one using, supposedly some x86-64-ish ABI, just with what is passed
> normally in SSE/SSE2 registers is passed in the zmm? registers of
> the vector unit?

Yes.  k1om-psabi-1.0.pdf at
https://software.intel.com/en-us/forums/topic/278102

> Then there is going to be Knights Landing, see
> http://en.wikipedia.org/wiki/Xeon_Phi which is likely going to be
> pretty standard x86-64-ish ABI and ISA (contemporary Airmont), with
> AVX512F etc. extensions, fully supported by GCC.  So, for the last
> one, I don't think any extra support is really needed (unless libffi
> has supports for AVX/AVX2 vectors already, then AVX512 support would
> be needed too).

Mmm, so I guess we need a proper name for it.  The ABI seems to be
called "K1OM Architecture".

Andrew.