From: "Stefan O'Rear" <sorear2@gmail.com>
To: libffi-discuss@sourceware.org
Subject: RISC-V port
Date: Thu, 08 Sep 2016 09:17:00 -0000 [thread overview]
Message-ID: <CADJ6UvP0ko4x0z4t9StQesVXBF20rbn=Wvs4kgJuc2nKzNBhYQ@mail.gmail.com> (raw)
I have a [libffi
patch](https://github.com/sorear/libffi-riscv/commit/e9639dc79.diff)
which adds support for the RISC-V architecture.
*I did not write* the code in this patch; it is a cleaned up and
rebased version of a [port](https://github.com/riscv/riscv-libffi) by
Michael Knyszek et al of UC Berkeley.
RISC-V is a free and open standard instruction set architecture
originally developed at UC Berkeley and now seeing significant
interest from independent hardware vendors, with interoperable
prototypes from several independent groups. Alex Bradbury's [recent
RFC to the LLVM
community](http://lists.llvm.org/pipermail/llvm-dev/2016-August/103748.html)
has a much better explanation of what RISC-V is and why you should
care about it.
While the privileged architecture is still in some flux, the
architecture which is visible to user space and the C calling
convention have been unchanged in nearly two years and are now
considered frozen, so ports like this one are very likely to remain
valid.
I am interested in being the responsible party to get this code into a
mergable condition. I am familiar with the RISC-V ISA and calling
convention and with libffi's broad principles of operation, but not
with the details of libffi internals.
How shall we proceed?
-s
next reply other threads:[~2016-09-08 9:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-08 9:17 Stefan O'Rear [this message]
[not found] <1473363895.17727.ezmlm@sourceware.org>
2016-09-08 19:47 ` Tom Tromey
2016-09-09 3:15 ` Stefan O'Rear
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