From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 54452 invoked by alias); 15 Apr 2015 07:46:02 -0000 Mailing-List: contact libffi-discuss-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libffi-discuss-owner@sourceware.org Received: (qmail 54437 invoked by uid 89); 15 Apr 2015 07:46:01 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.9 required=5.0 tests=AWL,BAYES_05,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-la0-f53.google.com Received: from mail-la0-f53.google.com (HELO mail-la0-f53.google.com) (209.85.215.53) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 15 Apr 2015 07:45:59 +0000 Received: by laat2 with SMTP id t2so26334654laa.1 for ; Wed, 15 Apr 2015 00:45:56 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.112.72.2 with SMTP id z2mr22145574lbu.39.1429083956588; Wed, 15 Apr 2015 00:45:56 -0700 (PDT) Received: by 10.25.141.144 with HTTP; Wed, 15 Apr 2015 00:45:56 -0700 (PDT) Date: Wed, 15 Apr 2015 07:46:00 -0000 Message-ID: Subject: [libffi][mipsel]o32.S fails to build for softfloat target with upstream gcc-4.9 From: Alex Potapenko To: libffi-discuss@sourceware.org Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2015/txt/msg00050.txt.bz2 Dear all! After this change: https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=221001 libffi does not build o32.S for softfloat mips, since '-msoft-float' is passed to the assembler (needed to work with binutils-2.25: see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64569). As a workaround, '-Wa,-mhard-float' can be passed to the compiler, yet this is not an option for FPU-less targets that have FPU emulation disabled in the kernel (like in case of recent dd-wrt firmwares). It would be perfect to create ffi_call_O32 and ffi_closure_O32 implementations without the use of floating point instructions to port libffi to these targets. > > ../src/mips/o32.S: Assembler messages: > ../src/mips/o32.S:94: Error: opcode not supported on this processor: mips32 (mips32) `l.d $f12,0*4($sp)' > ../src/mips/o32.S:101: Error: opcode not supported on this processor: mips32 (mips32) `l.s $f12,0*4($sp)' > ../src/mips/o32.S:109: Error: opcode not supported on this processor: mips32 (mips32) `l.d $f12,0*4($sp)' > ../src/mips/o32.S:110: Error: opcode not supported on this processor: mips32 (mips32) `l.d $f14,2*4($sp)' > ../src/mips/o32.S:115: Error: opcode not supported on this processor: mips32 (mips32) `l.s $f12,0*4($sp)' > ../src/mips/o32.S:116: Error: opcode not supported on this processor: mips32 (mips32) `l.s $f14,1*4($sp)' > ../src/mips/o32.S:123: Error: opcode not supported on this processor: mips32 (mips32) `l.d $f12,0*4($sp)' > ../src/mips/o32.S:124: Error: opcode not supported on this processor: mips32 (mips32) `l.s $f14,2*4($sp)' > ../src/mips/o32.S:131: Error: opcode not supported on this processor: mips32 (mips32) `l.s $f12,0*4($sp)' > ../src/mips/o32.S:132: Error: opcode not supported on this processor: mips32 (mips32) `l.d $f14,2*4($sp)' > ../src/mips/o32.S:161: Error: opcode not supported on this processor: mips32 (mips32) `s.s $f0,0($8)' > ../src/mips/o32.S:168: Error: opcode not supported on this processor: mips32 (mips32) `s.d $f0,0($8)' > ../src/mips/o32.S:265: Error: opcode not supported on this processor: mips32 (mips32) `s.d $f12,((14*4)-10*4)($fp)' > ../src/mips/o32.S:266: Error: opcode not supported on this processor: mips32 (mips32) `s.d $f14,((14*4)-8*4)($fp)' > ../src/mips/o32.S:285: Error: opcode not supported on this processor: mips32 (mips32) `l.s $f0,((14*4)-6*4)($fp)' > ../src/mips/o32.S:289: Error: opcode not supported on this processor: mips32 (mips32) `l.d $f0,((14*4)-6*4)($fp)' The same happens with mips32r2 as well: > > ../src/mips/o32.S: Assembler messages: > ../src/mips/o32.S:94: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.d $f12,0*4($sp)' > ../src/mips/o32.S:101: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.s $f12,0*4($sp)' > ../src/mips/o32.S:109: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.d $f12,0*4($sp)' > ../src/mips/o32.S:110: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.d $f14,2*4($sp)' > ../src/mips/o32.S:115: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.s $f12,0*4($sp)' > ../src/mips/o32.S:116: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.s $f14,1*4($sp)' > ../src/mips/o32.S:123: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.d $f12,0*4($sp)' > ../src/mips/o32.S:124: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.s $f14,2*4($sp)' > ../src/mips/o32.S:131: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.s $f12,0*4($sp)' > ../src/mips/o32.S:132: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.d $f14,2*4($sp)' > ../src/mips/o32.S:161: Error: opcode not supported on this processor: mips32r2 (mips32r2) `s.s $f0,0($8)' > ../src/mips/o32.S:168: Error: opcode not supported on this processor: mips32r2 (mips32r2) `s.d $f0,0($8)' > ../src/mips/o32.S:265: Error: opcode not supported on this processor: mips32r2 (mips32r2) `s.d $f12,((14*4)-10*4)($fp)' > ../src/mips/o32.S:266: Error: opcode not supported on this processor: mips32r2 (mips32r2) `s.d $f14,((14*4)-8*4)($fp)' > ../src/mips/o32.S:285: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.s $f0,((14*4)-6*4)($fp)' > ../src/mips/o32.S:289: Error: opcode not supported on this processor: mips32r2 (mips32r2) `l.d $f0,((14*4)-6*4)($fp) Since these are all just store and load instructions, it should be possible to replace them with integer commands and store values in integer registers. Any ideas how to do this? Thanks in advance! -- Best regards, Alex Potapenko