From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1059) id F0BBA3948AB3; Fri, 28 Aug 2020 15:59:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F0BBA3948AB3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1598630386; bh=OyPsmrLcIjavVHu0TtGSl79L8iNHXoqrwGxjpEC2ads=; h=From:To:Subject:Date:From; b=X7RozmQI8b+IJyvw/G1xXskEBEMDPA3tUr3yRqfEmWaBy/k+c6BV7XUTfUuvBCrDo tE78Oj1ERIZ35SgAFqXERnaHlaXAbxJPoZz3oNj4cgpNwYoXW54wb+uVbs8GRE8ywc RsSIbIoC3qvDYLd2pIEhoP1Em5J8Zkve7SA2fyTQ= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Nathan Sidwell To: gcc-cvs@gcc.gnu.org, libstdc++-cvs@gcc.gnu.org Subject: [gcc/devel/c++-modules] Daily bump. X-Act-Checkin: gcc X-Git-Author: GCC Administrator X-Git-Refname: refs/heads/devel/c++-modules X-Git-Oldrev: 09698e44c766c4a05ee463d2e36bc1fdac21dce4 X-Git-Newrev: 3eeede6de7f6021ad726f034401872f6d58b343d Message-Id: <20200828155946.F0BBA3948AB3@sourceware.org> Date: Fri, 28 Aug 2020 15:59:46 +0000 (GMT) X-BeenThere: libstdc++-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libstdc++-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Aug 2020 15:59:47 -0000 https://gcc.gnu.org/g:3eeede6de7f6021ad726f034401872f6d58b343d commit 3eeede6de7f6021ad726f034401872f6d58b343d Author: GCC Administrator Date: Sat Aug 22 00:16:24 2020 +0000 Daily bump. Diff: --- gcc/ChangeLog | 97 +++++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/testsuite/ChangeLog | 29 +++++++++++++++ libstdc++-v3/ChangeLog | 23 ++++++++++++ 4 files changed, 150 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2f9ecd2e702..2323d79c439 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,100 @@ +2020-08-21 Richard Sandiford + + * doc/extend.texi: Update links to Arm docs. + * doc/invoke.texi: Likewise. + +2020-08-21 Hongtao Liu + + PR target/96262 + * config/i386/i386-expand.c + (ix86_expand_vec_shift_qihi_constant): Refine. + +2020-08-21 Alex Coplan + + PR jit/63854 + * gcc.c (set_static_spec): New. + (set_static_spec_owned): New. + (set_static_spec_shared): New. + (driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use + set_static_spec_owned() to take ownership of lto_wrapper_file + such that it gets freed in driver::finalize. + (driver::maybe_run_linker): Use set_static_spec_shared() to + ensure that we don't try and free() the static string "ld", + also ensuring that any previously-allocated string in + linker_name_spec is freed. Likewise with argv0. + (driver::finalize): Use set_static_spec_shared() when resetting + specs that previously had allocated strings; remove if(0) + around call to free(). + +2020-08-21 Senthil Kumar Selvaraj + + * emit-rtl.c (try_split): Call copy_frame_info_to_split_insn + to split certain RTX_FRAME_RELATED_P insns. + * recog.c (copy_frame_info_to_split_insn): New function. + (peep2_attempt): Split copying of frame related info of + RTX_FRAME_RELATED_P insns into above function and call it. + * recog.h (copy_frame_info_to_split_insn): Declare it. + +2020-08-21 liuhongt + + PR target/88808 + * config/i386/i386.c (ix86_preferred_reload_class): Allow + QImode data go into mask registers. + * config/i386/i386.md: (*movhi_internal): Adjust constraints + for mask registers. + (*movqi_internal): Ditto. + (*anddi_1): Support mask register operations + (*and_1): Ditto. + (*andqi_1): Ditto. + (*andn_1): Ditto. + (*_1): Ditto. + (*qi_1): Ditto. + (*one_cmpl2_1): Ditto. + (*one_cmplsi2_1_zext): Ditto. + (*one_cmplqi2_1): Ditto. + (define_peephole2): Move constant 0/-1 directly into mask + registers. + * config/i386/predicates.md (mask_reg_operand): New predicate. + * config/i386/sse.md (define_split): Add post-reload splitters + that would convert "generic" patterns to mask patterns. + (*knotsi_1_zext): New define_insn. + +2020-08-21 liuhongt + + * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost + model. + +2020-08-21 liuhongt + + * config/i386/i386.c (inline_secondary_memory_needed): + No memory is needed between mask regs and gpr. + (ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for + mask regno. + * config/i386/i386.h (enum reg_class): Add INT_MASK_REGS. + (REG_CLASS_NAMES): Ditto. + (REG_CLASS_CONTENTS): Ditto. + * config/i386/i386.md: Exclude mask register in + define_peephole2 which is avaiable only for gpr. + +2020-08-21 H.J. Lu + + PR target/71453 + * config/i386/i386.h (struct processor_costs): Add member + mask_to_integer, integer_to_mask, mask_load[3], mask_store[3], + mask_move. + * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost, + i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost, + geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost, + bdver_cost, znver1_cost, znver2_cost, skylake_cost, + btver1_cost, btver2_cost, pentium4_cost, nocona_cost, + atom_cost, slm_cost, intel_cost, generic_cost, core_cost): + Initialize mask_load[3], mask_store[3], mask_move, + integer_to_mask, mask_to_integer for all target costs. + * config/i386/i386.c (ix86_register_move_cost): Using cost + model of mask registers. + (inline_memory_move_cost): Ditto. + (ix86_register_move_cost): Ditto. + 2020-08-20 Iain Buclaw * config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 7ead9649335..faac5049dd8 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20200821 +20200822 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a369f61f89c..47b1372de85 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,32 @@ +2020-08-21 Hongtao Liu + + * gcc.target/i386/pr96262-1.c: New test. + +2020-08-21 liuhongt + + * gcc.target/i386/bitwise_mask_op-1.c: New test. + * gcc.target/i386/bitwise_mask_op-2.c: New test. + * gcc.target/i386/bitwise_mask_op-3.c: New test. + * gcc.target/i386/avx512bw-pr88465.c: New testcase. + * gcc.target/i386/avx512bw-kunpckwd-1.c: Adjust testcase. + * gcc.target/i386/avx512bw-kunpckwd-3.c: Ditto. + * gcc.target/i386/avx512dq-kmovb-5.c: Ditto. + * gcc.target/i386/avx512f-kmovw-5.c: Ditto. + * gcc.target/i386/pr55342.c: Ditto. + +2020-08-21 liuhongt + + * gcc.target/i386/spill_to_mask-1.c: New tests. + * gcc.target/i386/spill_to_mask-2.c: New tests. + * gcc.target/i386/spill_to_mask-3.c: New tests. + * gcc.target/i386/spill_to_mask-4.c: New tests. + +2020-08-21 David Malcolm + + PR analyzer/95152 + * gcc.dg/analyzer/pr95152-4.c: New test. + * gcc.dg/analyzer/pr95152-5.c: New test. + 2020-08-20 David Malcolm PR analyzer/96723 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 3966e48c8e5..c807254c162 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,26 @@ +2020-08-21 Jonathan Wakely + + PR libstdc++/96736 + * testsuite/17_intro/headers/c++1998/all_attributes.cc: Do not + test "cold" on darwin. + * testsuite/17_intro/headers/c++2011/all_attributes.cc: + Likewise. + * testsuite/17_intro/headers/c++2014/all_attributes.cc: + Likewise. + * testsuite/17_intro/headers/c++2017/all_attributes.cc: + Likewise. + * testsuite/17_intro/headers/c++2020/all_attributes.cc: + Likewise. + +2020-08-21 Jonathan Wakely + + PR libstdc++/96718 + * testsuite/25_algorithms/pstl/feature_test-2.cc: Require + tbb-backend effective target. + * testsuite/25_algorithms/pstl/feature_test-3.cc: Likewise. + * testsuite/25_algorithms/pstl/feature_test-5.cc: Likewise. + * testsuite/25_algorithms/pstl/feature_test.cc: Likewise. + 2020-08-20 Jonathan Wakely * include/bits/iterator_concepts.h [__STRICT_ANSI__]