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From: GCC Administrator <gccadmin@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org, libstdc++-cvs@gcc.gnu.org Subject: [gcc r10-10060] Daily bump. Date: Tue, 24 Aug 2021 00:18:36 +0000 (GMT) [thread overview] Message-ID: <20210824001836.11DA53857825@sourceware.org> (raw) https://gcc.gnu.org/g:fdfe32411177c60dec383143b1469450353a5db7 commit r10-10060-gfdfe32411177c60dec383143b1469450353a5db7 Author: GCC Administrator <gccadmin@gcc.gnu.org> Date: Tue Aug 24 00:17:59 2021 +0000 Daily bump. Diff: --- gcc/ChangeLog | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/testsuite/ChangeLog | 39 +++++++++++++++++++++++++++++++++++++++ libstdc++-v3/ChangeLog | 9 +++++++++ 4 files changed, 97 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c1c1a5546e2..4e1b05796f1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,51 @@ +2021-08-23 Richard Earnshaw <rearnsha@arm.com> + + Backported from master: + 2021-08-05 Richard Earnshaw <rearnsha@arm.com> + + PR target/101723 + * config/arm/arm-cpus.in (generic-armv7-a): Add quirk to suppress + writing .cpu directive in asm output. + * config/arm/arm.c (arm_identify_fpu_from_isa): New variable. + (arm_last_printed_arch_string): Delete. + (arm_last-printed_fpu_string): Delete. + (arm_configure_build_target): If use of floating-point/SIMD is + disabled, remove all fp/simd related features from the target ISA. + (last_arm_targ_options): New variable. + (arm_print_asm_arch_directives): Add new parameters. Change order + of emitted directives and handle all cases here. + (arm_file_start): Always call arm_print_asm_arch_directives, move + all generation of .arch/.arch_extension here. + (arm_file_end): Call arm_print_asm_arch. + (arm_declare_function_name): Call arm_print_asm_arch_directives + instead of printing .arch/.fpu directives directly. + +2021-08-23 Richard Earnshaw <rearnsha@arm.com> + + Backported from master: + 2021-08-05 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (arm_configure_build_target): Don't call + arm_option_reconfigure_globals. + (arm_option_restore): Call arm_option_reconfigure_globals after + reconfiguring the target. + * config/arm/arm-c.c (arm_pragma_target_parse): Likewise. + +2021-08-23 Richard Earnshaw <rearnsha@arm.com> + + Backported from master: + 2021-08-05 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (arm_configure_build_target): Ensure the target's + arch_name is always set. + +2021-08-23 Christophe Lyon <christophe.lyon@foss.st.com> + + Backported from master: + 2021-08-23 Christophe Lyon <christophe.lyon@foss.st.com> + + * config/arm/arm_mve.h: Fix __arm_vctp16q return type. + 2021-08-19 Richard Earnshaw <rearnsha@arm.com> Backported from master: diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index d2e7bda3ede..83a5291efec 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20210823 +20210824 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1fc4953fb84..853f24cebc0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,42 @@ +2021-08-23 Christophe Lyon <christophe.lyon@foss.st.com> + + Backported from master: + 2021-08-06 Christophe Lyon <christophe.lyon@foss.st.com> + + PR target/101723 + * gcc.target/arm/pr69245.c: Make sure to emit code for fn1, fix + typo. + +2021-08-23 Christophe Lyon <christophe.lyon@foss.st.com> + + Backported from master: + 2021-08-06 Christophe Lyon <christophe.lyon@foss.st.com> + + PR target/101723 + * gcc.target/arm/attr-neon3.c: Fix typo. + * gcc.target/arm/pragma_fpu_attribute_2.c: Fix typo. + +2021-08-23 Richard Earnshaw <rearnsha@arm.com> + + Backported from master: + 2021-08-05 Richard Earnshaw <rearnsha@arm.com> + + PR target/101723 + * gcc.target/arm/cortex-m55-nofp-flag-hard.c: Update expected output. + * gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise. + * gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise. + * gcc.target/arm/mve/intrinsics/mve_fpu1.c: Convert to dg-do assemble. + Add a non-no-op function body. + * gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise. + * gcc.target/arm/attr-neon.c: Tighten scan-assembler tests. + * gcc.target/arm/attr-neon2.c: Use -Ofast, convert test to use + check-function-bodies. + * gcc.target/arm/attr-neon3.c: Likewise. + * gcc.target/arm/pr69245.c: Tighten scan-assembler match, but allow + multiple instances. + * gcc.target/arm/pragma_fpu_attribute.c: Likewise. + * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise. + 2021-08-19 Thomas Schwinge <thomas@codesourcery.com> Backported from master: diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 238e2b5ce62..3274f225cf1 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,12 @@ +2021-08-23 Jonathan Wakely <jwakely@redhat.com> + + Backported from master: + 2021-08-23 Jonathan Wakely <jwakely@redhat.com> + + * include/std/ranges (basic_istream_view): Add default template + argument. + * testsuite/std/ranges/istream_view.cc: Check it. + 2021-08-19 Jonathan Wakely <jwakely@redhat.com> Backported from master:
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