[gcc r13-3240] Daily bump.

[gcc r13-3240] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:ab332cd78d083edb2fddaa3c02578cafade12725

commit r13-3240-gab332cd78d083edb2fddaa3c02578cafade12725
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Wed Oct 12 00:17:24 2022 +0000

    Daily bump.

Diff:
---
 ChangeLog               |   6 ++
 gcc/ChangeLog           | 245 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/ada/ChangeLog       |   5 +
 gcc/cp/ChangeLog        |  12 +++
 gcc/fortran/ChangeLog   |  15 +++
 gcc/testsuite/ChangeLog |  75 +++++++++++++++
 libatomic/ChangeLog     |   5 +
 libbacktrace/ChangeLog  |   5 +
 libcc1/ChangeLog        |   5 +
 libffi/ChangeLog        |   5 +
 libgcc/ChangeLog        |   8 ++
 libgfortran/ChangeLog   |   5 +
 libgomp/ChangeLog       |   5 +
 libiberty/ChangeLog     |   6 ++
 libitm/ChangeLog        |   5 +
 libobjc/ChangeLog       |   5 +
 liboffloadmic/ChangeLog |  10 ++
 libphobos/ChangeLog     |   5 +
 libquadmath/ChangeLog   |   5 +
 libsanitizer/ChangeLog  |   5 +
 libssp/ChangeLog        |   5 +
 libstdc++-v3/ChangeLog  |  54 +++++++++++
 libvtv/ChangeLog        |   5 +
 lto-plugin/ChangeLog    |   5 +
 zlib/ChangeLog          |   5 +
 26 files changed, 512 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 439ac0ec798..d62bb67c36e 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+
+	* libtool.m4 (*vxworks*): When enable_shared, set dynamic_linker
+	and friends for rtp !large. Assume the linker has the required
+	abilities and set lt_cv_deplibs_check_method.
+
 2022-09-30  Olivier Hainque  <hainque@adacore.com>
 
 	* configure.ac (*vxworks*): If enable_shared is not
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bc10014541b..a44f661becf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,248 @@
+2022-10-11  Aldy Hernandez  <aldyh@redhat.com>
+
+	* gimple-range-gori.cc (gori_compute::logical_combine): Avoid
+	calling tracer.trailer().
+
+2022-10-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/107185
+	* config/i386/i386.md (*notxor<mode>_1): Use MASK_REG_P (x) instead of
+	MASK_REGNO_P (REGNO (x)).
+
+2022-10-11  Aldy Hernandez  <aldyh@redhat.com>
+
+	* range-op-float.cc (class foperator_abs): New.
+	(floating_op_table::floating_op_table): Add ABS_EXPR entry.
+
+2022-10-11  Aldy Hernandez  <aldyh@redhat.com>
+
+	* range-op-float.cc (foperator_unordered_le::op1_range): New.
+	(foperator_unordered_le::op2_range): New.
+	(foperator_unordered_gt::op1_range): New.
+	(foperator_unordered_gt::op2_range): New.
+	(foperator_unordered_ge::op1_range): New.
+	(foperator_unordered_ge::op2_range): New.
+	(foperator_unordered_equal::op1_range): New.
+
+2022-10-11  Aldy Hernandez  <aldyh@redhat.com>
+
+	* range-op-float.cc (class foperator_unordered_lt): New.
+	(class foperator_relop_unknown): Remove
+	(class foperator_unordered_le): New.
+	(class foperator_unordered_gt): New.
+	(class foperator_unordered_ge): New.
+	(class foperator_unordered_equal): New.
+	(floating_op_table::floating_op_table): Replace all UN_EXPR
+	entries with their appropriate fop_unordered_* counterpart.
+
+2022-10-11  Aldy Hernandez  <aldyh@redhat.com>
+
+	* range-op.cc (operator_equal::op1_range): Move BRS_TRUE case up.
+	(operator_lt::op2_range): Same.
+	(operator_le::op2_range): Same.
+	(operator_gt::op2_range): Same.
+	(operator_ge::op2_range): Same.
+
+2022-10-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/107212
+	* tree-vect-loop.cc (vectorizable_reduction): Make sure to
+	set STMT_VINFO_REDUC_DEF for all live lanes in a SLP
+	reduction.
+	(vectorizable_live_operation): Do not pun to the SLP
+	node representative for reduction epilogue generation.
+
+2022-10-11  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-valu.md (neg<mode>2): New define_expand.
+
+2022-10-11  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-valu.md (vec_init<V_ALL:mode><V_ALL_ALT:mode>): New.
+	* config/gcn/gcn.cc (GEN_VN): Add andvNsi3, subvNsi3.
+	(GEN_VNM): Add gathervNm_expr.
+	(GEN_VN_NOEXEC): Add vec_seriesvNsi.
+	(gcn_expand_vector_init): Add initialization of vectors from smaller
+	vectors.
+
+2022-10-11  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-protos.h (get_exec): Add prototypes for two variants.
+	* config/gcn/gcn-valu.md
+	(vec_extract<V_ALL:mode><V_ALL_ALT:mode>): New define_expand.
+	* config/gcn/gcn.cc (get_exec): Export the existing function. Add a
+	new overload variant.
+
+2022-10-11  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-valu.md
+	(<cvt_name><VCVT_MODE:mode><VCVT_FMODE:mode>2<exec>): Use MODE_VF.
+	(<cvt_name><VCVT_FMODE:mode><VCVT_IMODE:mode>2<exec>): Likewise.
+	* config/gcn/gcn.h (MODE_VF): New macro.
+
+2022-10-11  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-modes.def (VECTOR_MODE): Add new modes
+	V32QI, V32HI, V32SI, V32DI, V32TI, V32HF, V32SF, V32DF,
+	V16QI, V16HI, V16SI, V16DI, V16TI, V16HF, V16SF, V16DF,
+	V8QI, V8HI, V8SI, V8DI, V8TI, V8HF, V8SF, V8DF,
+	V4QI, V4HI, V4SI, V4DI, V4TI, V4HF, V4SF, V4DF,
+	V2QI, V2HI, V2SI, V2DI, V2TI, V2HF, V2SF, V2DF.
+	(ADJUST_ALIGNMENT): Likewise.
+	* config/gcn/gcn-protos.h (gcn_full_exec): Delete.
+	(gcn_full_exec_reg): Delete.
+	(gcn_scalar_exec): Delete.
+	(gcn_scalar_exec_reg): Delete.
+	(vgpr_1reg_mode_p): Use inner mode to identify vector registers.
+	(vgpr_2reg_mode_p): Likewise.
+	(vgpr_vector_mode_p): Use VECTOR_MODE_P.
+	* config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF,
+	V_QIHI, V_1REG, V_INT_1REG, V_INT_1REG_ALT, V_FP_1REG, V_2REG, V_noQI,
+	V_noHI, V_INT_noQI, V_INT_noHI, V_ALL, V_ALL_ALT, V_INT, V_FP):
+	Add additional vector modes.
+	(V64_SI, V64_DI, V64_ALL, V64_FP): New iterators.
+	(scalar_mode, SCALAR_MODE, vnsi, VnSI, vndi, VnDI, sdwa):
+	Add additional vector mode mappings.
+	(mov<mode>): Implement vector length conversions.
+	(ldexp<mode>3<exec>): Use VnSI.
+	(frexp<mode>_exp2<exec>): Likewise.
+	(VCVT_MODE, VCVT_FMODE, VCVT_IMODE): Add additional vector modes.
+	(reduc_<reduc_op>_scal_<mode>): Use V64_ALL.
+	(fold_left_plus_<mode>): Use V64_FP.
+	(*<reduc_op>_dpp_shr_<mode>): Use V64_1REG.
+	(*<reduc_op>_dpp_shr_<mode>): Use V64_DI.
+	(*plus_carry_dpp_shr_<mode>): Use V64_INT_1REG.
+	(*plus_carry_in_dpp_shr_<mode>): Use V64_SI.
+	(*plus_carry_dpp_shr_<mode>): Use V64_DI.
+	(mov_from_lane63_<mode>): Use V64_2REG.
+	* config/gcn/gcn.cc (VnMODE): New function.
+	(gcn_can_change_mode_class): Support multiple vector sizes.
+	(gcn_modes_tieable_p): Likewise.
+	(gcn_operand_part): Likewise.
+	(gcn_scalar_exec): Delete function.
+	(gcn_scalar_exec_reg): Delete function.
+	(gcn_full_exec): Delete function.
+	(gcn_full_exec_reg): Delete function.
+	(gcn_inline_fp_constant_p): Support multiple vector sizes.
+	(gcn_fp_constant_p): Likewise.
+	(A): New macro.
+	(GEN_VN_NOEXEC): New macro.
+	(GEN_VNM_NOEXEC): New macro.
+	(GEN_VN): New macro.
+	(GEN_VNM): New macro.
+	(GET_VN_FN): New macro.
+	(CODE_FOR): New macro.
+	(CODE_FOR_OP): New macro.
+	(gen_mov_with_exec): Delete function.
+	(gen_duplicate_load): Delete function.
+	(gcn_expand_vector_init): Support multiple vector sizes.
+	(strided_constant): Likewise.
+	(gcn_addr_space_legitimize_address): Likewise.
+	(gcn_expand_scalar_to_vector_address): Likewise.
+	(gcn_expand_scaled_offsets): Likewise.
+	(gcn_secondary_reload): Likewise.
+	(gcn_valid_cvt_p): Likewise.
+	(gcn_expand_builtin_1): Likewise.
+	(gcn_make_vec_perm_address): Likewise.
+	(gcn_vectorize_vec_perm_const): Likewise.
+	(gcn_vector_mode_supported_p): Likewise.
+	(gcn_autovectorize_vector_modes): New hook.
+	(gcn_related_vector_mode): Support multiple vector sizes.
+	(gcn_expand_dpp_shr_insn): Add FIXME comment.
+	(gcn_md_reorg): Support multiple vector sizes.
+	(print_reg): Likewise.
+	(print_operand): Likewise.
+	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): New hook.
+
+2022-10-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* tree-if-conv.cc (if_convertible_loop_p_1): Move ordering of loop bb's from
+	here...
+	(tree_if_conversion): ... to here.  Also call bitfield lowering when
+	appropriate.
+	(version_loop_for_if_conversion): Adapt to enable loop versioning when we only
+	need to lower bitfields.
+	(ifcvt_split_critical_edges): Relax condition of expected loop form as this is
+	checked earlier.
+	(get_bitfield_rep): New function.
+	(lower_bitfield): Likewise.
+	(bitfields_to_lower_p): Likewise.
+	(need_to_lower_bitfields): New global boolean.
+	(need_to_ifcvt): Likewise.
+	* tree-vect-data-refs.cc (vect_find_stmt_data_reference): Improve diagnostic
+	message.
+	* tree-vect-patterns.cc (vect_recog_temp_ssa_var): Add default value for last
+	parameter.
+	(vect_recog_bitfield_ref_pattern): New.
+	(vect_recog_bit_insert_pattern): New.
+
+2022-10-11  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/107093
+	* config/i386/i386.md (*notxor<mode>_1): New post_reload
+	define_insn_and_split.
+	(*notxorqi_1): Ditto.
+
+2022-10-11  Aldy Hernandez  <aldyh@redhat.com>
+
+	PR tree-optimization/107195
+	* value-range.cc (irange::set_range_from_nonzero_bits): Set range
+	to [0,0] when nonzero mask is 0.
+
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+
+	* config.gcc (*vxworks*): Add t-slibgcc fragment
+	if enable_shared.
+
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+
+	* config/vxworks.h (VX_LGCC_EH_SO0, VX_LGCC_EH_SO1): New
+	internal macros.
+	(VXWORKS_LIBGCC_SPEC): Use them and document.
+
+2022-10-11  Martin Liska  <mliska@suse.cz>
+
+	* gimple-range-op.cc: Add override keyword.
+
+2022-10-11  Eugene Rozenfeld  <erozen@microsoft.com>
+
+	PR debug/107193
+	* tree-cfg.cc (assign_discriminators): Move declaration of cur_locus_e
+	out of the loop.
+
+2022-10-11  Liwei Xu  <liwei.xu@intel.com>
+	    liuhongt  <hongtao.liu@intel.com>
+
+	PR tree-optimization/54346
+	* match.pd: Merge the index of VCST then generates the new vec_perm.
+
+2022-10-11  Jeff Law  <jeffreyalaw@gmail.com>
+
+	PR rtl-optimization/107182
+	* cfgrtl.cc (fixup_reorder_chain): When optimizing a jump to a
+	return, clear EDGE_CROSSING on the appropriate edge.
+
+2022-10-11  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-vector-builtins.cc (struct vector_type_info): Move
+	from config/riscv/riscv-vector-builtins.h.
+	(DEF_RVV_TYPE): Change USER_NAME to NAME.
+	(register_vector_type): Change user_name to name.
+	* config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Change
+	USER_NAME to NAME.
+	* config/riscv/riscv-vector-builtins.h (struct vector_type_info): Move
+	to riscv-vector-builtins.cc.
+	(DEF_RVV_TYPE): Change USER_NAME to NAME.
+
+2022-10-11  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv.md: Add vsetvl instruction type.
+
 2022-10-10  Nathan Sidwell  <nathan@acm.org>
 
 	* common.opt (-fabi-version=): Document 18.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index ee52440e2ce..6f50c16be9c 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20221011
+20221012
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index fc3bc97bea5..e13486ac048 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* libgnat/system-linux-sparc.ads (Support_Atomic_Primitives): New
+	constant set to True.
+
 2022-10-06  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gcc-interface/ada-tree.def (LOAD_EXPR): New expression code.
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 50e5f3eb789..5e985b6a288 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,15 @@
+2022-10-11  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/100134
+	* pt.cc (tsubst_friend_function): Propagate DECL_MODULE_PURVIEW_P
+	from the introduced namespace-scope function to the namespace.
+
+2022-10-11  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/99377
+	* module.cc (lazy_load_binding): Clear processing_template_decl.
+	(lazy_load_pendings): Likewise.
+
 2022-10-10  Nathan Sidwell  <nathan@acm.org>
 
 	* mangle.cc (write_prefix): Add VAR_DECL & FIELD_DECL to
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 094a11dd29d..7c8677036ff 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,18 @@
+2022-10-11  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/107215
+	* arith.cc (gfc_int2int): Check validity of type of source expr.
+	(gfc_int2real): Likewise.
+	(gfc_int2complex): Likewise.
+	(gfc_real2int): Likewise.
+	(gfc_real2real): Likewise.
+	(gfc_complex2int): Likewise.
+	(gfc_complex2real): Likewise.
+	(gfc_complex2complex): Likewise.
+	(gfc_log2log): Likewise.
+	(gfc_log2int): Likewise.
+	(gfc_int2log): Likewise.
+
 2022-10-10  Jakub Jelinek  <jakub@redhat.com>
 
 	* trans-openmp.cc (gfc_trans_omp_assume): Use create_tmp_var_raw
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 723077352d9..350c852a86b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,78 @@
+2022-10-11  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/107215
+	* gfortran.dg/pr107215.f90: New test.
+
+2022-10-11  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/100134
+	* g++.dg/modules/tpl-friend-8_a.H: New test.
+	* g++.dg/modules/tpl-friend-8_b.C: New test.
+
+2022-10-11  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/99377
+	* g++.dg/modules/pr99377-2_a.C: New test.
+	* g++.dg/modules/pr99377-2_b.C: New test.
+
+2022-10-11  Aldy Hernandez  <aldyh@redhat.com>
+
+	* gcc.dg/tree-ssa/vrp-float-abs-1.c: New test.
+
+2022-10-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/107212
+	* gcc.dg/vect/pr107212-1.c: New testcase.
+	* gcc.dg/vect/pr107212-2.c: Likewise.
+
+2022-10-11  Andrew Stubbs  <ams@codesourcery.com>
+
+	* gcc.dg/pr104464.c: Xfail on amdgcn.
+	* gcc.dg/signbit-2.c: Likewise.
+	* gcc.dg/signbit-5.c: Likewise.
+	* gcc.dg/vect/bb-slp-68.c: Likewise.
+	* gcc.dg/vect/bb-slp-cond-1.c: Change expectations on amdgcn.
+	* gcc.dg/vect/bb-slp-subgroups-3.c: Likewise.
+	* gcc.dg/vect/no-vfa-vect-depend-2.c: Change expectations for multiple
+	vector sizes.
+	* gcc.dg/vect/pr33953.c: Likewise.
+	* gcc.dg/vect/pr65947-12.c: Likewise.
+	* gcc.dg/vect/pr65947-13.c: Likewise.
+	* gcc.dg/vect/pr80631-2.c: Likewise.
+	* gcc.dg/vect/slp-reduc-4.c: Likewise.
+	* gcc.dg/vect/trapv-vect-reduc-4.c: Likewise.
+	* lib/target-supports.exp (available_vector_sizes): Add more sizes
+	for amdgcn.
+
+2022-10-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* gcc.dg/vect/vect-bitfield-read-1.c: New test.
+	* gcc.dg/vect/vect-bitfield-read-2.c: New test.
+	* gcc.dg/vect/vect-bitfield-read-3.c: New test.
+	* gcc.dg/vect/vect-bitfield-read-4.c: New test.
+	* gcc.dg/vect/vect-bitfield-read-5.c: New test.
+	* gcc.dg/vect/vect-bitfield-read-6.c: New test.
+	* gcc.dg/vect/vect-bitfield-write-1.c: New test.
+	* gcc.dg/vect/vect-bitfield-write-2.c: New test.
+	* gcc.dg/vect/vect-bitfield-write-3.c: New test.
+	* gcc.dg/vect/vect-bitfield-write-4.c: New test.
+	* gcc.dg/vect/vect-bitfield-write-5.c: New test.
+
+2022-10-11  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/pr107093.c: New test.
+
+2022-10-11  Aldy Hernandez  <aldyh@redhat.com>
+
+	PR tree-optimization/107195
+	* gcc.dg/tree-ssa/pr107195-1.c: New test.
+	* gcc.dg/tree-ssa/pr107195-2.c: New test.
+
+2022-10-11  Liwei Xu  <liwei.xu@intel.com>
+	    liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.dg/pr54346.c: New test.
+
 2022-10-10  Nathan Sidwell  <nathan@acm.org>
 
 	* g++.dg/abi/lambda-ctx1-17.C: New.
diff --git a/libatomic/ChangeLog b/libatomic/ChangeLog
index c8e2c5dd1a9..5efc8fc5522 100644
--- a/libatomic/ChangeLog
+++ b/libatomic/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-08-30  Martin Liska  <mliska@suse.cz>
 
 	* testsuite/Makefile.in: Regenerate.
diff --git a/libbacktrace/ChangeLog b/libbacktrace/ChangeLog
index 291ba2ddf4d..44bca0539b4 100644
--- a/libbacktrace/ChangeLog
+++ b/libbacktrace/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-07-08  Ian Lance Taylor  <iant@golang.org>
 
 	* configure.ac: Check for sys/link.h.  Use either link.h or
diff --git a/libcc1/ChangeLog b/libcc1/ChangeLog
index e4b21c8bb0c..7291643cf09 100644
--- a/libcc1/ChangeLog
+++ b/libcc1/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-06-27  Sergei Trofimovich  <siarheit@google.com>
 
 	PR c++/106102
diff --git a/libffi/ChangeLog b/libffi/ChangeLog
index 83792b822ba..23937c86dc6 100644
--- a/libffi/ChangeLog
+++ b/libffi/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2021-11-15  H.J. Lu  <hjl.tools@gmail.com>
 
 	* LOCAL_PATCHES: Add commit a91f844ef44.
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 06240c13efc..09dc6c1942e 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,11 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+
+	* config.host (*vxworks*): When enable_shared, add
+	libgcc and crtstuff "shared" fragments for rtp except
+	large code model.
+	(aarch64*-wrs-vxworks7*): Remove t-slibgcc-libgcc from
+	the list of fragments.
+
 2022-10-06  Jakub Jelinek  <jakub@redhat.com>
 
 	* config/arc/linux-unwind.h (arc_fallback_frame_state): Use
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index ffe8058598f..f97ea9655af 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-10-10  LIU Hao  <lh_mouse@126.com>
 
 	* io/async.h (struct async_unit): Use `__gthread_t` instead
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 67794934fe6..96b793088b3 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-10-05  Tobias Burnus  <tobias@codesourcery.com>
 
 	* libgomp.texi (OpenMP 5.1 Impl. Status): Mark 'assume' as 'Y'.
diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog
index 2c0d46b1126..b181a690a46 100644
--- a/libiberty/ChangeLog
+++ b/libiberty/ChangeLog
@@ -1,3 +1,9 @@
+2022-10-11  Nathan Sidwell  <nathan@acm.org>
+
+	* cp-demangle.c (d_prefix): 'M' components are not
+	(re-)added to the substitution table.
+	* testsuite/demangle-expected: Add tests.
+
 2022-10-07  Nathan Sidwell  <nathan@acm.org>
 
 	* cp-demangle.c (d_print_comp_inner): Allow parameter packs
diff --git a/libitm/ChangeLog b/libitm/ChangeLog
index 9796ef159ce..a5f326d844e 100644
--- a/libitm/ChangeLog
+++ b/libitm/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-09-28  Lulu Cheng  <chenglulu@loongson.cn>
 	    Yang Yujie  <yangyujie@loongson.cn>
 
diff --git a/libobjc/ChangeLog b/libobjc/ChangeLog
index 1afd92cf49d..71c37ecb3c9 100644
--- a/libobjc/ChangeLog
+++ b/libobjc/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-08-25  Martin Liska  <mliska@suse.cz>
 
 	* configure: Regenerate.
diff --git a/liboffloadmic/ChangeLog b/liboffloadmic/ChangeLog
index f33f0168a80..acad39822be 100644
--- a/liboffloadmic/ChangeLog
+++ b/liboffloadmic/ChangeLog
@@ -1,3 +1,13 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* plugin/configure: Regenerate.
+
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-09-09  Tobias Burnus  <tobias@codesourcery.com>
 
 	* plugin/libgomp-plugin-intelmic.cpp (GOMP_OFFLOAD_load_image):
diff --git a/libphobos/ChangeLog b/libphobos/ChangeLog
index 015782ad1fc..6e18145d23c 100644
--- a/libphobos/ChangeLog
+++ b/libphobos/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-09-27  Iain Buclaw  <ibuclaw@gdcproject.org>
 
 	* libdruntime/MERGE: Merge upstream druntime d579c467c1.
diff --git a/libquadmath/ChangeLog b/libquadmath/ChangeLog
index f2542ddc5a1..440091ebfad 100644
--- a/libquadmath/ChangeLog
+++ b/libquadmath/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-08-25  Martin Liska  <mliska@suse.cz>
 
 	* configure: Regenerate.
diff --git a/libsanitizer/ChangeLog b/libsanitizer/ChangeLog
index 214094c4736..f61d6135d0e 100644
--- a/libsanitizer/ChangeLog
+++ b/libsanitizer/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-10-03  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
 	PR sanitizer/105531
diff --git a/libssp/ChangeLog b/libssp/ChangeLog
index a599349cdf7..fc386ccffa3 100644
--- a/libssp/ChangeLog
+++ b/libssp/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-08-25  Martin Liska  <mliska@suse.cz>
 
 	* configure: Regenerate.
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 58b011baac4..def58a64f8e 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,57 @@
+2022-10-11  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR bootstrap/107221
+	* libsupc++/eh_alloc.cc (pool): Change preprocessor condition
+	for using __mutex from __GTHREADS to _GLIBCXX_HOSTED.
+	(pool::allocate): Remove namespace qualification to use
+	pool::__scoped_lock instead of __gnu_cxx::__scoped_lock.
+
+2022-10-11  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/68606
+	* Makefile.in: Regenerate.
+	* acinclude.m4 (GLIBCXX_EMERGENCY_EH_ALLOC): New macro.
+	* configure: Regenerate.
+	* configure.ac: Use GLIBCXX_EMERGENCY_EH_ALLOC.
+	* crossconfig.m4: Check for secure_getenv.
+	* doc/Makefile.in: Regenerate.
+	* doc/xml/manual/configure.xml: Document new configure options.
+	* doc/xml/manual/evolution.xml: Document addition of tunables.
+	* doc/xml/manual/using_exceptions.xml: Document emergency
+	buffer and tunables.
+	* doc/html/*: Regenerate.
+	* include/Makefile.in: Regenerate.
+	* libsupc++/Makefile.am: Use EH_POOL_FLAGS.
+	* libsupc++/Makefile.in: Regenerate.
+	* libsupc++/eh_alloc.cc (EMERGENCY_OBJ_SIZE): Define in units
+	of sizeof(void*) not including the ABI's exception header.
+	(EMERGENCY_OBJ_COUNT): Define as target-independent calculation
+	based on word size.
+	(MAX_OBJ_COUNT): Define macro for upper limit on pool size.
+	(pool) [_GLIBCXX_EH_POOL_STATIC]: Use fixed-size buffer.
+	(pool::buffer_size_in_bytes): New static member function.
+	(pool::pool): Parse GLIBCXX_TUNABLES environment variable to set
+	pool size at runtime.
+	(pool::in_pool): Use std::less<void*> for total order.
+	(__freeres) [_GLIBCXX_EH_POOL_STATIC]: Do nothing.
+	(__cxa_free_exception, __cxa_free_dependent_exception): Add
+	[[unlikely]] attributes.
+	* po/Makefile.in: Regenerate.
+	* python/Makefile.in: Regenerate.
+	* src/Makefile.in: Regenerate.
+	* src/c++11/Makefile.in: Regenerate.
+	* src/c++17/Makefile.in: Regenerate.
+	* src/c++20/Makefile.in: Regenerate.
+	* src/c++98/Makefile.in: Regenerate.
+	* src/filesystem/Makefile.in: Regenerate.
+	* src/libbacktrace/Makefile.in: Regenerate.
+	* testsuite/Makefile.in: Regenerate.
+
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-10-10  Jonathan Wakely  <jwakely@redhat.com>
 
 	* include/std/type_traits (make_signed, make_unsigned): Remove
diff --git a/libvtv/ChangeLog b/libvtv/ChangeLog
index 41eaa65aa82..8675fd242df 100644
--- a/libvtv/ChangeLog
+++ b/libvtv/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-08-25  Martin Liska  <mliska@suse.cz>
 
 	* configure: Regenerate.
diff --git a/lto-plugin/ChangeLog b/lto-plugin/ChangeLog
index 23cee8daf10..df87bde009e 100644
--- a/lto-plugin/ChangeLog
+++ b/lto-plugin/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-08-01  Martin Liska  <mliska@suse.cz>
 
 	PR lto/106170
diff --git a/zlib/ChangeLog b/zlib/ChangeLog
index 3459bc66035..2d8607023c3 100644
--- a/zlib/ChangeLog
+++ b/zlib/ChangeLog
@@ -1,3 +1,8 @@
+2022-10-11  Olivier Hainque  <hainque@adacore.com>
+	    Olivier Hainque  <hainque@adacore.com>
+
+	* configure: Regenerate.
+
 2022-08-25  Martin Liska  <mliska@suse.cz>
 
 	* configure: Regenerate.