[gcc r13-3441] Daily bump.

[gcc r13-3441] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:1043971957af092e265cc4553b2382398d7308ae

commit r13-3441-g1043971957af092e265cc4553b2382398d7308ae
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sat Oct 22 00:17:11 2022 +0000

    Daily bump.

Diff:
---
 ChangeLog               |   6 +
 gcc/ChangeLog           | 338 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/cp/ChangeLog        |  18 +++
 gcc/fortran/ChangeLog   |  10 ++
 gcc/testsuite/ChangeLog | 102 +++++++++++++++
 libgomp/ChangeLog       |   7 +
 libstdc++-v3/ChangeLog  |  13 ++
 8 files changed, 495 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 11c8f12f9e5..f55adfb90f0 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2022-10-21  Дилян Палаузов  <dilyan.palauzov@aegee.org>
+
+	* configure.ac: Don't configure readline if --with-system-readline is
+	used.
+	* configure: Re-generate.
+
 2022-10-12  Cui,Lili  <lili.cui@intel.com>
 
 	* MAINTAINERS (Write After Approval): Add myself.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 26fc404a234..2ff1780d86c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,341 @@
+2022-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/107322
+	* config/i386/i386-expand.cc (ix86_prepare_fp_compare_args): For
+	BFmode comparisons promote arguments to SFmode and recurse.
+	(ix86_expand_int_movcc, ix86_expand_fp_movcc): Return false early
+	if comparison operands are BFmode and operands[1] is not
+	ix86_fp_comparison_operator.
+
+2022-10-21  Tejas Joshi  <TejasSanjay.Joshi@amd.com>
+
+	* common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver4.
+	* common/config/i386/i386-common.cc (processor_names): Add znver4.
+	(processor_alias_table): Add znver4 and modularize old znvers.
+	* common/config/i386/i386-cpuinfo.h (processor_subtypes):
+	AMDFAM19H_ZNVER4.
+	* config.gcc (x86_64-*-* |...): Likewise.
+	* config/i386/driver-i386.cc (host_detect_local_cpu): Let
+	-march=native recognize znver4 cpus.
+	* config/i386/i386-c.cc (ix86_target_macros_internal): Add znver4.
+	* config/i386/i386-options.cc (m_ZNVER4): New definition.
+	(m_ZNVER): Include m_ZNVER4.
+	(processor_cost_table): Add znver4.
+	* config/i386/i386.cc (ix86_reassociation_width): Likewise.
+	* config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER4.
+	(PTA_ZNVER1): New definition.
+	(PTA_ZNVER2): Likewise.
+	(PTA_ZNVER3): Likewise.
+	(PTA_ZNVER4): Likewise.
+	* config/i386/i386.md (define_attr "cpu"): Add znver4 and rename
+	md file.
+	* config/i386/x86-tune-costs.h (znver4_cost): New definition.
+	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver4.
+	(ix86_adjust_cost): Likewise.
+	* config/i386/znver1.md: Rename to znver.md.
+	* config/i386/znver.md: Add new reservations for znver4.
+	* doc/extend.texi: Add details about znver4.
+	* doc/invoke.texi: Likewise.
+
+2022-10-21  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/107323
+	* tree-loop-distribution.cc (pg_unmark_merged_alias_ddrs):
+	New function.
+	(loop_distribution::break_alias_scc_partitions): Revert
+	postorder save/restore from the PR94125 fix.  Instead
+	make sure to not ignore edges from SCCs we are going to
+	merge.
+
+2022-10-21  Monk Chiang  <monk.chiang@sifive.com>
+
+	* config/riscv/riscv.md: Add atomic type attribute.
+	* config/riscv/sync.md: Add atomic type for atomic instructions.
+
+2022-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/54346
+	* match.pd ((vec_perm (vec_perm@0 @1 @2 VECTOR_CST) @0 VECTOR_CST)):
+	Optimize nested VEC_PERM_EXPRs even if target can't handle the
+	new one provided we don't increase number of VEC_PERM_EXPRs the
+	target can't handle.
+
+2022-10-21  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config.gcc: Add riscv-vector-builtins-bases.o and riscv-vector-builtins-shapes.o
+	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New macro.
+	(DEF_RVV_FUNCTION): Ditto.
+	(handle_pragma_vector): Add intrinsic framework.
+	* config/riscv/riscv.cc (riscv_print_operand): Add operand print for vsetvl/vsetvlmax.
+	* config/riscv/riscv.md: include vector.md.
+	* config/riscv/t-riscv: Add riscv-vector-builtins-bases.o and riscv-vector-builtins-shapes.o
+	* config/riscv/riscv-vector-builtins-bases.cc: New file.
+	* config/riscv/riscv-vector-builtins-bases.h: New file.
+	* config/riscv/riscv-vector-builtins-functions.def: New file.
+	* config/riscv/riscv-vector-builtins-shapes.cc: New file.
+	* config/riscv/riscv-vector-builtins-shapes.h: New file.
+	* config/riscv/riscv-vector-builtins-types.def: New file.
+	* config/riscv/vector.md: New file.
+
+2022-10-21  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config.gcc: Add gt files since function_instance is GTY ((user)).
+	* config/riscv/riscv-builtins.cc (riscv_init_builtins): Add RVV intrinsic framework.
+	(riscv_builtin_decl): Ditto.
+	(riscv_expand_builtin): Ditto.
+	* config/riscv/riscv-protos.h (builtin_decl): New function.
+	(expand_builtin): Ditto.
+	(enum riscv_builtin_class): New enum to classify RVV intrinsic and RISC-V general built-in.
+	* config/riscv/riscv-vector-builtins.cc (class GTY): New declaration.
+	(struct registered_function_hasher): New struct.
+	(DEF_RVV_OP_TYPE): New macro.
+	(DEF_RVV_TYPE): Ditto.
+	(DEF_RVV_PRED_TYPE): Ditto.
+	(GTY): New declaration.
+	(add_attribute): New function.
+	(check_required_extensions): Ditto.
+	(rvv_arg_type_info::get_tree_type): Ditto.
+	(function_instance::function_instance): Ditto.
+	(function_instance::operator==): Ditto.
+	(function_instance::any_type_float_p): Ditto.
+	(function_instance::get_return_type): Ditto.
+	(function_instance::get_arg_type): Ditto.
+	(function_instance::hash): Ditto.
+	(function_instance::call_properties): Ditto.
+	(function_instance::reads_global_state_p): Ditto.
+	(function_instance::modifies_global_state_p): Ditto.
+	(function_instance::could_trap_p): Ditto.
+	(function_builder::function_builder): Ditto.
+	(function_builder::~function_builder): Ditto.
+	(function_builder::allocate_argument_types): Ditto.
+	(function_builder::register_function_group): Ditto.
+	(function_builder::append_name): Ditto.
+	(function_builder::finish_name): Ditto.
+	(function_builder::get_attributes): Ditto.
+	(function_builder::add_function): Ditto.
+	(function_builder::add_unique_function): Ditto.
+	(function_call_info::function_call_info): Ditto.
+	(function_expander::function_expander): Ditto.
+	(function_expander::add_input_operand): Ditto.
+	(function_expander::generate_insn): Ditto.
+	(registered_function_hasher::hash): Ditto.
+	(registered_function_hasher::equal): Ditto.
+	(builtin_decl): Ditto.
+	(expand_builtin): Ditto.
+	(gt_ggc_mx): Define for using GCC garbage collect.
+	(gt_pch_nx): Define for using GCC garbage collect.
+	* config/riscv/riscv-vector-builtins.def (DEF_RVV_OP_TYPE): New macro.
+	(DEF_RVV_PRED_TYPE): Ditto.
+	(vbool64_t): Add suffix.
+	(vbool32_t): Ditto.
+	(vbool16_t): Ditto.
+	(vbool8_t): Ditto.
+	(vbool4_t): Ditto.
+	(vbool2_t): Ditto.
+	(vbool1_t): Ditto.
+	(vint8mf8_t): Ditto.
+	(vuint8mf8_t): Ditto.
+	(vint8mf4_t): Ditto.
+	(vuint8mf4_t): Ditto.
+	(vint8mf2_t): Ditto.
+	(vuint8mf2_t): Ditto.
+	(vint8m1_t): Ditto.
+	(vuint8m1_t): Ditto.
+	(vint8m2_t): Ditto.
+	(vuint8m2_t): Ditto.
+	(vint8m4_t): Ditto.
+	(vuint8m4_t): Ditto.
+	(vint8m8_t): Ditto.
+	(vuint8m8_t): Ditto.
+	(vint16mf4_t): Ditto.
+	(vuint16mf4_t): Ditto.
+	(vint16mf2_t): Ditto.
+	(vuint16mf2_t): Ditto.
+	(vint16m1_t): Ditto.
+	(vuint16m1_t): Ditto.
+	(vint16m2_t): Ditto.
+	(vuint16m2_t): Ditto.
+	(vint16m4_t): Ditto.
+	(vuint16m4_t): Ditto.
+	(vint16m8_t): Ditto.
+	(vuint16m8_t): Ditto.
+	(vint32mf2_t): Ditto.
+	(vuint32mf2_t): Ditto.
+	(vint32m1_t): Ditto.
+	(vuint32m1_t): Ditto.
+	(vint32m2_t): Ditto.
+	(vuint32m2_t): Ditto.
+	(vint32m4_t): Ditto.
+	(vuint32m4_t): Ditto.
+	(vint32m8_t): Ditto.
+	(vuint32m8_t): Ditto.
+	(vint64m1_t): Ditto.
+	(vuint64m1_t): Ditto.
+	(vint64m2_t): Ditto.
+	(vuint64m2_t): Ditto.
+	(vint64m4_t): Ditto.
+	(vuint64m4_t): Ditto.
+	(vint64m8_t): Ditto.
+	(vuint64m8_t): Ditto.
+	(vfloat32mf2_t): Ditto.
+	(vfloat32m1_t): Ditto.
+	(vfloat32m2_t): Ditto.
+	(vfloat32m4_t): Ditto.
+	(vfloat32m8_t): Ditto.
+	(vfloat64m1_t): Ditto.
+	(vfloat64m2_t): Ditto.
+	(vfloat64m4_t): Ditto.
+	(vfloat64m8_t): Ditto.
+	(vv): Ditto.
+	(vx): Ditto.
+	(v): Ditto.
+	(wv): Ditto.
+	(wx): Ditto.
+	(x_x_v): Ditto.
+	(vf2): Ditto.
+	(vf4): Ditto.
+	(vf8): Ditto.
+	(vvm): Ditto.
+	(vxm): Ditto.
+	(x_x_w): Ditto.
+	(v_v): Ditto.
+	(v_x): Ditto.
+	(vs): Ditto.
+	(mm): Ditto.
+	(m): Ditto.
+	(vf): Ditto.
+	(vm): Ditto.
+	(wf): Ditto.
+	(vfm): Ditto.
+	(v_f): Ditto.
+	(ta): Ditto.
+	(tu): Ditto.
+	(ma): Ditto.
+	(mu): Ditto.
+	(tama): Ditto.
+	(tamu): Ditto.
+	(tuma): Ditto.
+	(tumu): Ditto.
+	(tam): Ditto.
+	(tum): Ditto.
+	* config/riscv/riscv-vector-builtins.h (GCC_RISCV_VECTOR_BUILTINS_H): New macro.
+	(RVV_REQUIRE_RV64BIT): Ditto.
+	(RVV_REQUIRE_ZVE64): Ditto.
+	(RVV_REQUIRE_ELEN_FP_32): Ditto.
+	(RVV_REQUIRE_ELEN_FP_64): Ditto.
+	(enum operand_type_index): New enum.
+	(DEF_RVV_OP_TYPE): New macro.
+	(enum predication_type_index): New enum.
+	(DEF_RVV_PRED_TYPE): New macro.
+	(enum rvv_base_type): New enum.
+	(struct rvv_builtin_suffixes): New struct.
+	(struct rvv_arg_type_info): Ditto.
+	(struct rvv_type_info): Ditto.
+	(struct rvv_op_info): Ditto.
+	(class registered_function): New class.
+	(class function_base): Ditto.
+	(class function_shape): Ditto.
+	(struct function_group_info): New struct.
+	(class GTY): New class.
+	(class function_builder): Ditto.
+	(class function_call_info): Ditto.
+	(function_call_info::function_returns_void_p): New function.
+	(class function_expander): New class.
+	(function_instance::operator!=): New function.
+	(function_expander::expand): Ditto.
+	(function_expander::add_input_operand): Ditto.
+	(function_base::call_properties): Ditto.
+
+2022-10-21  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* config/i386/sse.md (ssedvecmode): Rename from VI1SI.
+	(ssedvecmodelower): Rename from vi1si.
+	(sdot_prod<mode>): New define_expand.
+	(udot_prod<mode>): Ditto.
+
+2022-10-21  Kong Lingling  <lingling.kong@intel.com>
+	    Hongyu Wang  <hongyu.wang@intel.com>
+	    Haochen Jiang  <haochen.jiang@intel.com>
+
+	* common/config/i386/cpuinfo.h (get_available_features): Detect
+	avxvnniint8.
+	* common/config/i386/i386-common.cc
+	(OPTION_MASK_ISA2_AVXVNNIINT8_SET): New.
+	(OPTION_MASK_ISA2_AVXVNNIINT8_UNSET): Ditto.
+	(ix86_handle_option): Handle -mavxvnniint8.
+	* common/config/i386/i386-cpuinfo.h (enum processor_features):
+	Add FEATURE_AVXVNNIINT8.
+	* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
+	avxvnniint8.
+	* config.gcc: Add avxvnniint8intrin.h.
+	* config/i386/avxvnniint8intrin.h: New file.
+	* config/i386/cpuid.h (bit_AVXVNNIINT8): New.
+	* config/i386/i386-builtin.def: Add new builtins.
+	* config/i386/i386-c.cc (ix86_target_macros_internal): Define
+	__AVXVNNIINT8__.
+	* config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint8.
+	(ix86_valid_target_attribute_inner_p): Handle avxvnniint8.
+	* config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT8) New..
+	* config/i386/i386.opt: Add option -mavxvnniint8.
+	* config/i386/immintrin.h: Include avxvnniint8intrin.h.
+	* config/i386/sse.md (UNSPEC_VPMADDUBSWACCD
+	UNSPEC_VPMADDUBSWACCSSD,UNSPEC_VPMADDWDACCD,
+	UNSPEC_VPMADDWDACCSSD): Rename according to new style.
+	(vpdp<vpdotprodtype>_<mode>): New define_insn.
+	* doc/extend.texi: Document avxvnniint8.
+	* doc/invoke.texi: Document -mavxvnniint8.
+	* doc/sourcebuild.texi: Document target avxvnniint8.
+
+2022-10-21  Hongyu Wang  <hongyu.wang@intel.com>
+
+	* common/config/i386/i386-common.cc
+	(OPTION_MASK_ISA_AVXIFMA_SET, OPTION_MASK_ISA2_AVXIFMA_UNSET,
+	OPTION_MASK_ISA2_AVX2_UNSET): New macro.
+	(ix86_handle_option): Handle -mavxifma.
+	* common/config/i386/i386-cpuinfo.h (processor_types): Add
+	FEATURE_AVXIFMA.
+	* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
+	avxifma.
+	* common/config/i386/cpuinfo.h (get_available_features):
+	Detect avxifma.
+	* config.gcc: Add avxifmaintrin.h
+	* config/i386/avx512ifmavlintrin.h: (_mm_madd52lo_epu64): Change
+	to macro.
+	(_mm_madd52hi_epu64): Likewise.
+	(_mm256_madd52lo_epu64): Likewise.
+	(_mm256_madd52hi_epu64): Likewise.
+	* config/i386/avxifmaintrin.h: New header.
+	* config/i386/cpuid.h (bit_AVXIFMA): New.
+	* config/i386/i386-builtin.def: Add new builtins, and correct
+	  pattern names for AVX512IFMA.
+	* config/i386/i386-builtins.cc (def_builtin): Handle AVX-IFMA
+	  builtins like AVX-VNNI.
+	* config/i386/i386-c.cc (ix86_target_macros_internal): Define
+	__AVXIFMA__.
+	* config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
+	  Relax ISA masks for AVXIFMA.
+	* config/i386/i386-isa.def: Add AVXIFMA.
+	* config/i386/i386-options.cc (isa2_opts): Add -mavxifma.
+	(ix86_valid_target_attribute_inner_p): Handle avxifma.
+	* config/i386/i386.md (isa): Add attr avxifma and avxifmavl.
+	* config/i386/i386.opt: Add option -mavxifma.
+	* config/i386/immintrin.h: Inculde avxifmaintrin.h.
+	* config/i386/sse.md (avx_vpmadd52<vpmadd52type>_<mode>):
+	Remove.
+	(vpamdd52<vpmadd52type><mode><sd_maskz_name>): Remove.
+	(vpamdd52huq<mode>_maskz): Rename to ...
+	(vpmadd52huq<mode>_maskz): ... this.
+	(vpamdd52luq<mode>_maskz): Rename to ...
+	(vpmadd52luq<mode>_maskz): ... this.
+	(vpmadd52<vpmadd52type><mode>): New define_insn.
+	(vpmadd52<vpmadd52type>v8di): Likewise.
+	(vpmadd52<vpmadd52type><mode>_maskz_1): Likewise.
+	(vpamdd52<vpmadd52type><mode>_mask): Rename to ...
+	(vpmadd52<vpmadd52type><mode>_mask): ... this.
+	* doc/invoke.texi: Document -mavxifma.
+	* doc/extend.texi: Document avxifma.
+	* doc/sourcebuild.texi: Document target avxifma.
+
 2022-10-20  Aldy Hernandez  <aldyh@redhat.com>
 
 	PR c++/106654
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 0f7d77c700e..8d5e5406b70 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20221021
+20221022
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 830324c0450..3c29b4c9b10 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,21 @@
+2022-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/107295
+	* constexpr.cc (reduced_constant_expression_p) <case CONSTRUCTOR>:
+	Return false for VECTOR_TYPE CONSTRUCTORs even without
+	CONSTRUCTOR_NO_CLEARING set on them.
+	(cxx_eval_bare_aggregate): If constant but !changed, fold before
+	returning VECTOR_TYPE_P CONSTRUCTOR.
+	(cxx_eval_constant_expression) <case CONSTRUCTOR>: Don't fold
+	TREE_CONSTANT CONSTRUCTOR, just return it.
+
+2022-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/106863
+	* semantics.cc (finish_compound_literal): For void{}, if
+	processing_template_decl return a COMPOUND_LITERAL_P
+	CONSTRUCTOR rather than void_node.
+
 2022-10-20  Patrick Palka  <ppalka@redhat.com>
 
 	* pt.cc (lookup_and_finish_template_variable): Don't
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index ab1810edf34..f764113c60c 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,13 @@
+2022-10-21  José Rui Faustino de Sousa  <jrfsousa@gmail.com>
+
+	PR fortran/100097
+	PR fortran/100098
+	* trans-array.cc (gfc_trans_class_array): New function to
+	initialize class descriptor's TKR information.
+	* trans-array.h (gfc_trans_class_array): Add function prototype.
+	* trans-decl.cc (gfc_trans_deferred_vars): Add calls to the new
+	function for both pointers and allocatables.
+
 2022-10-20  Harald Anlauf  <anlauf@gmx.de>
 	    Steven G. Kargl  <kargl@gcc.gnu.org>
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a201268405b..c77712f4552 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,105 @@
+2022-10-21  José Rui Faustino de Sousa  <jrfsousa@gmail.com>
+
+	PR fortran/100097
+	PR fortran/100098
+	* gfortran.dg/PR100097.f90: New test.
+	* gfortran.dg/PR100098.f90: New test.
+
+2022-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/107322
+	* gcc.target/i386/pr107322.c: New test.
+
+2022-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/107295
+	* g++.dg/ext/vector42.C: New test.
+
+2022-10-21  Tejas Joshi  <TejasSanjay.Joshi@amd.com>
+
+	* gcc.target/i386/funcspec-56.inc: Handle new march.
+	* g++.target/i386/mv29.C: Likewise.
+
+2022-10-21  Thomas Schwinge  <thomas@codesourcery.com>
+
+	PR tree-optimization/107195
+	* gcc.dg/tree-ssa/pr107195-3.c: New.
+
+2022-10-21  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/107323
+	* gcc.dg/tree-ssa/pr107323.c: New testcase.
+
+2022-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/54346
+	* gcc.dg/pr54346.c: Add -Wno-psabi to dg-options.
+
+2022-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/106863
+	* g++.dg/cpp0x/dr2351-2.C: New test.
+
+2022-10-21  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/base/vsetvl-1.c: New test.
+
+2022-10-21  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* gcc.target/i386/vnniint8-auto-vectorize-1.c: New test.
+	* gcc.target/i386/vnniint8-auto-vectorize-2.c: Ditto.
+
+2022-10-21  Kong Lingling  <lingling.kong@intel.com>
+	    Hongyu Wang  <hongyu.wang@intel.com>
+	    Haochen Jiang  <haochen.jiang@intel.com>
+
+	* g++.dg/other/i386-2.C: Add -mavxvnniint8.
+	* g++.dg/other/i386-3.C: Ditto.
+	* gcc.target/i386/avx-check.h: Add avxvnniint8 check.
+	* gcc.target/i386/sse-12.c: Add -mavxvnniint8.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Ditto.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/funcspec-56.inc: Add new target attribute.
+	* lib/target-supports.exp
+	(check_effective_target_avxvnniint8): New.
+	* gcc.target/i386/avxvnniint8-1.c: Ditto.
+	* gcc.target/i386/avxvnniint8-vpdpbssd-2.c: Ditto.
+	* gcc.target/i386/avxvnniint8-vpdpbssds-2.c: Ditto.
+	* gcc.target/i386/avxvnniint8-vpdpbsud-2.c: Ditto.
+	* gcc.target/i386/avxvnniint8-vpdpbsuds-2.c: Ditto.
+	* gcc.target/i386/avxvnniint8-vpdpbuud-2.c: Ditto.
+	* gcc.target/i386/avxvnniint8-vpdpbuuds-2.c: Ditto.
+
+2022-10-21  Hongyu Wang  <hongyu.wang@intel.com>
+
+	* gcc.target/i386/avx-check.h: Add avxifma check.
+	* gcc.target/i386/avx512ifma-vpmaddhuq-1.c: Remane..
+	* gcc.target/i386/avx512ifma-vpmaddhuq-1a.c: To this.
+	* gcc.target/i386/avx512ifma-vpmaddluq-1.c: Ditto.
+	* gcc.target/i386/avx512ifma-vpmaddluq-1a.c: Ditto.
+	* gcc.target/i386/avx512ifma-vpmaddhuq-1b.c: New Test.
+	* gcc.target/i386/avx512ifma-vpmaddluq-1b.c: Ditto.
+	* gcc.target/i386/avx-ifma-1.c: Ditto.
+	* gcc.target/i386/avx-ifma-2.c: Ditto.
+	* gcc.target/i386/avx-ifma-3.c: Ditto.
+	* gcc.target/i386/avx-ifma-4.c: Ditto.
+	* gcc.target/i386/avx-ifma-5.c: Ditto.
+	* gcc.target/i386/avx-ifma-6.c: Ditto.
+	* gcc.target/i386/avx-ifma-vpmaddhuq-2.c: Ditto.
+	* gcc.target/i386/avx-ifma-vpmaddluq-2.c: Ditto.
+	* gcc.target/i386/sse-12.c: Add -mavxifma.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Ditto.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* g++.dg/other/i386-2.C: Ditto.
+	* g++.dg/other/i386-3.C: Ditto.
+	* gcc.target/i386/funcspec-56.inc: Add new target attribute.
+	* lib/target-supports.exp
+	(check_effective_target_avxifma): New.
+
 2022-10-20  Harald Anlauf  <anlauf@gmx.de>
 	    Steven G. Kargl  <kargl@gcc.gnu.org>
 
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 5ebda8f9391..ed0c023f867 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,10 @@
+2022-10-21  Thomas Schwinge  <thomas@codesourcery.com>
+
+	PR tree-optimization/107195
+	PR target/107344
+	* testsuite/libgomp.oacc-c-c++-common/nvptx-sese-1.c: Restore SESE
+	regions checking.
+
 2022-10-20  Tobias Burnus  <tobias@codesourcery.com>
 
 	* testsuite/lib/libgomp.exp (check_effective_target_offload_device_gcn):
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 1bfdcf6ac63..b668b930f74 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,16 @@
+2022-10-21  Arsen Arsenović  <arsen@aarsen.me>
+
+	* acinclude.m4: Default hosted to off if building without
+	headers and without newlib.
+	* configure: Regenerate.
+
+2022-10-21  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/mofunc_impl.h (move_only_function::__param_t):
+	Use __is_scalar instead of is_trivially_copyable.
+	* testsuite/20_util/move_only_function/call.cc: Check parameters
+	involving incomplete types.
+
 2022-10-20  Patrick Palka  <ppalka@redhat.com>
 
 	* include/std/charconv (__detail::__from_chars_alnum_to_val_table):