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* [gcc(refs/vendors/microsoft/heads/main)] Merge commit 'da7fb32d403759daefefc79dc251d2437c1b638c' into merge-master-da7fb32d403759daefefc79dc2
@ 2022-12-08 1:26 Eugene Rozenfeld
0 siblings, 0 replies; only message in thread
From: Eugene Rozenfeld @ 2022-12-08 1:26 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:69f4af5ae7c4be75d5b7712d42c1da86cf23d2b8
commit 69f4af5ae7c4be75d5b7712d42c1da86cf23d2b8
Merge: 7c263fa09d3 da7fb32d403
Author: MS Automation <gnutools@microsoft.com>
Date: Wed Dec 7 10:11:36 2022 +0000
Merge commit 'da7fb32d403759daefefc79dc251d2437c1b638c' into merge-master-da7fb32d403759daefefc79dc251d2437c1b638c-2022-12-07T10-11-33
Diff:
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Makefile.in | 1288 +-
c++tools/ChangeLog | 32 +
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gcc/testsuite/g++.dg/asan/asan_str_test.cc | 4 +-
gcc/testsuite/g++.dg/asan/asan_test.cc | 36 +-
gcc/testsuite/g++.dg/asan/large-func-test-1.C | 2 +-
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gcc/testsuite/g++.dg/contracts/contracts-assume1.C | 30 +
gcc/testsuite/g++.dg/contracts/contracts-assume2.C | 34 +
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gcc/testsuite/g++.dg/contracts/contracts10.C | 73 +
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gcc/testsuite/g++.dg/coroutines/pr101367.C | 72 +
gcc/testsuite/g++.dg/coroutines/pr101976.C | 78 +
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gcc/testsuite/g++.dg/cpp0x/constexpr-diag3.C | 2 +-
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gcc/testsuite/g++.dg/cpp0x/constexpr-ice6.C | 4 +-
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gcc/testsuite/g++.dg/cpp2a/using-enum-10.C | 16 +
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gcc/testsuite/g++.dg/cpp2a/volatile3.C | 16 +-
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gcc/testsuite/g++.dg/gomp/target-simd-clone-2.C | 23 +
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gcc/testsuite/g++.dg/guality/guality.exp | 4 +
gcc/testsuite/g++.dg/ipa/pr107661.C | 45 +
gcc/testsuite/g++.dg/modules/contracts-1_a.C | 46 +
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gcc/testsuite/g++.dg/pr107867.C | 19 +
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gcc/testsuite/gcc.dg/analyzer/fd-bind.c | 81 +
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gcc/testsuite/gcc.dg/analyzer/fd-datagram-socket.c | 110 +
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gcc/testsuite/gcc.dg/analyzer/fd-listen.c | 70 +
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gcc/testsuite/gcc.dg/analyzer/fd-socket-misuse.c | 100 +
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gcc/testsuite/gcc.dg/analyzer/fd-stream-socket.c | 100 +
gcc/testsuite/gcc.dg/analyzer/fd-symbolic-socket.c | 100 +
gcc/testsuite/gcc.dg/analyzer/fdump-analyzer-1.c | 14 +
gcc/testsuite/gcc.dg/analyzer/feasibility-4.c | 42 +
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gcc/testsuite/gcc.dg/analyzer/ferror-1.c | 6 +
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gcc/testsuite/gcc.dg/analyzer/fileno-1.c | 6 +
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gcc/testsuite/gcc.dg/analyzer/getc-1.c | 6 +
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gcc/testsuite/gcc.dg/analyzer/malloc-ipa-12.c | 2 +-
gcc/testsuite/gcc.dg/analyzer/malloc-reuse.c | 58 +
gcc/testsuite/gcc.dg/analyzer/memcpy-pr107882.c | 8 +
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.../gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c | 29 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_f16.c | 47 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_f32.c | 47 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_s16.c | 29 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c | 29 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_u16.c | 47 +-
.../arm/mve/intrinsics/vcmpeqq_m_n_u32.c | 47 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c | 47 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c | 29 +-
.../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 47 +-
.../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 47 +-
.../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 29 +-
.../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c | 29 +-
.../arm/mve/intrinsics/vcmpgtq_m_n_f16.c | 47 +-
.../arm/mve/intrinsics/vcmpgtq_m_n_f32.c | 47 +-
.../arm/mve/intrinsics/vcmpgtq_m_n_s16.c | 29 +-
.../arm/mve/intrinsics/vcmpgtq_m_n_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c | 34 +-
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.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c | 20 +-
.../arm/mve/intrinsics/vcmphiq_m_n_u16.c | 47 +-
.../arm/mve/intrinsics/vcmphiq_m_n_u32.c | 47 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c | 47 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_u16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_u32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmphiq_u8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_f16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_f32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c | 29 +-
.../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 47 +-
.../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 47 +-
.../arm/mve/intrinsics/vcmpleq_m_n_s16.c | 29 +-
.../arm/mve/intrinsics/vcmpleq_m_n_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpleq_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_f16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_f32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c | 29 +-
.../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 47 +-
.../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 47 +-
.../arm/mve/intrinsics/vcmpltq_m_n_s16.c | 29 +-
.../arm/mve/intrinsics/vcmpltq_m_n_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpltq_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_f16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_f32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c | 29 +-
.../arm/mve/intrinsics/vcmpneq_m_n_f16.c | 47 +-
.../arm/mve/intrinsics/vcmpneq_m_n_f32.c | 47 +-
.../arm/mve/intrinsics/vcmpneq_m_n_s16.c | 29 +-
.../arm/mve/intrinsics/vcmpneq_m_n_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c | 29 +-
.../arm/mve/intrinsics/vcmpneq_m_n_u16.c | 47 +-
.../arm/mve/intrinsics/vcmpneq_m_n_u32.c | 47 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c | 47 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c | 29 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c | 34 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u16.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u32.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u8.c | 20 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_f16.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_f32.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s16.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s32.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s64.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s8.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u16.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u32.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u64.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u8.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c | 46 +-
.../gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c | 46 +-
.../arm/mve/intrinsics/vddupq_m_wb_u16.c | 42 +-
.../arm/mve/intrinsics/vddupq_m_wb_u32.c | 46 +-
.../gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c | 46 +-
.../gcc.target/arm/mve/intrinsics/vddupq_n_u16.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vddupq_n_u32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vddupq_n_u8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c | 46 +-
.../gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c | 46 +-
.../arm/mve/intrinsics/vddupq_x_wb_u16.c | 52 +-
.../arm/mve/intrinsics/vddupq_x_wb_u32.c | 52 +-
.../gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c | 52 +-
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c | 41 +-
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c | 41 +-
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c | 25 +-
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c | 25 +-
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c | 25 +-
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c | 41 +-
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c | 41 +-
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c | 41 +-
.../gcc.target/arm/mve/intrinsics/vdupq_n_f16.c | 21 +-
.../gcc.target/arm/mve/intrinsics/vdupq_n_f32.c | 21 +-
.../gcc.target/arm/mve/intrinsics/vdupq_n_s16.c | 13 +-
.../gcc.target/arm/mve/intrinsics/vdupq_n_s32.c | 13 +-
.../gcc.target/arm/mve/intrinsics/vdupq_n_s8.c | 9 +-
.../gcc.target/arm/mve/intrinsics/vdupq_n_u16.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vdupq_n_u32.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vdupq_n_u8.c | 23 +-
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c | 30 +-
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c | 30 +-
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c | 14 +-
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c | 14 +-
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c | 14 +-
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c | 30 +-
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c | 30 +-
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c | 30 +-
.../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 44 +-
.../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 46 +-
.../gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c | 46 +-
.../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 50 +-
.../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 48 +-
.../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c | 32 +-
.../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c | 32 +-
.../arm/mve/intrinsics/vdwdupq_x_n_u16.c | 42 +-
.../arm/mve/intrinsics/vdwdupq_x_n_u32.c | 46 +-
.../gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c | 46 +-
.../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 50 +-
.../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 46 +-
.../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c | 50 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 28 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_s16.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_s32.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_u16.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_u32.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c | 26 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c | 42 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c | 25 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c | 25 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c | 25 +-
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c | 25 +-
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.../arm/mve/intrinsics/vmladavaq_p_s16.c | 33 +-
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.../arm/mve/intrinsics/vmladavaq_p_u16.c | 49 +-
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.../arm/mve/intrinsics/vmladavaxq_p_s16.c | 33 +-
.../arm/mve/intrinsics/vmladavaxq_p_s32.c | 33 +-
.../arm/mve/intrinsics/vmladavaxq_p_s8.c | 33 +-
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.../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 32 +-
.../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 32 +-
.../arm/mve/intrinsics/vmlaldavaxq_s16.c | 24 +-
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.../gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c | 36 +-
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.../gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c | 42 +-
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.../gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c | 26 +-
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.../gcc.target/arm/mve/intrinsics/vmulq_m_s16.c | 26 +-
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.../gcc.target/arm/mve/intrinsics/vmulq_s16.c | 16 +-
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.../gcc.target/arm/mve/intrinsics/vmulq_s8.c | 16 +-
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.../gcc.target/arm/mve/intrinsics/vmulq_u32.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vmulq_u8.c | 16 +-
.../gcc.target/arm/mve/intrinsics/vmulq_x_f16.c | 26 +-
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3745 files changed, 366200 insertions(+), 209165 deletions(-)
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2022-12-08 1:26 [gcc(refs/vendors/microsoft/heads/main)] Merge commit 'da7fb32d403759daefefc79dc251d2437c1b638c' into merge-master-da7fb32d403759daefefc79dc2 Eugene Rozenfeld
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