From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1464) id 03E443858436; Tue, 1 Aug 2023 03:50:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 03E443858436 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1690861850; bh=YfqGrGAZnHVkEgqWN2p/TpHOGVgOGWJsF9WIUcWqd7g=; h=From:To:Subject:Date:From; b=dt6cqdfL+OinPgZrz0/DvVTk41+36EYKiW4hSLpU6tetMQ4GykulZ8Wd9rP9YrwVU xI380qJ4HL3W4h37nrxdSsUQAw0pFkCOZdfcS3iPVfeh/1ZVeXCgiijniQjrGGpYpk pqcAZx/vs5rmk7MrL26eTITaRASrzczGac0xpeKA= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Peter Bergner To: gcc-cvs@gcc.gnu.org, libstdc++-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/ibm/heads/gcc-12-branch)] ibm: Merge up to top of releases/gcc-12 X-Act-Checkin: gcc X-Git-Author: Peter Bergner X-Git-Refname: refs/vendors/ibm/heads/gcc-12-branch X-Git-Oldrev: 2661a81173b8794f2249f40ee4bb2e4852e9bb5c X-Git-Newrev: e57aa9c806d6494979100724481983b9d6f0cd25 Message-Id: <20230801035050.03E443858436@sourceware.org> Date: Tue, 1 Aug 2023 03:50:50 +0000 (GMT) List-Id: https://gcc.gnu.org/g:e57aa9c806d6494979100724481983b9d6f0cd25 commit e57aa9c806d6494979100724481983b9d6f0cd25 Merge: 2661a81173b 79ebcd30bda Author: Peter Bergner Date: Mon Jul 31 21:44:46 2023 -0500 ibm: Merge up to top of releases/gcc-12 2023-07-31 Peter Bergner Merge up to releases/gcc-12 79ebcd30bda2cd00bf442a28717ec50ae0a8cd1d Diff: ChangeLog | 4 + c++tools/ChangeLog | 4 + config/ChangeLog | 4 + contrib/ChangeLog | 4 + contrib/header-tools/ChangeLog | 4 + contrib/reghunt/ChangeLog | 4 + contrib/regression/ChangeLog | 4 + fixincludes/ChangeLog | 4 + gcc/BASE-VER | 2 +- gcc/ChangeLog | 1335 ++++++ gcc/ChangeLog.ibm | 4 + gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 4 + gcc/analyzer/ChangeLog | 4 + gcc/attr-fnspec.h | 4 +- gcc/c-family/ChangeLog | 29 + gcc/c-family/c-attribs.cc | 28 +- gcc/c-family/c-common.cc | 7 +- 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+- .../gcc.target/arm/mve/intrinsics/vaddq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_f16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_f32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_u16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_u8.c | 24 +- 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+- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c | 48 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c | 48 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c | 48 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_u16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddvaq_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c | 32 +- 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| 24 +- .../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c | 35 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c | 35 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c | 35 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c | 47 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c | 47 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c | 47 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c | 27 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c | 27 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 27 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c | 35 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c | 35 +- .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 35 +- .../gcc.target/arm/mve/intrinsics/vminaq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vminaq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vminaq_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vminaq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vminaq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vminaq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c | 49 +- .../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c | 49 +- .../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c | 49 +- .../gcc.target/arm/mve/intrinsics/vminavq_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vminavq_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vminavq_s8.c | 37 +- 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| 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmvnq_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmvnq_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vnegq_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vnegq_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vnegq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vnegq_m_f32.c | 33 +- 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33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev32q_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev64q_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c | 33 +- .../{vsubq_x_n_f16-1.c => vrev64q_m_s16-clobber.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev64q_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev64q_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev64q_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c | 33 +- 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| 24 +- .../gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c | 33 +- .../arm/mve/intrinsics/vrshrnbq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vrshrnbq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vrshrnbq_m_n_u16.c | 34 +- .../arm/mve/intrinsics/vrshrnbq_m_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c | 24 +- .../arm/mve/intrinsics/vrshrntq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vrshrntq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vrshrntq_m_n_u16.c | 34 +- .../arm/mve/intrinsics/vrshrntq_m_n_u32.c | 34 +- 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libstdc++-v3/testsuite/std/ranges/single_view.cc | 13 + libvtv/ChangeLog | 4 + lto-plugin/ChangeLog | 4 + maintainer-scripts/ChangeLog | 4 + zlib/ChangeLog | 4 + 2992 files changed, 88583 insertions(+), 15498 deletions(-) diff --cc gcc/ChangeLog.ibm index 26448a8a631,00000000000..74f5173a88c mode 100644,000000..100644 --- a/gcc/ChangeLog.ibm +++ b/gcc/ChangeLog.ibm @@@ -1,27 -1,0 +1,31 @@@ ++2023-07-31 Peter Bergner ++ ++ Merge up to releases/gcc-12 79ebcd30bda2cd00bf442a28717ec50ae0a8cd1d ++ +2023-04-11 Peter Bergner + + Merge up to releases/gcc-12 908d9c7e6ed4be95d39b7b01056dda365f379947 + +2023-03-27 Peter Bergner + + Merge up to releases/gcc-12 4f41c4ff250709219a7c3eba27a62f8a4689412b + +2022-11-04 Peter Bergner + + Merge up to releases/gcc-12 33561e870dc48966e8c7ede46e95032279a15423 + +2022-10-17 Peter Bergner + + Merge up to releases/gcc-12 fe7d74313736b8e1c30812bc49419f419bdf1c53 + +2022-09-16 Peter Bergner + + Merge up to releases/gcc-12 05cfd7b0677502d06a50ea6ff05d4445e194e3b9 + +2022-08-19 Peter Bergner + + Merge up to releases/gcc-12 2d29d7b240d9ca87cbee5d90c846694125d293af + +2022-06-15 Peter Bergner + + Create ibm/gcc-12-branch which follows the releases/gcc-12 branch.