From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2168) id 763433858C74; Fri, 9 Feb 2024 00:19:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 763433858C74 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1707437995; bh=OHF5+BsE+pDrArZRklJ4xjptujyGx0klCrB3XlK+Jlw=; h=From:To:Subject:Date:From; b=nz+evYXVRgqSnfUEVnAMyJbDXDx3UAqL+qEJymq8NJL6+qaio5ULIyTabu0nfWrZT CxREfOQ2DoFwQbo0BkFijY56iYHOusZPx79romPlmYcBTxuauHOkgLVbeGFErT8eBi +6iC8L9gBmBwvqKnBUXQvBUGn1hzsorRaPIj8fyQ= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: GCC Administrator To: gcc-cvs@gcc.gnu.org, libstdc++-cvs@gcc.gnu.org Subject: [gcc r14-8892] Daily bump. X-Act-Checkin: gcc X-Git-Author: GCC Administrator X-Git-Refname: refs/heads/master X-Git-Oldrev: 3d112bb50a2d55156f4b135f030e66dd240a3fc9 X-Git-Newrev: 90586e27fa6ea4f9b0edab3aecb24637c776c5e0 Message-Id: <20240209001955.763433858C74@sourceware.org> Date: Fri, 9 Feb 2024 00:19:55 +0000 (GMT) List-Id: https://gcc.gnu.org/g:90586e27fa6ea4f9b0edab3aecb24637c776c5e0 commit r14-8892-g90586e27fa6ea4f9b0edab3aecb24637c776c5e0 Author: GCC Administrator Date: Fri Feb 9 00:19:17 2024 +0000 Daily bump. Diff: --- gcc/ChangeLog | 77 ++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c/ChangeLog | 7 ++++ gcc/cp/ChangeLog | 12 +++++++ gcc/testsuite/ChangeLog | 94 +++++++++++++++++++++++++++++++++++++++++++++++++ libstdc++-v3/ChangeLog | 15 ++++++++ 6 files changed, 206 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 586ad24a8f3c..1018b0e17eef 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,80 @@ +2024-02-08 Aldy Hernandez + + PR tree-optimization/113735 + * value-relation.cc (equiv_oracle::add_equiv_to_block): Call + limit_check(). + +2024-02-08 Georg-Johann Lay + + * config/avr/gen-avr-mmcu-specs.cc (struct McuInfo): New. + (main, print_mcu, diagnose_mrodata_in_ram): Pass it down. + +2024-02-08 H.J. Lu + + PR target/113711 + PR target/113733 + * config/i386/constraints.md: List all constraints with j prefix. + (j>): Change auto-dec to auto-inc in documentation. + (je): Changed to a memory constraint with APX NDD TLS operand + check. + (jM): New memory constraint for APX NDD instructions. + (jO): Likewise. + * config/i386/i386-protos.h (x86_poff_operand_p): Removed. + * config/i386/i386.cc (x86_poff_operand_p): Likewise. + * config/i386/i386.md (*add3_doubleword): Use rjO. + (*add_1[SWI48]): Use je and jM. + (addsi_1_zext): Use jM. + (*addv4_doubleword_1[DWI]): Likewise. + (*sub_1[SWI]): Use jM. + (@add3_cc_overflow_1[SWI]): Likewise. + (*add3_doubleword_cc_overflow_1): Use rjO. + (*and3_doubleword): Likewise. + (*anddi_1): Use jM. + (*andsi_1_zext): Likewise. + (*and_1[SWI24]): Likewise. + (*3_doubleword[any_or]): Use rjO + (*code_1[any_or SWI248]): Use jM. + (*si_1_zext[zero_extend + any_or]): Likewise. + * config/i386/predicates.md (apx_ndd_memory_operand): New. + (apx_ndd_add_memory_operand): Likewise. + +2024-02-08 Georg-Johann Lay + + PR target/113824 + * config/avr/avr-mcus.def (ata5797): Move from avr5 to avr4. + * doc/avr-mmcu.texi: Rebuild. + +2024-02-08 Tamar Christina + + PR tree-optimization/113808 + * tree-vect-loop.cc (vectorizable_live_operation): Don't cache the + value cross iterations. + +2024-02-08 Georg-Johann Lay + + * config/avr/gen-avr-mmcu-specs.cc (print_mcu) <*cpp_mcu>: Spec always + defines __AVR_PM_BASE_ADDRESS__ if the core has it. + +2024-02-08 Richard Biener + + * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): + Revert last change to dr_may_alias_p. + +2024-02-08 Georg-Johann Lay + + * config/avr/gen-avr-mmcu-specs.cc: Rename spec cc1_misc to + cc1_rodata_in_ram. Rename spec link_misc to link_rodata_in_ram. + Remove spec asm_misc. + * config/avr/specs.h: Same. + +2024-02-08 Pan Li + + PR target/113766 + * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Make + sure the c.arg_num is >= 2 before checking. + (struct build_frm_base): Ditto. + (struct narrow_alu_def): Ditto. + 2024-02-07 Richard Biener PR tree-optimization/113796 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 2871f27b71de..9622c04647db 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20240208 +20240209 diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index 002bf415b15c..6f4f0c7da9cd 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,10 @@ +2024-02-08 Joseph Myers + + PR c/113776 + * c-typeck.cc (c_objc_common_truthvalue_conversion): Return an + integer constant expression for boolean conversion of floating + constant. + 2024-02-05 Jakub Jelinek PR c/113740 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 8a63a366ee10..9f8ef7b09d42 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,15 @@ +2024-02-08 Patrick Palka + + PR c++/113649 + * pt.cc (do_class_deduction): Add outer_targs parameter. + Substitute outer arguments into the CTAD template. + (do_auto_deduction): Pass outer_targs to do_class_deduction. + +2024-02-08 Jason Merrill + + * pt.cc (create_template_parm_object): Pass TARGET_EXPR to + cxx_constant_value. + 2024-02-06 Jakub Jelinek PR c++/113788 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f238648d79de..9ffdfcb7ef5a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,97 @@ +2024-02-08 Edwin Lu + + * gcc.target/riscv/rvv/base/abi-1.c: change selector + * gcc.target/riscv/rvv/base/pragma-2.c: ditto + * gcc.target/riscv/rvv/base/pragma-3.c: ditto + +2024-02-08 Richard Earnshaw + + * lib/target-supports.exp + (check_effective_target_arm_fp16_alternative_ok_nocache): Use + et_arm_fp16_alternative_flags to cache the result. Improve test + for FP16 availability. + (add_options_for_arm_fp16_alternative): Use + et_arm_fp16_alternative_flags. + * g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: Update dg-* flags. + * g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: Likewise. + * gcc.dg/torture/arm-fp16-int-convert-alt.c: Likewise. + * gcc.dg/torture/arm-fp16-ops-3.c: Likewise. + * gcc.dg/torture/arm-fp16-ops-4.c: Likewise. + * gcc.target/arm/fp16-aapcs-3.c: Likewise. + * gcc.target/arm/fp16-aapcs-4.c: Likewise. + * gcc.target/arm/fp16-compile-alt-1.c: Likewise. + * gcc.target/arm/fp16-compile-alt-10.c: Likewise. + * gcc.target/arm/fp16-compile-alt-11.c: Likewise. + * gcc.target/arm/fp16-compile-alt-12.c: Likewise. + * gcc.target/arm/fp16-compile-alt-2.c: Likewise. + * gcc.target/arm/fp16-compile-alt-3.c: Likewise. + * gcc.target/arm/fp16-compile-alt-4.c: Likewise. + * gcc.target/arm/fp16-compile-alt-5.c: Likewise. + * gcc.target/arm/fp16-compile-alt-6.c: Likewise. + * gcc.target/arm/fp16-compile-alt-7.c: Likewise. + * gcc.target/arm/fp16-compile-alt-8.c: Likewise. + * gcc.target/arm/fp16-compile-alt-9.c: Likewise. + * gcc.target/arm/fp16-rounding-alt-1.c: Likewise. + +2024-02-08 Patrick Palka + + PR c++/113649 + * g++.dg/cpp2a/nontype-class65.C: New test. + +2024-02-08 Aldy Hernandez + + PR tree-optimization/113735 + * gcc.dg/tree-ssa/pr113735.c: New test. + +2024-02-08 H.J. Lu + + PR target/113711 + PR target/113733 + * gcc.target/i386/apx-ndd-2.c: New test. + * gcc.target/i386/apx-ndd-base-index-1.c: Likewise. + * gcc.target/i386/apx-ndd-no-seg-global-1.c: Likewise. + * gcc.target/i386/apx-ndd-seg-1.c: Likewise. + * gcc.target/i386/apx-ndd-seg-2.c: Likewise. + * gcc.target/i386/apx-ndd-seg-3.c: Likewise. + * gcc.target/i386/apx-ndd-seg-4.c: Likewise. + * gcc.target/i386/apx-ndd-seg-5.c: Likewise. + * gcc.target/i386/apx-ndd-tls-1a.c: Likewise. + * gcc.target/i386/apx-ndd-tls-2.c: Likewise. + * gcc.target/i386/apx-ndd-tls-3.c: Likewise. + * gcc.target/i386/apx-ndd-tls-4.c: Likewise. + * gcc.target/i386/apx-ndd-x32-1.c: Likewise. + +2024-02-08 Tamar Christina + + PR tree-optimization/113808 + * gfortran.dg/vect/vect-early-break_1-PR113808.f90: Moved to... + * gfortran.dg/vect/vect-early-break_1-pr113808.f90: ...here. + +2024-02-08 Tamar Christina + + PR tree-optimization/113808 + * gfortran.dg/vect/vect-early-break_1-PR113808.f90: New test. + +2024-02-08 Tamar Christina + + * gcc.dg/vect/vect-early-break_110-pr113467.c: Change unsigned long * + to uint64_t *. + +2024-02-08 Pan Li + + PR target/113766 + * gcc.target/riscv/rvv/base/pr113766-1.c: Add new cases. + +2024-02-08 Joseph Myers + + PR c/113776 + * gcc.dg/pr113776-1.c, gcc.dg/pr113776-2.c, gcc.dg/pr113776-3.c, + gcc.dg/pr113776-4.c: New tests. + +2024-02-08 Jason Merrill + + * g++.dg/cpp2a/nontype-class64.C: New test. + 2024-02-07 Richard Biener PR tree-optimization/113796 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 57a58d8c13c6..2dc435e044cb 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,18 @@ +2024-02-08 Jonathan Wakely + + * include/bits/shared_ptr_atomic.h: Fix typo in comment. + +2024-02-08 Jonathan Wakely + + PR libstdc++/100147 + * include/bits/gslice.h (operator=): Add comment about lack of + self-assignment check. + +2024-02-08 Jonathan Wakely + + * include/tr2/type_traits (bases, direct_bases): Use + __has_builtin to check if required built-ins are supported. + 2024-02-07 Patrick Palka PR testsuite/113710