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Tue, 8 Jun 2021 14:11:49 +0200 (CEST) Received: from excalibur.localnet (140.181.3.12) by srvex3.campus.gsi.de (10.10.4.16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2242.10; Tue, 8 Jun 2021 14:11:48 +0200 From: Matthias Kretz To: , Subject: [PATCH 06/11] libstdc++: Minor simd_math cleanups Date: Tue, 8 Jun 2021 14:11:48 +0200 Message-ID: <2406752.iraNtQ3XgV@excalibur> Organization: GSI Helmholtzzentrum =?UTF-8?B?ZsO8cg==?= Schwerionenforschung In-Reply-To: <270527782.u9WJ3AIrlG@excalibur> References: <270527782.u9WJ3AIrlG@excalibur> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="nextPart2413898.AZ5dENo52X" Content-Transfer-Encoding: 7Bit X-Originating-IP: [140.181.3.12] X-ClientProxiedBy: srvex4.Campus.gsi.de (10.10.4.36) To srvex3.campus.gsi.de (10.10.4.16) X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00, BODY_8BITS, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP, URIBL_SBL, URIBL_SBL_A autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libstdc++@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libstdc++ mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 08 Jun 2021 12:11:52 -0000 --nextPart2413898.AZ5dENo52X Content-Transfer-Encoding: base64 Content-Type: text/plain; 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filename="0006-libstdc-Minor-simd_math-cleanups.patch" Content-Transfer-Encoding: 7Bit Content-Type: text/x-patch; charset="utf-8"; name="0006-libstdc-Minor-simd_math-cleanups.patch" diff --git a/libstdc++-v3/include/experimental/bits/simd_math.h b/libstdc++-v3/include/experimental/bits/simd_math.h index cff4371619d..a5df2039970 100644 --- a/libstdc++-v3/include/experimental/bits/simd_math.h +++ b/libstdc++-v3/include/experimental/bits/simd_math.h @@ -645,11 +645,8 @@ template return __r; } else if constexpr (__is_fixed_size_abi_v<_Abi>) - { - return {__private_init, - _Abi::_SimdImpl::_S_frexp(__data(__x), __data(*__exp))}; + return {__private_init, _Abi::_SimdImpl::_S_frexp(__data(__x), __data(*__exp))}; #if _GLIBCXX_SIMD_X86INTRIN - } else if constexpr (__have_avx512f) { constexpr size_t _Np = simd_size_v<_Tp, _Abi>; @@ -667,8 +664,8 @@ template _Abi::_CommonImpl::_S_blend(_SimdWrapper( __isnonzero), __v, __getmant_avx512(__v))}; -#endif // _GLIBCXX_SIMD_X86INTRIN } +#endif // _GLIBCXX_SIMD_X86INTRIN else { // fallback implementation @@ -749,14 +746,7 @@ template if constexpr (_Np == 1) return std::logb(__x[0]); else if constexpr (__is_fixed_size_abi_v<_Abi>) - { - return {__private_init, - __data(__x)._M_apply_per_chunk([](auto __impl, auto __xx) { - using _V = typename decltype(__impl)::simd_type; - return __data( - std::experimental::logb(_V(__private_init, __xx))); - })}; - } + return {__private_init, _Abi::_SimdImpl::_S_logb(__data(__x))}; #if _GLIBCXX_SIMD_X86INTRIN // {{{ else if constexpr (__have_avx512vl && __is_sse_ps<_Tp, _Np>()) return {__private_init, @@ -827,9 +817,7 @@ template enable_if_t, simd<_Tp, _Abi>> modf(const simd<_Tp, _Abi>& __x, simd<_Tp, _Abi>* __iptr) { - if constexpr (__is_scalar_abi<_Abi>() - || (__is_fixed_size_abi_v< - _Abi> && simd_size_v<_Tp, _Abi> == 1)) + if constexpr (simd_size_v<_Tp, _Abi> == 1) { _Tp __tmp; _Tp __r = std::modf(__x[0], &__tmp); @@ -1472,6 +1460,8 @@ template } // }}} +#undef _GLIBCXX_SIMD_CVTING2 +#undef _GLIBCXX_SIMD_CVTING3 #undef _GLIBCXX_SIMD_MATH_CALL_ #undef _GLIBCXX_SIMD_MATH_CALL2_ #undef _GLIBCXX_SIMD_MATH_CALL3_ --nextPart2413898.AZ5dENo52X--