From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id E414F3861031; Tue, 23 Mar 2021 16:26:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org E414F3861031 IronPort-SDR: DsVaKW0Tn66uljlmhivtOUaygsBOQ8o8NuBS9WH8Nc9jdkWJN9CPV9b6TWdcWcbiNWwnlSj2FB qE+V5bBoLY7A== X-IronPort-AV: E=McAfee;i="6000,8403,9932"; a="189914266" X-IronPort-AV: E=Sophos;i="5.81,272,1610438400"; d="scan'208";a="189914266" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2021 09:26:11 -0700 IronPort-SDR: c1zavJOG+3eFhT/EAibxa643G2pDQIqaEc2pFhpfgCaLMWnkPo4T1iYvn0ttLhKHDmFZFNqsuP DD0XmSngD13g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,272,1610438400"; d="scan'208";a="513807795" Received: from irsmsx605.ger.corp.intel.com ([163.33.146.138]) by fmsmga001.fm.intel.com with ESMTP; 23 Mar 2021 09:26:10 -0700 Received: from tjmaciei-mobl1.localnet (10.252.143.152) by IRSMSX605.ger.corp.intel.com (163.33.146.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Tue, 23 Mar 2021 16:26:08 +0000 From: Thiago Macieira To: Thomas Rodgers CC: , Subject: Re: [PATCH 0/3] Uncontroversial improvements to C++20 wait-related implementation Date: Tue, 23 Mar 2021 09:26:05 -0700 Message-ID: <95092538.BtUSnq0jnV@tjmaciei-mobl1> Organization: Intel Corporation In-Reply-To: <7b6c37eaf5ececeed36c027d16e44cc6@appliantology.com> References: <5409427.gSZZmAiMah@tjmaciei-mobl1> <7b6c37eaf5ececeed36c027d16e44cc6@appliantology.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Originating-IP: [10.252.143.152] X-ClientProxiedBy: orsmsx603.amr.corp.intel.com (10.22.229.16) To IRSMSX605.ger.corp.intel.com (163.33.146.138) X-Spam-Status: No, score=-3.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libstdc++@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libstdc++ mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 16:26:18 -0000 On Tuesday, 23 March 2021 08:39:43 PDT Thomas Rodgers wrote: > I will be submitting a new patch for the > atomic.wait/barrier/latch/semaphore functionality a bit later today that > subsumes the changes to atomic_wait and latch, and includes the changes > to barrier. Thanks, Thomas Is that meant to be part of GCC 11's release? If not, what do we do about preventing the future BC break and potential heisenbugs? 1) do nothing, accept they will happen silently 2) cause non-silent BC breaks 3) disable the code for now (unless explicitly opted-in) -- Thiago Macieira - thiago.macieira (AT) intel.com Software Architect - Intel DPG Cloud Engineering