[newlib-cygwin] RISC-V: Fix optimized strcmp on big endian

[newlib-cygwin] RISC-V: Fix optimized strcmp on big endian

[Corinna Vinschen]

https://sourceware.org/git/gitweb.cgi?p=newlib-cygwin.git;h=26478769a60424d54977e33febd81c0b8fb01828

commit 26478769a60424d54977e33febd81c0b8fb01828
Author: Marcus Comstedt <marcus@mc.pp.se>
Date:   Tue Feb 23 22:31:17 2021 +0100

    RISC-V: Fix optimized strcmp on big endian

Diff:
---
 newlib/libc/machine/riscv/strcmp.S | 40 ++++++++++++++++++++++++++++++++++----
 1 file changed, 36 insertions(+), 4 deletions(-)

diff --git a/newlib/libc/machine/riscv/strcmp.S b/newlib/libc/machine/riscv/strcmp.S
index eaf6d4b3c..9af9ca1f3 100644
--- a/newlib/libc/machine/riscv/strcmp.S
+++ b/newlib/libc/machine/riscv/strcmp.S
@@ -11,10 +11,6 @@
 
 #include <sys/asm.h>
 
-#if BYTE_ORDER != LITTLE_ENDIAN
-# error
-#endif
-
 .text
 .globl strcmp
 .type  strcmp, @function
@@ -96,6 +92,9 @@ strcmp:
 
 .Lmismatch:
   # words don't match, but a2 has no null byte.
+
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+
 #if __riscv_xlen == 64
   sll   a4, a2, 48
   sll   a5, a3, 48
@@ -128,6 +127,39 @@ strcmp:
   sub   a0, a4, a5
   ret
 
+#else
+
+#if __riscv_xlen == 64
+  srl   a4, a2, 48
+  srl   a5, a3, 48
+  bne   a4, a5, .Lmismatch_lower
+  srl   a4, a2, 32
+  srl   a5, a3, 32
+  bne   a4, a5, .Lmismatch_lower
+#endif
+  srl   a4, a2, 16
+  srl   a5, a3, 16
+  bne   a4, a5, .Lmismatch_lower
+
+  srl	a4, a2, 8
+  srl   a5, a3, 8
+  bne   a4, a5, 1f
+  and   a4, a2, 0xff
+  and   a5, a3, 0xff
+1:sub	a0, a4, a5
+  ret
+
+.Lmismatch_lower:
+  srl	a2, a4, 8
+  srl   a3, a5, 8
+  bne   a2, a3, 1f
+  and   a2, a4, 0xff
+  and   a3, a5, 0xff
+1:sub	a0, a2, a3
+  ret
+
+#endif
+	
 .Lmisaligned:
   # misaligned
   lbu   a2, 0(a0)