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From: Corinna Vinschen <corinna@sourceware.org> To: newlib-cvs@sourceware.org Subject: [newlib-cygwin] Fix a bug in setjmp for MIPS o32/o64 FPXX/FP64 Date: Mon, 19 Dec 2022 09:38:23 +0000 (GMT) [thread overview] Message-ID: <20221219093824.7FEB63AC869E@sourceware.org> (raw) https://sourceware.org/git/gitweb.cgi?p=newlib-cygwin.git;h=9bba9c2bdd22b2011f1fa6da36e6bc6a70af42ec commit 9bba9c2bdd22b2011f1fa6da36e6bc6a70af42ec Author: Giovanni Bajo <rasky@develer.com> AuthorDate: Sat Dec 17 15:47:23 2022 +0100 Commit: Corinna Vinschen <corinna@vinschen.de> CommitDate: Mon Dec 19 10:38:05 2022 +0100 Fix a bug in setjmp for MIPS o32/o64 FPXX/FP64 It seems there is a swapped logic in one of the subcases of setjmp.S for MIPS: when the FPU registers are 64-bit within a 32-bit aligned jmp_buf, the code realigns the pointers before doing 64-bit writes, but the branch logic is swapped: we must avoid the address adjustement when bit 2 is zero (that is, the address is already 8-byte aligned). This always triggers an address error when run, as tested on a MIPS VR4300 with O64 ABI. Diff: --- newlib/libc/machine/mips/setjmp.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/newlib/libc/machine/mips/setjmp.S b/newlib/libc/machine/mips/setjmp.S index 9a8b31d092f3..cfc1d517a04f 100644 --- a/newlib/libc/machine/mips/setjmp.S +++ b/newlib/libc/machine/mips/setjmp.S @@ -68,7 +68,7 @@ #define FPR_LAYOUT \ and $8, $4, 4; \ - bne $8, $0, 1f; \ + beq $8, $0, 1f; \ GPR_OFFSET ($31, 22); \ addiu $4, $4, -4; \ 1: \
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