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charset=utf-8 Content-Disposition: inline Hello, This patch adds support for Armv8-R AArch64. We update the AArch64 CPU boot code to work on Armv8-R if __ARM_ARCH_PROFILE is set to 'R'. Armv8-R AArch64 has no EL3, so we don't set vbar_el3, and adjust the code to set up the MPU for Armv8-R. We also add a specs file for use with Armv8-R AArch64 models. Testing: * Ran AArch64 GCC testsuite using --with-arch=armv8-r together with the new specs file and boot code in an Armv8-R AArch64 model. * Ran newlib testsuite, no regressions. OK for master? Thanks, Alex --- 2020-09-18 Alex Coplan libgloss/ChangeLog: * aarch64/Makefile.in: Install new specs file. * aarch64/cpu-init/Makefile.in: Also build boot code for Armv8-R. * aarch64/cpu-init/rdimon-aem-el3.S: Add support for Armv8-R. * aarch64/elf-aem-v8-r.specs: New. --pqscnskaszzjds3t Content-Type: text/plain; charset=utf-8 Content-Disposition: attachment; filename="patch.txt" diff --git a/libgloss/aarch64/Makefile.in b/libgloss/aarch64/Makefile.in index 546557e3c..b8c2ca43c 100644 --- a/libgloss/aarch64/Makefile.in +++ b/libgloss/aarch64/Makefile.in @@ -85,7 +85,8 @@ RDIMON_BSP = librdimon${${MULTILIBNAME}}.a RDIMON_OBJS = $(patsubst %,rdimon-%,$(OBJS)) RDIMON_SCRIPTS = rdimon${${MULTILIBNAME}}.specs \ aem-ve${${MULTILIBNAME}}.specs \ - aem-validation${${MULTILIBNAME}}.specs + aem-validation${${MULTILIBNAME}}.specs \ + aem-v8-r${${MULTILIBNAME}}.specs RDIMON_INSTALL = install-rdimon CFLAGS = -g diff --git a/libgloss/aarch64/cpu-init/Makefile.in b/libgloss/aarch64/cpu-init/Makefile.in index 08aa1760f..3ada50d64 100644 --- a/libgloss/aarch64/cpu-init/Makefile.in +++ b/libgloss/aarch64/cpu-init/Makefile.in @@ -62,7 +62,7 @@ AR = @AR@ LD = @LD@ RANLIB = @RANLIB@ -CPU_INIT_OBJS = rdimon-aem-el3.o +CPU_INIT_OBJS = rdimon-aem-el3.o rdimon-aem-v8-r.o CPU_INIT_INSTALL = install-cpu-init CFLAGS = -g @@ -79,10 +79,15 @@ all: ${CPU_INIT_OBJS} .PHONY: test test: -# Static pattern rule for assembling cpu init files to object files. -${CPU_INIT_OBJS}: %.o: %.S +rdimon-aem-el3.o : rdimon-aem-el3.S $(CC) $(CFLAGS_FOR_TARGET) $(CFLAGS) $(INCLUDES) -DARM_RDI_MONITOR -o $@ -c $< +rdimon-aem-v8-r.o : rdimon-aem-el3.S + # Force the ACLE macro __ARM_ARCH_PROFILE='R'. This should be defined by + # the compiler for compilers supporting -march=armv8-r on AArch64 but we + # want to be able to build this code with older compilers. + $(CC) $(CFLAGS_FOR_TARGET) $(CFLAGS) $(INCLUDES) -DARM_RDI_MONITOR -D__ARM_ARCH_PROFILE=82 -o $@ -c $< + clean mostlyclean: rm -f a.out core *.i *.o *-test *.srec *.dis *.x diff --git a/libgloss/aarch64/cpu-init/rdimon-aem-el3.S b/libgloss/aarch64/cpu-init/rdimon-aem-el3.S index e00f0b2c8..93dcdb353 100644 --- a/libgloss/aarch64/cpu-init/rdimon-aem-el3.S +++ b/libgloss/aarch64/cpu-init/rdimon-aem-el3.S @@ -43,7 +43,9 @@ _init_vectors: /* Installs a table of exception vectors to catch and handle all exceptions by terminating the process with a diagnostic. */ adr x0, vectors +#if __ARM_ARCH_PROFILE != 'R' msr vbar_el3, x0 +#endif msr vbar_el2, x0 msr vbar_el1, x0 ret @@ -110,6 +112,14 @@ vectors: .text .align 2 _flat_map: +#if __ARM_ARCH_PROFILE == 'R' + mrs x0, sctlr_el2 + orr x0, x0, #1 // SCTLR_EL2.M (enable MPU) + orr x0, x0, #(1 << 17) // SCTLR_EL2.BR (background regions) + msr sctlr_el2, x0 + isb + ret +#else /* Page table setup (identity mapping). */ adrp x0, ttb add x0, x0, :lo12:ttb @@ -173,6 +183,7 @@ _flat_map: isb .Lnosve: ret +#endif .data .align 12 diff --git a/libgloss/aarch64/elf-aem-v8-r.specs b/libgloss/aarch64/elf-aem-v8-r.specs new file mode 100644 index 000000000..4daeffd11 --- /dev/null +++ b/libgloss/aarch64/elf-aem-v8-r.specs @@ -0,0 +1,20 @@ +# elf-aem-v8-r.specs +# +# Spec file for AArch64 baremetal newlib, libgloss on Armv8-R with version 2 of +# AngelAPI semi-hosting. + +%rename link old_link + +*link: +-Ttext-segment 0x10000 %(old_link) + +%rename lib libc + +*libgloss: +-lrdimon + +*lib: +cpu-init/rdimon-aem-v8-r.o%s --start-group %(libc) %(libgloss) --end-group + +*startfile: +crti%O%s crtbegin%O%s %{!pg:rdimon-crt0%O%s} %{pg:rdimon-crt0%O%s} --pqscnskaszzjds3t--