[PATCH 5/8] newlib: libc: memcpy M-profile PACBTI-enablement

[Victor Do Nascimento <victor.donascimento@arm.com>]

Add function prologue/epilogue to conditionally add BTI landing pads
and/or PAC code generation & authentication instructions depending on
compilation flags.
---
 newlib/libc/machine/arm/memcpy-armv7m.S | 73 ++++++++++++++++++++++---
 1 file changed, 65 insertions(+), 8 deletions(-)

diff --git a/newlib/libc/machine/arm/memcpy-armv7m.S b/newlib/libc/machine/arm/memcpy-armv7m.S
index c8bff36f6..cdcca7c9e 100644
--- a/newlib/libc/machine/arm/memcpy-armv7m.S
+++ b/newlib/libc/machine/arm/memcpy-armv7m.S
@@ -46,6 +46,8 @@
      __OPT_BIG_BLOCK_SIZE: Size of big block in words.  Default to 64.
      __OPT_MID_BLOCK_SIZE: Size of big block in words.  Default to 16.
  */
+#include "pacbti.h"
+
 #ifndef __OPT_BIG_BLOCK_SIZE
 #define __OPT_BIG_BLOCK_SIZE (4 * 16)
 #endif
@@ -85,6 +87,8 @@
 	.global	memcpy
 	.thumb
 	.thumb_func
+	.fnstart
+	.cfi_startproc
 	.type	memcpy, %function
 memcpy:
 	@ r0: dst
@@ -93,10 +97,30 @@ memcpy:
 #ifdef __ARM_FEATURE_UNALIGNED
 	/* In case of UNALIGNED access supported, ip is not used in
 	   function body.  */
+	pacbti_prologue
 	mov	ip, r0
 #else
+#if __ARM_FEATURE_PAC_DEFAULT
+#if __ARM_FEATURE_BTI_DEFAULT
+	pacbti	ip, lr, sp
+#else
+	pac	ip, lr, sp
+#endif /* __ARM_FEATURE_BTI_DEFAULT */
+	push	{r0, ip}
+	.save	{r0, ra_auth_code}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 0, -8
+	.cfi_offset 143, -4
+#else
+#if __ARM_FEATURE_BTI_DEFAULT
+	bti
+#endif /* __ARM_FEATURE_BTI_DEFAULT */
 	push	{r0}
-#endif
+	.save	{r0}
+	.cfi_adjust_cfa_offset 4
+	.cfi_offset 0, -4
+#endif /* __ARM_FEATURE_PAC_DEFAULT */
+#endif /* __ARM_FEATURE_UNALIGNED */
 	orr	r3, r1, r0
 	ands	r3, r3, #3
 	bne	.Lmisaligned_copy
@@ -135,13 +159,13 @@ memcpy:
 	ldr	r3, [r1], #4
 	str	r3, [r0], #4
 	END_UNROLL
-#else /* __ARM_ARCH_7M__ */
+#else
 	ldr	r3, [r1, \offset]
 	str	r3, [r0, \offset]
 	END_UNROLL
 	adds    r0, __OPT_MID_BLOCK_SIZE
 	adds    r1, __OPT_MID_BLOCK_SIZE
-#endif
+#endif /* __ARM_ARCH_7M__ */
 	subs	r2, __OPT_MID_BLOCK_SIZE
 	bhs	.Lmid_block_loop
 
@@ -180,10 +204,21 @@ memcpy:
 .Ldone:
 #ifdef __ARM_FEATURE_UNALIGNED
 	mov	r0, ip
+	pacbti_epilogue
+#else
+#if __ARM_FEATURE_PAC_DEFAULT
+	pop	{r0, ra_auth_code}
+	.cfi_restore 0
+	.cfi_restore 143
+	.cfi_def_cfa_offset 0
+	aut ip, lr, sp
 #else
 	pop	{r0}
-#endif
-	bx	lr
+	.cfi_restore 0
+	.cfi_def_cfa_offset 0
+#endif /* __ARM_FEATURE_PAC_DEFAULT */
+	bx lr
+#endif /*  __ARM_FEATURE_UNALIGNED */
 
 	.align 2
 .Lmisaligned_copy:
@@ -247,6 +282,15 @@ memcpy:
 	/* dst is aligned, but src isn't.  Misaligned copy.  */
 
 	push	{r4, r5}
+	.save   {r4, r5}
+	.cfi_adjust_cfa_offset 8
+#ifdef __ARM_FEATURE_PAC_DEFAULT    /* we pushed just the pac code */
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+#else                               /* we haven't pushed anything to stack */
+	.cfi_offset 4, -8
+	.cfi_offset 5, -4
+#endif /* __ARM_FEATURE_PAC_DEFAULT */
 	subs	r2, #4
 
 	/* Backward r1 by misaligned bytes, to make r1 aligned.
@@ -299,6 +343,7 @@ memcpy:
 	adds	r2, #4
 	subs	r1, ip
 	pop	{r4, r5}
+	.cfi_adjust_cfa_offset -8
 
 #endif /* __ARM_FEATURE_UNALIGNED */
 
@@ -321,9 +366,21 @@ memcpy:
 
 #ifdef __ARM_FEATURE_UNALIGNED
 	mov	r0, ip
+	pacbti_epilogue
+#else
+#if __ARM_FEATURE_PAC_DEFAULT
+	pop	{r0, ra_auth_code}
+	.cfi_restore 0
+	.cfi_restore 143
+	.cfi_def_cfa_offset 0
+	aut ip, lr, sp
 #else
 	pop	{r0}
-#endif
-	bx	lr
-
+	.cfi_restore 0
+	.cfi_def_cfa_offset 0
+#endif /* __ARM_FEATURE_PAC_DEFAULT */
+	bx lr
+#endif /* __ARM_FEATURE_UNALIGNED */
+	.cfi_endproc
+	.fnend
 	.size	memcpy, .-memcpy
-- 
2.36.1