From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id DB87F3983004 for ; Fri, 15 May 2020 13:25:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org DB87F3983004 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: sourceware.org; spf=none smtp.mailfrom=Richard.Earnshaw@foss.arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6D1BE1042; Fri, 15 May 2020 06:25:17 -0700 (PDT) Received: from [192.168.1.19] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E4FE43F305; Fri, 15 May 2020 06:25:16 -0700 (PDT) Subject: Re: [PATCH] arm/strlen-thumb2-Os.S: Correct assembly syntax for ldrb instruction To: Keith Packard , newlib@sourceware.org References: <20200512175830.1186422-1-keithp@keithp.com> From: Richard Earnshaw Message-ID: <79529c59-9b22-9b7b-1a18-2c3f52615bdd@foss.arm.com> Date: Fri, 15 May 2020 14:25:15 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20200512175830.1186422-1-keithp@keithp.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-17.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: newlib@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Newlib mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 May 2020 13:25:28 -0000 On 12/05/2020 18:58, Keith Packard via Newlib wrote: > We want to use a post-indexed addressing mode (which means use the > original register contents as the address, then increment that > register) which is only valid in Encoding T3 of the LDRB instruction. > > According to the ARMv7-M Architecture Reference Manual, the assembly > syntax for Encoding T3 does not include the '.W' width specifier as > that is used to specify Encoding T2, presumably to provide a wider > immediate field for possible relocations. > > GAS allows the .W specifier for this addressing mode and generates > identical output with and without it. clang does not allow the .W > specifier for this addressing mode, so removing it offers wider > portability and closer adherance to the ARM assembly syntax > specification. > > Signed-off-by: Keith Packard > --- > newlib/libc/machine/arm/strlen-thumb2-Os.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/newlib/libc/machine/arm/strlen-thumb2-Os.S b/newlib/libc/machine/arm/strlen-thumb2-Os.S > index 961f41a0a..aed8adf33 100644 > --- a/newlib/libc/machine/arm/strlen-thumb2-Os.S > +++ b/newlib/libc/machine/arm/strlen-thumb2-Os.S > @@ -45,7 +45,7 @@ > > def_fn strlen p2align=1 > mov r3, r0 > -1: ldrb.w r2, [r3], #1 > +1: ldrb r2, [r3], #1 > cmp r2, #0 > bne 1b > subs r0, r3, r0 > IIRC the .w was deliberate to keep the alignment right for some subsequent instructions. LLVM's assembler needs fixing if it doesn't accept '.w'. R.