From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id D75633858C1F for ; Tue, 22 Nov 2022 16:17:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D75633858C1F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: sourceware.org; spf=none smtp.mailfrom=foss.arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 254BC1FB; Tue, 22 Nov 2022 08:17:33 -0800 (PST) Received: from [10.2.78.76] (unknown [10.2.78.76]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1A3B23F73D; Tue, 22 Nov 2022 08:17:25 -0800 (PST) Message-ID: <8cb69ba4-63dc-b490-a34d-576c2aaf94fa@foss.arm.com> Date: Tue, 22 Nov 2022 16:17:24 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH v4 6/8] newlib: libc: setjmp/longjmp M-profile PACBTI-enablement Content-Language: en-GB To: "Victor L. Do Nascimento" , newlib@sourceware.org Cc: Richard.Earnshaw@arm.com References: From: Richard Earnshaw In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3495.8 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,NICE_REPLY_A,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 26/10/2022 12:51, Victor L. Do Nascimento wrote: > Add function prologue/epilogue to conditionally add BTI landing pads > and/or PAC code generation & authentication instructions depending on > compilation flags. > --- > newlib/libc/machine/arm/setjmp.S | 33 ++++++++++++++++++++++++++++++-- > 1 file changed, 31 insertions(+), 2 deletions(-) > > diff --git a/newlib/libc/machine/arm/setjmp.S b/newlib/libc/machine/arm/setjmp.S > index 21d6ff9e7..4fe53cdf2 100644 > --- a/newlib/libc/machine/arm/setjmp.S > +++ b/newlib/libc/machine/arm/setjmp.S > @@ -157,11 +157,15 @@ SYM (.arm_start_of.\name): > .globl SYM (\name) > TYPE (\name) > SYM (\name): > + .fnstart > + .cfi_startproc > PROLOGUE \name > .endm > > .macro FUNC_END name > RET > + .cfi_endproc > + .fnend > SIZE (\name) > .endm > > @@ -173,11 +177,26 @@ SYM (\name): > > /* Save all the callee-preserved registers into the jump buffer. */ > #ifdef __thumb2__ > +#if __ARM_FEATURE_PAC_DEFAULT > +#if __ARM_FEATURE_BTI_DEFAULT > + pacbti ip, lr, sp > +#else > + pac ip, lr, sp > +#endif /* __ARM_FEATURE_BTI_DEFAULT */ > + .cfi_register 143, 12 > + mov a4, ip > + mov ip, sp > + stmea a1!, { a4, v1-v7, fp, ip, lr } So this stores an extra value in the jump buf (and also changes the offsets of the stored values). Have you checked that there's enough space for that? This might be considered an ABI break, though that's perhaps not too important in a bare-metal environment. R. > +#else > +#if __ARM_FEATURE_BTI_DEFAULT > + bti > +#endif /* __ARM_FEATURE_BTI_DEFAULT */ > mov ip, sp > stmea a1!, { v1-v7, fp, ip, lr } > +#endif /* __ARM_FEATURE_PAC_DEFAULT */ > #else > stmea a1!, { v1-v7, fp, ip, sp, lr } > -#endif > +#endif /* __thumb2__ */ > > #if 0 /* Simulator does not cope with FP instructions yet. */ > #ifndef __SOFTFP__ > @@ -200,11 +219,17 @@ SYM (\name): > > /* Restore the registers, retrieving the state when setjmp() was called. */ > #ifdef __thumb2__ > +#if __ARM_FEATURE_PAC_DEFAULT > + ldmfd a1!, { a4, v1-v7, fp, ip, lr } > + mov sp, ip > + mov ip, a4 > +#else > ldmfd a1!, { v1-v7, fp, ip, lr } > mov sp, ip > +#endif /* __ARM_FEATURE_PAC_DEFAULT */ > #else > ldmfd a1!, { v1-v7, fp, ip, sp, lr } > -#endif > +#endif /* __thumb2__ */ > > #if 0 /* Simulator does not cope with FP instructions yet. */ > #ifndef __SOFTFP__ > @@ -220,5 +245,9 @@ SYM (\name): > #endif > moveq a1, #1 > > +#if __ARM_FEATURE_PAC_DEFAULT > + aut ip, lr, sp > +#endif > + > FUNC_END longjmp > #endif