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Wed, 24 Aug 2022 10:27:11 +0000 From: "Victor L. Do Nascimento" To: CC: Subject: [PATCH v3 1/8] newlib: libc: define M-profile PACBTI-enablement macros In-Reply-To: (Victor L. Do Nascimento's message of "Wed, 24 Aug 2022 11:18:17 +0100") References: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/28.1 (gnu/linux) Date: Wed, 24 Aug 2022 11:27:11 +0100 Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-Office365-Filtering-Correlation-Id: 2888e81f-5f41-4abf-142d-08da85bb3b1b X-MS-TrafficTypeDiagnostic: DB9PR08MB8360:EE_|DBAEUR03FT005:EE_|DB9PR08MB6777:EE_ x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: QdSVjXkBBGPfIn8JQBFXhKxAuIFfPGQKRvOCsXOBmj8rPKTt7gJN+47/nVWh1MQFFJpJYEactX0LHigRBQ9R3vUPxCmP3ta/TmfzeUl3UNJf4+6LQw0QaeZNMc5SKzSeIHzvNkRppj9CtWYXcBjE3AjHweYejEohccOunrtUC6YnA24zxVzn9v3UyeKANXny3V8//ZlT3k7flAIszOxazcvBc0CrTcbrT+dJt6TBNpr3ETzTDvq19i9HT6E9dzeuKDkjldxXDKDQ7w9kvmTGIow3QuCrbQ9TdgE+cfFS1byS+WFHJU3fpBkigzrG2daVeKaC7Q/dz6FJ/RrvyJ42w2/nA1+m+UOgqce1KBQlIhoyEiptlLTgwzus8j//S5P09/JGXCxR3eEznpf2H3QurTMY2OM7GSqgPrJLFIQKd4qfA6ymiLYtb8MfQ3/PVBsIK236F+L6e41Gv2QqT5AzJLRTLO2SJr8H+Ggx9XZLlU9d/IBoxS6RnRpbvv2704rni2C/JazVijhH1nidEmwUfiVQ2N7t2dQjVF8hlWw8BDtI/dVtDsqO9/PJFKZ+PYmEeM7TlswcidVGj1gdUZk5EyL0tel1wlZ3/jb6cweoG4KdJ4yZArnlTIdBXbfL4xxHl+bau4tygFcB0hdzB4Skt8dzVNOGtU9YjdNuJH4ELW9Fot1vOLVOG/qnyqVlii5Ve2h5UlTdnz02yvd65g6n6TfDi7uiuqEXV6CWYrlEwyNN72dtMkr1EkrvWQiemRfg2fhZl1TNMT+qeUz6C4eFUiDgxBby+EIm97Qfg0Nu7aeMealLsQrL6FKbz8bZ9lfQ X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(346002)(376002)(396003)(39860400002)(136003)(46966006)(40470700004)(36840700001)(316002)(478600001)(81166007)(8936002)(82310400005)(40460700003)(70586007)(2616005)(86362001)(2906002)(70206006)(4326008)(26005)(83380400001)(186003)(8676002)(426003)(47076005)(356005)(336012)(82740400003)(41300700001)(5660300002)(36860700001)(36756003)(6916009)(40480700001)(36900700001);DIR:OUT;SFP:1101; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Aug 2022 10:27:22.3199 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2888e81f-5f41-4abf-142d-08da85bb3b1b X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT005.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6777 X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi all, This patch augments the arm_asm.h header file to provide support for PACBTI enablement via macros for hand-written assembly functions, updating both prologues/epilogues as well as cfi-related directives depending on the compile-time mbranch-protection argument values. It defines the following preprocessor macros: * HAVE_PAC_LEAF: Indicates whether pac-signing has been requested for leaf functions. * PAC_LEAF_PUSH_IP: Whether leaf functions should push the pac code to the stack irrespective of whether the ip register is clobbered in the function or not. * PAC_CFI_ADJUST: Given values for the above two parameters, this holds the calculated offset applied to default CFI address/offset values as a consequence of potentially pushing the pac-code to the stack. It also defines the following assembler macros: * prologue: In addition to pushing any callee-saved registers onto the stack, it generates any requested pacbti instructions. Pushed registers are specified via the optional `first', `last' and `savepac' macro argument parameters. when a single register number is provided, it pushes that register. When two register numbers are provided, they specify a range to save. If savepac is non-zero, the ip register is also saved. For example: prologue savepac=1 -> push {ip} prologue 1 -> push {r1} prologue 1 savepac=1 -> push {r1, ip} prologue 1 4 -> push {r1-r4} prologue 1 4 savepac=1 -> push {r1-r4, ip} * epilogue: pops registers off the stack and emits pac key signing instruction if requested. The optional `first', `last' and `savepac' function as per the prologue macro, generating a pop instead of push instruction. * cfisavelist - prologue macro helper function, generating necessary .cfi_offset directives associated with push instruction. Therefore, the net effect of calling `prologue 1 2 savepac=1' is to generate the following: push {r1-r2, ip} .cfi_adjust_cfa_offset 12 .cfi_offset 143, -12 .cfi_offset 2, -8 .cfi_offset 1, -4 * cfirestorelist - epilogue macro helper function, emitting .cfi_restore instructions prior to resetting the cfa offset. As such, calling `epilogue 1 2 savepac=1' will produce: pop {r1-r2, ip} .cfi_restore 143 .cfi_restore 2 .cfi_restore 1 .cfi_def_cfa_offset 0 Regards, Victor --- newlib/libc/machine/arm/arm_asm.h | 130 ++++++++++++++++++++++++++++++ 1 file changed, 130 insertions(+) diff --git a/newlib/libc/machine/arm/arm_asm.h b/newlib/libc/machine/arm/arm_asm.h index 2708057de..d314094c9 100644 --- a/newlib/libc/machine/arm/arm_asm.h +++ b/newlib/libc/machine/arm/arm_asm.h @@ -60,4 +60,134 @@ # define _ISA_THUMB_1 #endif +/* Check whether leaf function PAC signing has been requested in the + -mbranch-protect compile-time option. */ +#define LEAF_PROTECT_BIT 2 + +#ifdef __ARM_FEATURE_PAC_DEFAULT +# define HAVE_PAC_LEAF \ + __ARM_FEATURE_PAC_DEFAULT & (1 << LEAF_PROTECT_BIT) +#else +# define HAVE_PAC_LEAF 0 +#endif + +/* Provide default parameters for PAC-code handling in leaf-functions. */ +#ifndef PAC_LEAF_PUSH_IP +# define PAC_LEAF_PUSH_IP 0 +#endif + +#if HAVE_PAC_LEAF +# if PAC_LEAF_PUSH_IP +# define PAC_CFI_ADJ 4 +# else +# define PAC_CFI_ADJ 0 +# endif /* PAC_LEAF_PUSH_IP*/ +#else +# undef PAC_LEAF_PUSH_IP +# define PAC_LEAF_PUSH_IP 0 +# define PAC_CFI_ADJ 0 +#endif /* HAVE_PAC_LEAF */ + +#ifdef __ASSEMBLER__ +/* Emit .cfi_restore directives for a consecutive sequence of registers. */ + .macro cfirestorelist first, last + .cfi_restore \last + .if \last-\first + cfirestorelist \first, \last-1 + .endif + .endm + +/* Emit .cfi_offset directives for a consecutive sequence of registers. */ + .macro cfisavelist first, last, index=1 + .cfi_offset \last, -4*(\index) - PAC_CFI_ADJ + .if \last-\first + cfisavelist \first, \last-1, \index+1 + .endif + .endm + +/* Create a prologue entry sequence handling PAC/BTI, if required and emitting + CFI directives for generated PAC code and any pushed registers. */ + .macro prologue first=-1, last=-1, savepac=PAC_LEAF_PUSH_IP +#if HAVE_PAC_LEAF +#if __ARM_FEATURE_BTI_DEFAULT + pacbti ip, lr, sp +#else + pac ip, lr, sp +#endif /* __ARM_FEATURE_BTI_DEFAULT */ + .cfi_register 143, 12 +#else +#if __ARM_FEATURE_BTI_DEFAULT + bti +#endif /* __ARM_FEATURE_BTI_DEFAULT */ +#endif /* HAVE_PAC_LEAF */ + .if \first != -1 + .if \last != -1 + .if \savepac + push {r\first-r\last, ip} + .cfi_adjust_cfa_offset ((\last-\first)+1)*4 + PAC_CFI_ADJ + .cfi_offset 143, -PAC_CFI_ADJ + cfisavelist \first, \last + .else + push {r\first-r\last} + .cfi_adjust_cfa_offset ((\last-\first)+1)*4 + cfisavelist \first, \last + .endif + .else + .if \savepac + push {r\first, ip} + .cfi_adjust_cfa_offset 4 + PAC_CFI_ADJ + .cfi_offset 143, -PAC_CFI_ADJ + cfisavelist \first, \first + .else // !\savepac + push {r\first} + .cfi_adjust_cfa_offset PAC_CFI_ADJ + cfisavelist \first, \first + .endif + .endif + .else // \first == -1 + .if \savepac + push {ip} + .cfi_adjust_cfa_offset PAC_CFI_ADJ + .cfi_offset 143, -PAC_CFI_ADJ + .endif + .endif + .endm + +/* Create an epilogue exit sequence handling PAC/BTI, if required and emitting + CFI directives for all restored registers. */ + .macro epilogue first=-1, last=-1, savepac=PAC_LEAF_PUSH_IP + .if \first != -1 + .if \last != -1 + .if \savepac + pop {r\first-r\last, ip} + .cfi_restore 143 + cfirestorelist \first, \last + .else + pop {r\first-r\last} + cfirestorelist \first, \last + .endif + .else + .if \savepac + pop {r\first, ip} + .cfi_restore 143 + cfirestorelist \first, \first + .else + pop {r\first} + cfirestorelist \first, \first + .endif + .endif + .else + .if \savepac + pop {ip} + .cfi_restore 143 + .endif + .endif + .cfi_def_cfa_offset 0 +#if HAVE_PAC_LEAF + aut ip, lr, sp +#endif /* HAVE_PAC_LEAF */ + bx lr + .endm +#endif /* __ASSEMBLER__ */ + #endif /* ARM_ASM__H */ -- 2.36.1