From: "Victor L. Do Nascimento" <victor.donascimento@arm.com>
To: <newlib@sourceware.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: [PATCH v5 5/8] newlib: libc: memcpy M-profile PACBTI-enablement
Date: Wed, 21 Dec 2022 11:25:36 +0000 [thread overview]
Message-ID: <yw8jh6xphubz.fsf_-_@arm.com> (raw)
In-Reply-To: <d8134a62-c720-63ec-6dc2-0aa30ea629f8@arm.com> (Victor Do Nascimento's message of "Wed, 21 Dec 2022 11:03:41 +0000")
Add function prologue/epilogue to conditionally add BTI landing pads
and/or PAC code generation & authentication instructions depending on
compilation flags.
---
newlib/libc/machine/arm/memcpy-armv7m.S | 33 ++++++++++++++++++-------
1 file changed, 24 insertions(+), 9 deletions(-)
diff --git a/newlib/libc/machine/arm/memcpy-armv7m.S b/newlib/libc/machine/arm/memcpy-armv7m.S
index c8bff36f6..ec1ad6485 100644
--- a/newlib/libc/machine/arm/memcpy-armv7m.S
+++ b/newlib/libc/machine/arm/memcpy-armv7m.S
@@ -46,6 +46,8 @@
__OPT_BIG_BLOCK_SIZE: Size of big block in words. Default to 64.
__OPT_MID_BLOCK_SIZE: Size of big block in words. Default to 16.
*/
+#include "arm_asm.h"
+
#ifndef __OPT_BIG_BLOCK_SIZE
#define __OPT_BIG_BLOCK_SIZE (4 * 16)
#endif
@@ -85,6 +87,8 @@
.global memcpy
.thumb
.thumb_func
+ .fnstart
+ .cfi_startproc
.type memcpy, %function
memcpy:
@ r0: dst
@@ -93,10 +97,11 @@ memcpy:
#ifdef __ARM_FEATURE_UNALIGNED
/* In case of UNALIGNED access supported, ip is not used in
function body. */
+ prologue push_ip=HAVE_PAC_LEAF
mov ip, r0
#else
- push {r0}
-#endif
+ prologue 0 push_ip=HAVE_PAC_LEAF
+#endif /* __ARM_FEATURE_UNALIGNED */
orr r3, r1, r0
ands r3, r3, #3
bne .Lmisaligned_copy
@@ -178,15 +183,17 @@ memcpy:
#endif /* __ARM_FEATURE_UNALIGNED */
.Ldone:
+ .cfi_remember_state
#ifdef __ARM_FEATURE_UNALIGNED
mov r0, ip
+ epilogue push_ip=HAVE_PAC_LEAF
#else
- pop {r0}
-#endif
- bx lr
+ epilogue 0 push_ip=HAVE_PAC_LEAF
+#endif /* __ARM_FEATURE_UNALIGNED */
.align 2
.Lmisaligned_copy:
+ .cfi_restore_state
#ifdef __ARM_FEATURE_UNALIGNED
/* Define label DST_ALIGNED to BIG_BLOCK. It will go to aligned copy
once destination is adjusted to aligned. */
@@ -247,6 +254,9 @@ memcpy:
/* dst is aligned, but src isn't. Misaligned copy. */
push {r4, r5}
+ .cfi_adjust_cfa_offset 8
+ .cfi_rel_offset 4, 0
+ .cfi_rel_offset 5, 4
subs r2, #4
/* Backward r1 by misaligned bytes, to make r1 aligned.
@@ -299,6 +309,9 @@ memcpy:
adds r2, #4
subs r1, ip
pop {r4, r5}
+ .cfi_restore 4
+ .cfi_restore 5
+ .cfi_adjust_cfa_offset -8
#endif /* __ARM_FEATURE_UNALIGNED */
@@ -321,9 +334,11 @@ memcpy:
#ifdef __ARM_FEATURE_UNALIGNED
mov r0, ip
+ epilogue push_ip=HAVE_PAC_LEAF
#else
- pop {r0}
-#endif
- bx lr
-
+ epilogue 0 push_ip=HAVE_PAC_LEAF
+#endif /* __ARM_FEATURE_UNALIGNED */
+ .cfi_endproc
+ .cantunwind
+ .fnend
.size memcpy, .-memcpy
--
2.36.1
next prev parent reply other threads:[~2022-12-21 11:25 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-21 11:03 [PATCH v5 0/8] Implement assembly cortex-M PACBTI functionality Victor Do Nascimento
2022-12-21 11:19 ` [PATCH v5 1/8] newlib: libc: define M-profile PACBTI-enablement macros Victor L. Do Nascimento
2023-01-06 10:42 ` Christophe Lyon
2023-01-06 20:51 ` Victor Do Nascimento
2023-01-09 9:33 ` Christophe Lyon
2022-12-21 11:21 ` [PATCH v5 2/8] newlib: libc: strcmp M-profile PACBTI-enablement Victor L. Do Nascimento
2023-01-06 11:09 ` Christophe Lyon
2023-01-06 21:35 ` Victor Do Nascimento
2022-12-21 11:22 ` [PATCH v5 3/8] newlib: libc: strlen " Victor L. Do Nascimento
2022-12-21 11:24 ` [PATCH v5 4/8] newlib: libc: memchr " Victor L. Do Nascimento
2022-12-21 11:25 ` Victor L. Do Nascimento [this message]
2022-12-21 11:27 ` [PATCH v5 6/8] newlib: libc: aeabi_memmove " Victor L. Do Nascimento
2022-12-21 11:28 ` [PATCH v5 7/8] newlib: libc: aeabi_memset " Victor L. Do Nascimento
2022-12-21 11:42 ` [PATCH v5 8/8] newlib: libc: setjmp " Victor L. Do Nascimento
2023-01-05 16:53 ` Richard Earnshaw
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