From: "Victor L. Do Nascimento" <victor.donascimento@arm.com>
To: <newlib@sourceware.org>
Cc: <Richard.Earnshaw@arm.com>
Subject: [PATCH v4 6/8] newlib: libc: setjmp/longjmp M-profile PACBTI-enablement
Date: Wed, 26 Oct 2022 12:51:31 +0100 [thread overview]
Message-ID: <yw8jlep2kdks.fsf@arm.com> (raw)
In-Reply-To: <yw8jbkpylste.fsf@arm.com> (Victor L. Do Nascimento's message of "Wed, 26 Oct 2022 12:37:01 +0100")
Add function prologue/epilogue to conditionally add BTI landing pads
and/or PAC code generation & authentication instructions depending on
compilation flags.
---
newlib/libc/machine/arm/setjmp.S | 33 ++++++++++++++++++++++++++++++--
1 file changed, 31 insertions(+), 2 deletions(-)
diff --git a/newlib/libc/machine/arm/setjmp.S b/newlib/libc/machine/arm/setjmp.S
index 21d6ff9e7..4fe53cdf2 100644
--- a/newlib/libc/machine/arm/setjmp.S
+++ b/newlib/libc/machine/arm/setjmp.S
@@ -157,11 +157,15 @@ SYM (.arm_start_of.\name):
.globl SYM (\name)
TYPE (\name)
SYM (\name):
+ .fnstart
+ .cfi_startproc
PROLOGUE \name
.endm
.macro FUNC_END name
RET
+ .cfi_endproc
+ .fnend
SIZE (\name)
.endm
@@ -173,11 +177,26 @@ SYM (\name):
/* Save all the callee-preserved registers into the jump buffer. */
#ifdef __thumb2__
+#if __ARM_FEATURE_PAC_DEFAULT
+#if __ARM_FEATURE_BTI_DEFAULT
+ pacbti ip, lr, sp
+#else
+ pac ip, lr, sp
+#endif /* __ARM_FEATURE_BTI_DEFAULT */
+ .cfi_register 143, 12
+ mov a4, ip
+ mov ip, sp
+ stmea a1!, { a4, v1-v7, fp, ip, lr }
+#else
+#if __ARM_FEATURE_BTI_DEFAULT
+ bti
+#endif /* __ARM_FEATURE_BTI_DEFAULT */
mov ip, sp
stmea a1!, { v1-v7, fp, ip, lr }
+#endif /* __ARM_FEATURE_PAC_DEFAULT */
#else
stmea a1!, { v1-v7, fp, ip, sp, lr }
-#endif
+#endif /* __thumb2__ */
#if 0 /* Simulator does not cope with FP instructions yet. */
#ifndef __SOFTFP__
@@ -200,11 +219,17 @@ SYM (\name):
/* Restore the registers, retrieving the state when setjmp() was called. */
#ifdef __thumb2__
+#if __ARM_FEATURE_PAC_DEFAULT
+ ldmfd a1!, { a4, v1-v7, fp, ip, lr }
+ mov sp, ip
+ mov ip, a4
+#else
ldmfd a1!, { v1-v7, fp, ip, lr }
mov sp, ip
+#endif /* __ARM_FEATURE_PAC_DEFAULT */
#else
ldmfd a1!, { v1-v7, fp, ip, sp, lr }
-#endif
+#endif /* __thumb2__ */
#if 0 /* Simulator does not cope with FP instructions yet. */
#ifndef __SOFTFP__
@@ -220,5 +245,9 @@ SYM (\name):
#endif
moveq a1, #1
+#if __ARM_FEATURE_PAC_DEFAULT
+ aut ip, lr, sp
+#endif
+
FUNC_END longjmp
#endif
--
2.36.1
next prev parent reply other threads:[~2022-10-26 11:51 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-26 11:37 [PATCH v4 0/8] Implement assembly cortex-M PACBTI functionality Victor L. Do Nascimento
2022-10-26 11:45 ` [PATCH v4 1/8] newlib: libc: define M-profile PACBTI-enablement macros Victor L. Do Nascimento
2022-11-22 15:04 ` Richard Earnshaw
2022-10-26 11:46 ` [PATCH v4 2/8] newlib: libc: strcmp M-profile PACBTI-enablement Victor L. Do Nascimento
2022-11-22 15:04 ` Richard Earnshaw
2022-10-26 11:47 ` [PATCH v4 3/8] newlib: libc: strlen " Victor L. Do Nascimento
2022-11-22 15:20 ` Richard Earnshaw
2022-10-26 11:49 ` [PATCH v4 4/8] newlib: libc: memchr " Victor L. Do Nascimento
2022-11-22 15:33 ` Richard Earnshaw
2022-10-26 11:50 ` [PATCH v4 5/8] newlib: libc: memcpy " Victor L. Do Nascimento
2022-11-22 16:03 ` Richard Earnshaw
2022-10-26 11:51 ` Victor L. Do Nascimento [this message]
2022-11-22 16:17 ` [PATCH v4 6/8] newlib: libc: setjmp/longjmp " Richard Earnshaw
2022-10-26 11:52 ` [PATCH v4 7/8] newlib: libc: aeabi_memmove " Victor L. Do Nascimento
2022-11-22 16:18 ` Richard Earnshaw
2022-10-26 11:53 ` [PATCH v4 8/8] newlib: libc: aeabi_memset " Victor L. Do Nascimento
2022-11-22 16:19 ` Richard Earnshaw
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