From: "Victor L. Do Nascimento" <victor.donascimento@arm.com>
To: <newlib@sourceware.org>
Cc: <Richard.Earnshaw@arm.com>
Subject: [PATCH v3 5/8] newlib: libc: memcpy M-profile PACBTI-enablement
Date: Wed, 24 Aug 2022 11:36:19 +0100 [thread overview]
Message-ID: <yw8jr1160vz0.fsf@arm.com> (raw)
In-Reply-To: <yw8jedx62bdi.fsf@arm.com> (Victor L. Do Nascimento's message of "Wed, 24 Aug 2022 11:18:17 +0100")
Hi all,
This adds function prologue/epilogue to conditionally add BTI landing
pads and/or PAC code generation & authentication instructions depending
on compilation flags.
Regards,
Victor
---
newlib/libc/machine/arm/memcpy-armv7m.S | 35 +++++++++++++++++--------
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/newlib/libc/machine/arm/memcpy-armv7m.S b/newlib/libc/machine/arm/memcpy-armv7m.S
index c8bff36f6..793989d36 100644
--- a/newlib/libc/machine/arm/memcpy-armv7m.S
+++ b/newlib/libc/machine/arm/memcpy-armv7m.S
@@ -46,6 +46,8 @@
__OPT_BIG_BLOCK_SIZE: Size of big block in words. Default to 64.
__OPT_MID_BLOCK_SIZE: Size of big block in words. Default to 16.
*/
+#include "arm_asm.h"
+
#ifndef __OPT_BIG_BLOCK_SIZE
#define __OPT_BIG_BLOCK_SIZE (4 * 16)
#endif
@@ -85,6 +87,8 @@
.global memcpy
.thumb
.thumb_func
+ .fnstart
+ .cfi_startproc
.type memcpy, %function
memcpy:
@ r0: dst
@@ -93,10 +97,11 @@ memcpy:
#ifdef __ARM_FEATURE_UNALIGNED
/* In case of UNALIGNED access supported, ip is not used in
function body. */
+ prologue savepac=HAVE_PAC_LEAF
mov ip, r0
#else
- push {r0}
-#endif
+ prologue 0 savepac=HAVE_PAC_LEAF
+#endif /* __ARM_FEATURE_UNALIGNED */
orr r3, r1, r0
ands r3, r3, #3
bne .Lmisaligned_copy
@@ -135,13 +140,13 @@ memcpy:
ldr r3, [r1], #4
str r3, [r0], #4
END_UNROLL
-#else /* __ARM_ARCH_7M__ */
+#else
ldr r3, [r1, \offset]
str r3, [r0, \offset]
END_UNROLL
adds r0, __OPT_MID_BLOCK_SIZE
adds r1, __OPT_MID_BLOCK_SIZE
-#endif
+#endif /* __ARM_ARCH_7M__ */
subs r2, __OPT_MID_BLOCK_SIZE
bhs .Lmid_block_loop
@@ -180,10 +185,10 @@ memcpy:
.Ldone:
#ifdef __ARM_FEATURE_UNALIGNED
mov r0, ip
+ epilogue savepac=HAVE_PAC_LEAF
#else
- pop {r0}
-#endif
- bx lr
+ epilogue 0 savepac=HAVE_PAC_LEAF
+#endif /* __ARM_FEATURE_UNALIGNED */
.align 2
.Lmisaligned_copy:
@@ -247,6 +252,9 @@ memcpy:
/* dst is aligned, but src isn't. Misaligned copy. */
push {r4, r5}
+ .cfi_adjust_cfa_offset 8
+ .cfi_offset 4, -(8+PAC_CFI_ADJ)
+ .cfi_offset 5, -(4+PAC_CFI_ADJ)
subs r2, #4
/* Backward r1 by misaligned bytes, to make r1 aligned.
@@ -299,6 +307,9 @@ memcpy:
adds r2, #4
subs r1, ip
pop {r4, r5}
+ .cfi_restore 4
+ .cfi_restore 5
+ .cfi_adjust_cfa_offset -8
#endif /* __ARM_FEATURE_UNALIGNED */
@@ -321,9 +332,11 @@ memcpy:
#ifdef __ARM_FEATURE_UNALIGNED
mov r0, ip
+ epilogue savepac=HAVE_PAC_LEAF
#else
- pop {r0}
-#endif
- bx lr
-
+ epilogue 0 savepac=HAVE_PAC_LEAF
+#endif /* __ARM_FEATURE_UNALIGNED */
+ .cfi_endproc
+ .cantunwind
+ .fnend
.size memcpy, .-memcpy
--
2.36.1
next prev parent reply other threads:[~2022-08-24 10:36 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-24 10:18 [PATCH v3 0/8] Implement assembly cortex-M PACBTI functionality Victor L. Do Nascimento
2022-08-24 10:27 ` [PATCH v3 1/8] newlib: libc: define M-profile PACBTI-enablement macros Victor L. Do Nascimento
2022-08-24 10:30 ` [PATCH v3 2/8] newlib: libc: strcmp M-profile PACBTI-enablement Victor L. Do Nascimento
2022-08-24 10:33 ` [PATCH v3 3/8] newlib: libc: strlen " Victor L. Do Nascimento
2022-08-24 10:34 ` [PATCH v3 4/8] newlib: libc: memchr " Victor L. Do Nascimento
2022-08-24 10:36 ` Victor L. Do Nascimento [this message]
2022-08-24 10:38 ` [PATCH v3 6/8] newlib: libc: setjmp/longjmp " Victor L. Do Nascimento
2022-08-24 10:40 ` [PATCH v3 7/8] newlib: libc: aeabi_memmove " Victor L. Do Nascimento
2022-08-24 10:41 ` [PATCH v3 8/8] newlib: libc: aeabi_memset " Victor L. Do Nascimento
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