From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30522 invoked by alias); 28 Nov 2011 17:11:43 -0000 Received: (qmail 30494 invoked by uid 22791); 28 Nov 2011 17:11:41 -0000 X-SWARE-Spam-Status: No, hits=-1.6 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SARE_LWSHORTT,TW_FX X-Spam-Check-By: sourceware.org Received: from mail3.caviumnetworks.com (HELO mail3.caviumnetworks.com) (12.108.191.235) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 28 Nov 2011 17:11:28 +0000 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 28 Nov 2011 09:12:54 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 28 Nov 2011 09:11:27 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 28 Nov 2011 09:11:27 -0800 Message-ID: <4ED3C0BF.1020307@caviumnetworks.com> Date: Mon, 28 Nov 2011 17:11:00 -0000 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: Andrew Pinski , overseers@sourceware.org CC: "Daney, David" , "binutils@sourceware.org" , "rdsandiford@googlemail.com" Subject: Re: [MIPS] Add saa and saad instructions for octeon References: <87d3ctwbst.fsf@firetop.home> <878vnhwbql.fsf@firetop.home> <4EC2A48B.10802@caviumnetworks.com> <87aa7xut5n.fsf@firetop.home> <877h2yy317.fsf@firetop.home> <87sjlds0si.fsf@firetop.home> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Mailing-List: contact overseers-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: , Sender: overseers-owner@sourceware.org X-SW-Source: 2011-q4/txt/msg00050.txt.bz2 On 11/24/2011 02:58 PM, Andrew Pinski wrote: > On Thu, Nov 24, 2011 at 12:50 PM, Richard Sandiford > wrote: >> Andrew Pinski writes: >>> bfd/ChangeLog: >>> * archures.c (bfd_mach_mips_octeonp): New macro. >>> * bfd-in2.h: Regenerate. >>> * bfd/cpu-mips.c (I_mipsocteonp): New enum value. >>> (arch_info_struct): Add bfd_mach_mips_octeonp. >>> * elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp. >>> (mips_mach_extensions): Add bfd_mach_mips_octeonp. >>> >>> gas/ChangeLog: >>> * config/tc-mips.c (CPU_IS_OCTEON): New macro function. >>> (CPU_HAS_SEQ): Change to use CPU_IS_OCTEON. >>> (NO_ISA_COP): Likewise. >>> (macro): Add support when off0 is true. >>> Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB. >>> (mips_cpu_info_table): Add octeon+. >>> * doc/c-mips.texi: Document octeon+ as an acceptable value for -march= >>> >>> gas/testsuite/ChangeLog >>> * gas/mips/mips.exp: Add octeon+ for an architecture. >>> Run octeon-saa-saad test. >>> (run_dump_test_arch): For Octeon architectures, also try octeon@. >>> * gas/mips/octeon-pref.d: Remove -march=octeon from command line. >>> * gas/mips/octeon.d: Likewise. >>> * gas/mips/octeon-saa-saad.d: New file. >>> * gas/mips/octeon-saa-saad.s: New file >>> >>> include/opcode/ChangeLog: >>> * mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP. >>> (INSN_OCTEONP): New macro. >>> (CPU_OCTEONP): New macro. >>> (OPCODE_IS_MEMBER): Add Octeon+. >>> (M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values. >>> >>> opcodes/ChangeLog: >>> * mips-dis.c (mips_arch_choices): Add Octeon+. >>> * mips-opc.c (IOCT): Include Octeon+. >>> (IOCTP): New macro. >>> (mips_builtin_opcodes): Add "saa" and "saad". >> >> OK, thanks. Please run the binutils testsuite for a mips*-linux-gnu [...] > > Can you apply the patch since I don't have write cvs access yet or can > I receive write CVS access? > It would be best to grant Andrew write access I think, as there are more patches to come. In the short term, I can commit the patch if that would make things easier. David Daney