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From: dj@sourceware.org
To: sid-cvs@sourceware.org
Subject: src/sid/component/cgen-cpu/mep ChangeLog mep-c ...
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CVSROOT:	/cvs/src
Module name:	src
Changes by:	dj@sourceware.org	2009-05-22 17:37:44

Modified files:
	sid/component/cgen-cpu/mep: ChangeLog mep-cop1-16-decode.cxx 
	                            mep-cop1-16-decode.h 
	                            mep-cop1-16-model.cxx 
	                            mep-cop1-16-model.h 
	                            mep-cop1-16-sem.cxx 
	                            mep-cop1-64-decode.cxx 
	                            mep-cop1-64-decode.h 
	                            mep-cop1-64-model.cxx 
	                            mep-cop1-64-model.h 
	                            mep-cop1-64-sem.cxx 

Log message:
	[cgen]
	
	* cpu/mep.opc (mep_examine_ivc2_insns): Fix bug in ivc2 decoder.
	(mep_config_map): Regenerate.
	
	* cpu/mep-ivc2.cpu (h-ccr-ivc2): Add generic names as well as
	ivc2-specific names.
	(simm8p20): New.
	(cmovc): move to after field definitions, use ivc2-specific
	register names.
	(cpmovi_b_P0S_P1): New.
	
	[utils/mep]
	
	* mepcfgtool.c (do_cgen_config_opc): Propagate endianness and VLIW
	size to default configuration.
	
	[sid/component/cgen-cpu/mep]
	
	* mep-cop1-16-decode.cxx: Regenerate.
	* mep-cop1-16-decode.h: Regenerate.
	* mep-cop1-16-model.cxx: Regenerate.
	* mep-cop1-16-model.h: Regenerate.
	* mep-cop1-16-sem.cxx: Regenerate.
	* mep-cop1-64-decode.cxx: Regenerate.
	* mep-cop1-64-decode.h: Regenerate.
	* mep-cop1-64-model.cxx: Regenerate.
	* mep-cop1-64-model.h: Regenerate.
	* mep-cop1-64-sem.cxx: Regenerate.
	
	[opcodes]
	
	* mep-asm.c: Regenerate.
	* mep-desc.c: Regenerate.
	* mep-desc.h: Regenerate.
	* mep-dis.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/ChangeLog.diff?cvsroot=src&r1=1.7&r2=1.8
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-16-decode.cxx.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-16-decode.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-16-model.cxx.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-16-model.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-16-sem.cxx.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-64-decode.cxx.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-64-decode.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-64-model.cxx.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-64-model.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-64-sem.cxx.diff?cvsroot=src&r1=1.1&r2=1.2