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* [patch][rfc] sh64: Add Pipeline Modelling and SID Support
@ 2006-08-22 18:21 Dave Brolley
  2006-08-22 18:34 ` Michael Snyder
  2006-10-18 18:08 ` Dave Brolley
  0 siblings, 2 replies; 3+ messages in thread
From: Dave Brolley @ 2006-08-22 18:21 UTC (permalink / raw)
  To: cgen; +Cc: gdb-patches, sid

[-- Attachment #1: Type: text/plain, Size: 1014 bytes --]

I would like to commit this patch which does the following for the sh64 
target:

1) Add support for generating a SID simulator.
2) Add pipeline modelling for all sh machines (currently used only by SID).
3) Adds support for some previously unsupported insns (both SID and 
sim/sh64).

I will submit the changes needed for sim/sh64 and sid separately. The 
sim/sh simulator is currently not generated by CGEN.

NOTES:
o This is a patch against the existing sh.cpu, sh64-compact.cpu and 
sh64-media.cpu in the cgen/cpu directory and which are currently used to 
generate the sh64 simulator in sim/sh64. .cpu files also exist in the  
cpu directory, but they appear to be out of date compared to the ones in 
cgen/cpu. Any clarification regarding which files are being actively 
maintained would be much appreciated!

o The new files sh-sid.cpu and sh-sim.cpu provide pmacros for handling 
the differences between generating sid and sim.

Comments, concerns and, ultimately, approval to commit please!

Thanks,
Dave

[-- Attachment #2: cgen-sh.ChangeLog --]
[-- Type: text/plain, Size: 4317 bytes --]

2006-08-22  Dave Brolley  <brolley@redhat.com>

	* Contribute the following changes which add sid support as well as
	pipeline modeling for all sh machines (used by sid). In addition, some
	previously unsupported insns are now supported by both sim and sid.

	2006-07-11  Dave Brolley  <brolley@redhat.com>

	* cpu/sh64-compact.cpu (movual, movual2): New insns.
	(movcol): New insn.
	* cpu/sh.cpu (sh4a-nofpu-models): New pmacro.
	* sid.scm (-op-gen-delayed-set-maybe-trace): If delay used, note the
	hardware or memory mode which was used.
	* sid-cpu.scm (hw-need-write-stack?): New function.
	(-gen-hw-stream-and-destream-fns): Compute stack-regs. Use it to
	identify hardware which uses write stacks.
	(useful-mode-names): Renamed to write-stack-memory-mode-names.
	Initialized to an empty list.
	(-gen-writestacks, -gen-reset-fn, -gen-unified-write-fn): Use
	hw-need-write-stack?.
	* hardware.scm (used-in-delay-rtl?): New member of <hardware-base>.
	(define-getters <hardware-base>): Define used-in-delay-rtl?.
	(used-in-delay-rtl?): New method of <hardware-base>.
	(hw-used-in-delay-rtl?): New function.

	2006-06-20  Dave Brolley  <brolley@redhat.com>

	* sid.scm (gen-attr-type): Removed.
	* cpu/sh.cpu (SH2a-nofpu-MACH): Add sh5.
	(SH2a-MACH): Add sh5.
	(sh2a-nofpu-models): Add units for sh5.
	(sh2a-fpu-models): Likewise.

	2006-06-15  Dave Brolley  <brolley@redhat.com>

	* cpu/sh-sim.cpu: New file.
	* cpu/sh-sid.cpu: New file.
	* cpu/sh64-media.cpu (dshci): Add xtiming argument and splice it in.
	(All fields): Remap for (insn-lsb0? #f)
	(All insns): Add timing specs.
	* cpu/sh64-compact.cpu (dshcf,dshcop): Replace 'ignored' argument with
	'xattrs' and .splice it in.
	(32-BIT-INSN,SH4-GROUP,SH4A-GROUP): New insn attributes.
	(h-frc,h-drc): Add PROFILE attribute.
	(h-fpccr): Removed.
	(h-vbr): New hardware.
	(All fields): Remap for (insn-lsb0? #f)
	(f-imm20-hi,f-imm20-lo,f-imm20): New fields.
	(fr0,fmovm,fmovn,imm20,imm12x4,imm12x8,vbr): New operands.
	(fpscr): Use h-fpscr.
	(fsdm,fsdn): Use h-fsd.
	(dshci): Add xtiming argument and splice it in.
	(dr,xd): pmacros removed.
	(All insns): Add timing specs, *-MACH attribibutes,
	SH4{A}-GROUP attributes.
	(divu,mulr,ldc-vbr,ldc-sr,ldcl-vbr,movl12,movl13,stcl-vbr): New insns.
	* cpu/sh.cpu): Include sh-sid.cpu or sh-sim.cpu depending on whether
	we're being processed for sim or sid.
	(define-arch): Change insn-lsb0? for #f. Add machs sh2e, sh2a-fpu,
	sh2a-nofpu, sh4-nofpu, sh4a-nofpu, sh4a, sh4al.
	(define-isa compact): Add (isa-parallel-insns 2).
	(define-isa media): Add (isa-parallel-insns 2). Add
	(default-insn-word-bitsize 32). Change base-insn-bitsize to 32.
	(define-mach): Add sh2e, sh2a-fpu, sh2a-nofpu, sh4-nofpu, sh4a-nofpu,
	sh4a, sh4al
	(SH2-MACH, SH2e-MACH, SH2a-nofpu-MACH, SH2a-MACH, SH3-MACH) 
	(SH3e-MACH, SH4-nofpu-MACH, SH4-MACH, SH4a-nofpu-MACH, SH4a-MACH) 
	(SH4al-MACH, SH5-MACH): New pmacros.
	(common-units, common-fp-units, sh2a-nofpu-units, sh2a-fpu-units) 
	(sh4-nofpu-units, sh4-common-fp-units, sh5-media-units) 
	(sh5-media-fp-units, common-model, common-model-with-fp) 
	(sh3-model, sh3e-model): New pmacros.
	(define-model sh2): New model.
	(define-model sh2e): New model.
	(define-model sh3): New model.
	(define-model sh3e): New model.
	(define-model sh2a-nofpu): New model.
	(define-model sh2a-fpu): New model.
	(define-model sh4-nofpu): New model.
	(define-model sh4): New model.
	(define-model sh4a-nofpu): New model.
	(define-model sh4a): New model.
	(define-model sh4al): New model.
	(define-model sh5-media): New model.
	(define-model sh5): Add all units.
	(all-models, sh2e-models, sh2a-nofpu-models, sh2a-fpu-models) 
	(sh3-models, sh3e-models, sh4-nofpu-models, sh4-models) 
	(sh5-media-models, shad-models, fsqrt-models): New pmacros.
	(h-pc): Add PROFILE attribute.
	(h-fr): Likewise.
	(h-tr): Likewise.
	(h-gr,h-grc): Likewise.
	(h-cr): Set h-sr in setter.
	(h-frbit): Get/Set h-fpscr.
	(h-szbit,h-prbit): Likewise.
	(h-fp): Add PROFILE attribute. Now indexed by even indices 0-62.
	Add getter and setter.
	(h-fc): Add PROFILE attribute. Now indexed by quad indices 0-60.
	Adjust getter and setter.
	(h-fmtx): Add PROFILE attribute. Now indexed by 0, 16, 32 and 48.
	Adjust getter and setter.
	(h-dr): Add PROFILE attribute. Now indexed by even indices 0-62.
	(h-fsd,h-fmov): New hardware.


[-- Attachment #3: cgen-sh.patch.txt --]
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? cgen/cpu/sh-sid.cpu
? cgen/cpu/sh-sim.cpu
Index: cgen/cpu/sh.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/sh.cpu,v
retrieving revision 1.3
diff -c -p -r1.3 sh.cpu
*** cgen/cpu/sh.cpu	21 May 2003 14:10:46 -0000	1.3
--- cgen/cpu/sh.cpu	22 Aug 2006 17:22:26 -0000
***************
*** 1,15 ****
  ; Renesas / SuperH SH architecture description.  -*- Scheme -*-
! ; Copyright (C) 2000, 2001 Red Hat, Inc.
  ; This file is part of CGEN.
  ; See file COPYING.CGEN for details.
  
  (include "simplify.inc")
  
  (define-arch
    (name sh)
    (comment "Renesas / SuperH SuperH (SH)")
!   (insn-lsb0? #t)
!   (machs sh2 sh3 sh3e sh4 sh5)
    (isas compact media)
  )
  
--- 1,25 ----
  ; Renesas / SuperH SH architecture description.  -*- Scheme -*-
! ; Copyright (C) 2000, 2001, 2006 Red Hat, Inc.
  ; This file is part of CGEN.
  ; See file COPYING.CGEN for details.
  
  (include "simplify.inc")
  
+ ; Macros to handle differences in CGEN for SID vs SIM are included
+ ; here.
+ (if (application-is? SID-SIMULATOR)
+     (include "sh-sid.cpu")
+     (include "sh-sim.cpu"))
+ 
  (define-arch
    (name sh)
    (comment "Renesas / SuperH SuperH (SH)")
!   ; Should be #t but cgen can't handle variable length insns with #t
!   (insn-lsb0? #f)
!   (machs sh2 sh2e sh2a-fpu sh2a-nofpu
! 	 sh3 sh3e
! 	 sh4-nofpu sh4 sh4a-nofpu sh4a sh4al
! 	 sh5)
    (isas compact media)
  )
  
***************
*** 20,31 ****
    (name media)
    (comment "SHmedia 32-bit instruction set")
    (base-insn-bitsize 32)
  )
  
  (define-isa
    (name compact)
!   (comment "SHcompact 16-bit instruction set")
!   (base-insn-bitsize 16)
  )
  
  \f
--- 30,46 ----
    (name media)
    (comment "SHmedia 32-bit instruction set")
    (base-insn-bitsize 32)
+   ; not really parallel but some operands are shared between
+   ; the ISAs and CGEN wants them all to be marked as parallel.
+   (isa-parallel-insns 2)
  )
  
  (define-isa
    (name compact)
!   (comment "SHcompact 16/32 bit instruction set")
!   (default-insn-word-bitsize 32)
!   (base-insn-bitsize 32)
!   (isa-parallel-insns 2)
  )
  
  \f
***************
*** 47,52 ****
--- 62,88 ----
  )
  
  (define-mach
+   (name sh2e)
+   (comment "SH-2e CPU core")
+   (cpu sh64)
+   (isas compact)
+ )
+ 
+ (define-mach
+   (name sh2a-fpu)
+   (comment "SH-2a CPU core with fpu")
+   (cpu sh64)
+   (isas compact)
+ )
+ 
+ (define-mach
+   (name sh2a-nofpu)
+   (comment "SH-2a CPU core with no fpu")
+   (cpu sh64)
+   (isas compact)
+ )
+ 
+ (define-mach
    (name sh3)
    (comment "SH-3 CPU core")
    (cpu sh64)
***************
*** 61,68 ****
  )
  
  (define-mach
    (name sh4)
!   (comment "SH-4 CPU core")
    (cpu sh64)
    (isas compact)
  )
--- 97,132 ----
  )
  
  (define-mach
+   (name sh4-nofpu)
+   (comment "SH-4 CPU core - no fpu")
+   (cpu sh64)
+   (isas compact)
+ )
+ 
+ (define-mach
    (name sh4)
!   (comment "SH-4 CPU core with fpu")
!   (cpu sh64)
!   (isas compact)
! )
! 
! (define-mach
!   (name sh4a-nofpu)
!   (comment "SH-4a CPU core - no fpu")
!   (cpu sh64)
!   (isas compact)
! )
! 
! (define-mach
!   (name sh4a)
!   (comment "SH-4a CPU core with fpu")
!   (cpu sh64)
!   (isas compact)
! )
! 
! (define-mach
!   (name sh4al)
!   (comment "SH-4al CPU core")
    (cpu sh64)
    (isas compact)
  )
***************
*** 74,94 ****
    (isas compact media)
  )
  
! (define-model
    (name sh5)
!   (comment "SH-5 reference implementation")
    (mach sh5)
!   (unit u-exec "Execution unit" ()
! 	1 1 ; issue done
! 	() () () ())
  )
  \f
  ; Hardware elements.
  
  (define-hardware
    (name h-pc)
    (comment "Program counter")
!   (attrs PC (ISA compact,media))
    (type pc UDI)
    (get () (raw-reg h-pc))
    (set (newval) (sequence ()
--- 138,1051 ----
    (isas compact media)
  )
  
! ; Partition insns according to the mach in which they first appear.
! (define-pmacro (SH2-MACH)        (MACH sh2,sh2e,sh2a-fpu,sh2a-nofpu,sh3,sh3e,sh4-nofpu,sh4,sh4a-nofpu,sh4a,sh4al,sh5)) ; sh2  and up
! (define-pmacro (SH2e-MACH)       (MACH sh2e,sh2a-fpu,sh3e,sh4,sh4a,sh5))                                               ; sh2e and up
! (define-pmacro (SH2a-nofpu-MACH) (MACH sh2a-nofpu,sh2a-fpu,sh4,sh4-nofpu,sh5))                                         ; sh2a and up
! (define-pmacro (SH2a-MACH)       (MACH sh2a-fpu,sh4,sh5))                                                                  ; sh2a with fpu and up
! (define-pmacro (SH3-MACH)        (MACH sh3,sh3e,sh4-nofpu,sh4,sh4a-nofpu,sh4a,sh4al,sh5))                              ; sh3  and up
! (define-pmacro (SH3e-MACH)       (MACH sh3e,sh4,sh4a,sh5))                                                             ; sh3e and up
! (define-pmacro (SH4-nofpu-MACH)  (MACH sh4-nofpu,sh4,sh4a-nofpu,sh4a,sh4al,sh5))                                       ; sh4 no fpu and up
! (define-pmacro (SH4-MACH)        (MACH sh4,sh4a,sh5))                                                                  ; sh4 and up
! (define-pmacro (SH4a-nofpu-MACH) (MACH sh4a-nofpu,sh4a,sh4al,sh5))                                                     ; sh4a no fpu and up
! (define-pmacro (SH4a-MACH)       (MACH sh4a,sh5))                                                                      ; sh4a with fpu and up
! (define-pmacro (SH4al-MACH)      (MACH sh4al))                                                                         ; sh4al and up
! (define-pmacro (SH5-MACH)        (MACH sh5))                                                                           ; sh5 compact and up
! 
! ; Pipeline Models
! 
! ; Units common to all machines
! (define-pmacro (common-units)
!   (
!    ; Basic execution unit -- 1 cycle
!    (unit u-exec "Execution unit" ()
! 	 1 1 ; issue done
! 	 () () () ())
! 
!    ; SX execution unit -- 1 cycle
!    ; Ignored on most machines
!    (unit u-sx "SX Execution unit" ()
! 	 1 1 ; issue done
! 	 () () () ())
! 
!    ; Branch unit
!    (unit u-branch "Branch Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((pc)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Jmp unit
!    (unit u-jmp "Jmp Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((pc)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; JSR unit
!    (unit u-jsr "JSR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((pc)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Logic.b unit -- 3 cycles
!    (unit u-logic-b "Logic.b unit" ()
! 	 0 3 ; issue done
! 	 () () () ())
! 
!    ; Memory Access unit
!    (unit u-memory-access "Memory Access Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; LDS PR unit
!    (unit u-lds-pr "LDS PR Unit" ()
! 	 0 1 ; issue done
! 	 () () () ())
! 
!    ; STS PR unit
!    (unit u-sts-pr "STS PR Unit" ()
! 	 0 1 ; issue done
! 	 () () () ())
! 
!    ; Load PR unit
!    (unit u-load-pr "Load PR Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Use PR unit
!    (unit u-use-pr "Use PR Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Set SR Bit unit
!    (unit u-set-sr-bit "Set SR Bit Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; LDC SR unit
!    (unit u-ldc-sr "LDC SR Unit" ()
! 	 0 1 ; issue done
! 	 () () () ())
! 
!    ; LDC GBR unit
!    (unit u-ldc-gbr "LDC GBR Unit" ()
! 	 0 1 ; issue done
! 	 () () () ())
! 
!    ; Use TBIT unit
!    (unit u-use-tbit "Use TBIT Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; LDCL unit
!    (unit u-ldcl "LDCL Unit" ()
! 	 0 3 ; issue done
! 	 () () () ())
! 
!    ; LDCL to VBR unit
!    (unit u-ldcl-vbr "LDCL to VBR Unit" ()
! 	 0 3 ; issue done
! 	 () () () ())
! 
!    ; STC from VBR unit
!    (unit u-stc-vbr "STC from VBR Unit" ()
! 	 0 1 ; issue done
! 	 () () () ())
! 
!    ; Load gr unit
!    (unit u-load-gr "Load into GR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Use gr unit -- stalls if GR not ready
!    (unit u-use-gr "Use GR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((usereg INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Load GBR unit
!    (unit u-load-gbr "Load GBR Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Load VBR unit
!    (unit u-load-vbr "Load VBR Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Load MAC{H,L} unit
!    (unit u-load-mac "Load MAC Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Set MAC{H,L} Unit
!    (unit u-set-mac "Set MAC Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Multiply unit
!    (unit u-multiply "Multiply unit" ()
! 	 1 2 ; issue done
! 	 () () () ())
! 
!    ; mac.w Multiply unit
!    (unit u-macw "mac.w multiply unit" ()
! 	 1 2 ; issue done
! 	 () () () ())
! 
!    ; mac.l Multiply unit
!    (unit u-macl "mac.l multiply unit" ()
! 	 1 2 ; issue done
! 	 () () () ())
! 
!    ; dmul Multiply unit
!    (unit u-dmul "dmul{s,u},mull multiply unit" ()
! 	 1 2 ; issue done
! 	 () () () ())
! 
!    ; mull Multiply unit
!    (unit u-mull "mull multiply unit" ()
! 	 1 2 ; issue done
! 	 () () () ())
! 
!    ; muls.w Multiply unit
!    (unit u-mulsw "muls.w multiply unit" ()
! 	 1 1 ; issue done
! 	 () () () ())
! 
!    ; tas unit
!    (unit u-tas "tas unit" ()
! 	 1 4 ; issue done
! 	 () () () ())
! 
!    (unit u-shift "Shift Unit" ()
!  	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Use multiply result unit -- stalls if multiply unit is busy
!    (unit u-use-multiply-result "Use Multiply Result Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Writeback unit
!    (unit u-write-back "Writeback Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Trap unit
!    (unit u-trap "Trap Unit" ()
! 	 0 8 ; issue done
! 	 () () () ())
!   )
! )
! 
! ; Units common to all floating point enabled machines
! (define-pmacro (common-fp-units)
!   (
!    ; Basic fpu unit -- 1 cycle
!    (unit u-fpu "FPU unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Maybe uses fpu -- must have same latency as u-fpu
!    (unit u-maybe-fpu "Maybe FPU unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Load fr unit
!    (unit u-load-fr "Load into FR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Set fr unit
!    (unit u-set-fr "Set FR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Set fr unit -- no latency on some machines
!    ; Define it with the same latency as u-set-fr
!    (unit u-set-fr-0 "Set FR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Use fr unit -- stalls if FR not ready
!    (unit u-use-fr "Use FR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((usereg INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; FPU Memory Access unit
!    (unit u-fpu-memory-access "FPU Memory Access Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Set FPUL unit
!    (unit u-set-fpul "Set FPUL Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Load FPUL unit
!    (unit u-load-fpul "Load FPUL Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; FLDS FPUL unit
!    (unit u-flds-fpul "FLDS FPUL Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Use FPUL unit
!    (unit u-use-fpul "Use FPUL Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; LDS FPSCR unit
!    (unit u-lds-fpscr "LDS FPSCR Unit" ()
! 	 0 3 ; issue done
! 	 () () () ())
! 
!    ; LDS.L FPSCR unit
!    (unit u-ldsl-fpscr "LDS.L FPSCR Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; Use FPSCR unit
!    (unit u-use-fpscr "Use FPSCR Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; FPU Load gr unit
!    (unit u-fpu-load-gr "FPU Load into GR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; FDIV unit
!    (unit u-fdiv "FDIV Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; FSQRT unit -- not completely common but common enough
!    (unit u-fsqrt "FSQRT Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; FCMP unit
!    (unit u-fcmp "FCMP Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; FCNV unit
!    (unit u-fcnv "FCNV Unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
!   )
! )
! 
! ; Units common to sh2a-nofpu and above
! (define-pmacro (sh2a-nofpu-units)
!   (
!    ; mulr Multiply unit
!    (unit u-mulr "mulr multiply unit" ()
! 	 1 2 ; issue done
! 	 () () () ())
! 
!    ; mulr gr unit
!    (unit u-mulr-gr "MULR into GR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
!   )
! )
! 
! ; Units common to sh2a-fpu and above
! (define-pmacro (sh2a-fpu-units)
!   (
!    ; Set dr unit
!    (unit u-set-dr "Set DR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Load dr unit
!    (unit u-load-dr "Load into DR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Use dr unit -- stalls if DR not ready
!    (unit u-use-dr "Use DR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((usereg INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
!   )
! )
! 
! ; Units common to sh3 and above
! ;(define-pmacro (sh3-common-units)
! ;  (
! ;   (unit u-set-sr "Set SR Unit" ()
! ;	 0 3 ; issue done
! ;	 () () () ())
! ;  )
! ;)
! 
! ; Units common to sh4-nofpu and above
! (define-pmacro (sh4-nofpu-units)
!   (
!    ; OCB*  unit
!    (unit u-ocb "OCB* unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
!   )
! )
! 
! ; Units common to sh4 and above with fp
! (define-pmacro (sh4-common-fp-units)
!   (
!    (unit u-fipr "FIPR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((fvm INT -1) (fvn INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
!    (unit u-ftrv "FTRV Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((fvn INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
!   )
! )
! 
! ; Units common to sh5 media and above
! (define-pmacro (sh5-media-units)
!   (
!    ; Load gr unit
!    (unit u-set-gr "Set into GR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
!   )
! )
! 
! ; Units common to sh5 and above with fp
! (define-pmacro (sh5-media-fp-units)
!   (
!    ; Set fp unit
!    (unit u-set-fp "Set FP Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Set fv unit
!    (unit u-set-fv "Set FV Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Set mtrx unit
!    (unit u-set-mtrx "Set MTRX Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Load fp unit
!    (unit u-load-fp "Load FP Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Load fv unit
!    (unit u-load-fv "Load FV Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Load mtrx unit
!    (unit u-load-mtrx "Load MTRX Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Use fp unit -- stalls if FP not ready
!    (unit u-use-fp "Use DR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((usereg INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Use fv unit -- stalls if FV not ready
!    (unit u-use-fv "Use DR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((usereg INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Use mtrx unit -- stalls if MTRX not ready
!    (unit u-use-mtrx "Use DR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((usereg INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Use TR unit -- stalls if TR not ready
!    (unit u-use-tr "Use TR Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((usereg INT -1)) ; inputs
! 	 () ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; BLINK unit
!    (unit u-blink "BLINK Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((targetreg INT -1)) ; inputs
! 	 ((pc)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; Conditional Branch unit
!    (unit u-cond-branch "Conditional branch Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 ((targetreg INT -1)) ; inputs
! 	 ((pc)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; FDIV.D unit
!    (unit u-fdivd "FDIV.D Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; FSQRT.D unit
!    (unit u-fsqrtd "FSQRT.D Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; FTRV.S unit
!    (unit u-ftrvs "FTRVS Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((loadreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; PT* unit
!    (unit u-pt "PT* Unit" ()
! 	 0 0 ; issue done
! 	 () ; state
! 	 () ; inputs
! 	 ((targetreg INT -1)) ; outputs
! 	 () ; profile action (default)
! 	 )
! 
!    ; GETCFG unit
!    (unit u-getcfg "GETCFG unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
! 
!    ; PUTCFG unit
!    (unit u-putcfg "PUTCFG unit" ()
! 	 0 0 ; issue done
! 	 () () () ())
!   )
! )
! 
! ; This macro is for all machines with identical timing
! (define-pmacro (common-model xmach)
!   (.splice define-model
!     (name xmach)
!     (comment (.str xmach " reference implementation"))
!     (mach xmach)
!     (.unsplice (common-units))
! ;    (unit u-set-sr "Set SR Unit" ()
! ;	  0 1 ; issue done
! ;	  () () () ())
!   )
! )
! 
! ; This macro is for all fpu enabled machines with identical timing
! (define-pmacro (common-model-with-fp xmach)
!   (.splice define-model
!     (name xmach)
!     (comment (.str xmach " reference implementation"))
!     (mach xmach)
!     (.unsplice (common-units))
!     (.unsplice (common-fp-units))
! ;    (unit u-set-sr "Set SR Unit" ()
! ;	  0 1 ; issue done
! ;	  () () () ())
!   )
! )
! 
! ; This macro is for all machines sh3 and up with identical timing
! (define-pmacro (sh3-model xmach)
!   (.splice define-model
!     (name xmach)
!     (comment (.str xmach " reference implementation"))
!     (mach xmach)
!     (.unsplice (common-units))
! ;    (.unsplice (sh3-common-units))
!   )
! )
! 
! ; This macro is for all fpu enabled machines sh3e and up with identical timing
! (define-pmacro (sh3e-model xmach)
!   (.splice define-model
!     (name xmach)
!     (comment (.str xmach " reference implementation"))
!     (mach xmach)
!     (.unsplice (common-units))
!     (.unsplice (common-fp-units))
! ;    (.unsplice (sh3-common-units))
!   )
! )
! 
! ; The actual models
! ; sh2a-nofpu model
! (.splice define-model
!   (name sh2a-nofpu)
!   (comment "sh2a-nofpu reference implementation")
!   (mach sh2a-nofpu)
!   (.unsplice (common-units))
! ;  (unit u-set-sr "Set SR Unit" ()
! ;	0 1 ; issue done
! ;	() () () ())
!   (.unsplice (sh2a-nofpu-units))
! )
! 
! ; sh2a-fpu model
! (.splice define-model
!   (name sh2a-fpu)
!   (comment "sh2a-fpu reference implementation")
!   (mach sh2a-fpu)
!   (.unsplice (common-units))
!   (.unsplice (common-fp-units))
! ;  (unit u-set-sr "Set SR Unit" ()
! ;	0 1 ; issue done
! ;	() () () ())
!   (.unsplice (sh2a-nofpu-units))
!   (.unsplice (sh2a-fpu-units))
! )
! 
! ; sh4-nofpu model
! (.splice define-model
!   (name sh4-nofpu)
!   (comment "sh4 nofpu reference implementation")
!   (mach sh4-nofpu)
!   (.unsplice (common-units))
! ;  (.unsplice (sh3-common-units))
!   (.unsplice (sh2a-nofpu-units))
!   (.unsplice (sh4-nofpu-units))
! )
! 
! ; sh4 model
! (.splice define-model
!   (name sh4)
!   (comment "sh4 reference implementation")
!   (mach sh4)
!   (.unsplice (common-units))
!   (.unsplice (common-fp-units))
! ;  (.unsplice (sh3-common-units))
!   (.unsplice (sh2a-fpu-units))
!   (.unsplice (sh2a-nofpu-units))
!   (.unsplice (sh4-nofpu-units))
!   (.unsplice (sh4-common-fp-units))
! )
! 
! ; sh4a-nofpu model
! (.splice define-model
!   (name sh4a-nofpu)
!   (comment "sh4a no fpu reference implementation")
!   (mach sh4a-nofpu)
!   (.unsplice (common-units))
!   (.unsplice (common-fp-units))
!   (.unsplice (sh2a-nofpu-units))
! ;  (.unsplice (sh3-common-units))
!   (.unsplice (sh4-nofpu-units))
! )
! 
! ; sh4a model
! (.splice define-model
!   (name sh4a)
!   (comment "sh4a reference implementation")
!   (mach sh4a)
!   (.unsplice (common-units))
!   (.unsplice (common-fp-units))
!   (.unsplice (sh2a-nofpu-units))
! ;  (.unsplice (sh3-common-units))
!   (.unsplice (sh4-nofpu-units))
!   (.unsplice (sh4-common-fp-units))
! )
! 
! ; sh4al model
! (.splice define-model
!   (name sh4al)
!   (comment "sh4al reference implementation")
!   (mach sh4al)
!   (.unsplice (common-units))
!   (.unsplice (common-fp-units))
!   (.unsplice (sh2a-nofpu-units))
! ;  (.unsplice (sh3-common-units))
!   (.unsplice (sh4-nofpu-units))
! )
! 
! ; sh5 model
! (.splice define-model
    (name sh5)
!   (comment "sh5 reference implementation")
!   (mach sh5)
!   (.unsplice (common-units))
!   (.unsplice (common-fp-units))
! ;  (.unsplice (sh3-common-units))
!   (.unsplice (sh2a-fpu-units))
!   (.unsplice (sh2a-nofpu-units))
!   (.unsplice (sh4-nofpu-units))
!   (.unsplice (sh4-common-fp-units))
! )
! 
! ; sh5-media model
! (.splice define-model
!   (name sh5-media)
!   (comment "sh5 media reference implementation")
    (mach sh5)
! ; ------ some of are not used --- should be separated into
! ; comon_model/compact_model
!   (.unsplice (common-units))
!   (.unsplice (common-fp-units))
! ;  (.unsplice (sh3-common-units))
!   (.unsplice (sh2a-fpu-units))
!   (.unsplice (sh2a-nofpu-units))
!   (.unsplice (sh4-nofpu-units))
!   (.unsplice (sh4-common-fp-units))
! ; --------------------------------------------------------
!   (.unsplice (sh5-media-units))
!   (.unsplice (sh5-media-fp-units))
! )
! 
! ; Generate all the remaining models.
! (common-model         sh2)
! (common-model-with-fp sh2e)
! (sh3-model            sh3)
! (sh3e-model           sh3e)
! 
! ; Used to generate a timing which is the same for all models
! (define-pmacro (all-models units)
!   ((.splice sh2        (.unsplice units))
!    (.splice sh2e       (.unsplice units))
!    (.splice sh2a-fpu   (.unsplice units))
!    (.splice sh2a-nofpu (.unsplice units))
!    (.splice sh3        (.unsplice units))
!    (.splice sh3e       (.unsplice units))
!    (.splice sh4-nofpu  (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh4a-nofpu (.unsplice units))
!    (.splice sh4a       (.unsplice units))
!    (.splice sh4al      (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh2e and up.
! (define-pmacro (sh2e-models units)
!   ((.splice sh2e       (.unsplice units))
!    (.splice sh2a-fpu   (.unsplice units))
!    (.splice sh3e       (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh4a       (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh2a and up.
! (define-pmacro (sh2a-nofpu-models units)
!   ((.splice sh2a-fpu   (.unsplice units))
!    (.splice sh2a-nofpu (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh4-nofpu  (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh2a and up.
! (define-pmacro (sh2a-fpu-models units)
!   ((.splice sh2a-fpu   (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh3 and up.
! (define-pmacro (sh3-models units)
!   ((.splice sh3        (.unsplice units))
!    (.splice sh3e       (.unsplice units))
!    (.splice sh4-nofpu  (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh4a-nofpu (.unsplice units))
!    (.splice sh4a       (.unsplice units))
!    (.splice sh4al      (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh3e and up.
! (define-pmacro (sh3e-models units)
!   ((.splice sh3e       (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh4a       (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh4-nofpu and up.
! (define-pmacro (sh4-nofpu-models units)
!   ((.splice sh4-nofpu  (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh4a-nofpu (.unsplice units))
!    (.splice sh4a       (.unsplice units))
!    (.splice sh4al      (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh4 and up.
! (define-pmacro (sh4-models units)
!   ((.splice sh4   (.unsplice units))
!    (.splice sh4a  (.unsplice units))
!    (.splice sh5   (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh4-nofpu and up.
! (define-pmacro (sh4a-nofpu-models units)
!   ((.splice sh4a-nofpu (.unsplice units))
!    (.splice sh4a       (.unsplice units))
!    (.splice sh4al      (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing which is the same for sh5 and up.
! (define-pmacro (sh5-media-models units)
!   ((.splice sh5-media (.unsplice units)))
! )
! 
! ; Used to generate timing for SHAD insn
! (define-pmacro (shad-models units)
!   ((.splice sh2a-fpu   (.unsplice units))
!    (.splice sh2a-nofpu (.unsplice units))
!    (.splice sh3        (.unsplice units))
!    (.splice sh3e       (.unsplice units))
!    (.splice sh4-nofpu  (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh4a-nofpu (.unsplice units))
!    (.splice sh4a       (.unsplice units))
!    (.splice sh4al      (.unsplice units))
!    (.splice sh5        (.unsplice units)))
! )
! 
! ; Used to generate a timing for the FSQRT insn
! (define-pmacro (fsqrt-models units)
!   ((.splice sh2a-fpu   (.unsplice units))
!    (.splice sh3e       (.unsplice units))
!    (.splice sh4        (.unsplice units))
!    (.splice sh4a       (.unsplice units))
!    (.splice sh5        (.unsplice units)))
  )
+ 
  \f
  ; Hardware elements.
  
  (define-hardware
    (name h-pc)
    (comment "Program counter")
!   (attrs PC PROFILE (ISA compact,media))
    (type pc UDI)
    (get () (raw-reg h-pc))
    (set (newval) (sequence ()
***************
*** 101,107 ****
  (define-hardware
    (name h-gr)
    (comment "General purpose integer registers")
!   (attrs (ISA media,compact))
    (type register DI (64))
    (indices keyword "" (.map -build-greg-name (.iota 64)))
    (get (index)
--- 1058,1064 ----
  (define-hardware
    (name h-gr)
    (comment "General purpose integer registers")
!   (attrs PROFILE (ISA media,compact))
    (type register DI (64))
    (indices keyword "" (.map -build-greg-name (.iota 64)))
    (get (index)
***************
*** 117,123 ****
  (define-hardware
    (name h-grc)
    (comment "General purpose integer registers (SHcompact view)")
!   (attrs VIRTUAL (ISA compact))
    (type register SI (16))
    (indices keyword "" (.map -build-greg-name (.iota 16)))
    (get (index)
--- 1074,1080 ----
  (define-hardware
    (name h-grc)
    (comment "General purpose integer registers (SHcompact view)")
!   (attrs VIRTUAL PROFILE (ISA compact))
    (type register SI (16))
    (indices keyword "" (.map -build-greg-name (.iota 16)))
    (get (index)
***************
*** 140,146 ****
  	   (raw-reg h-cr index)))
    (set (index newval)
         (if (eq index 0)
! 	   (set (reg h-sr) newval)
  	   (set (raw-reg h-cr index) newval)))
  )
  
--- 1097,1103 ----
  	   (raw-reg h-cr index)))
    (set (index newval)
         (if (eq index 0)
! 	   (set (raw-reg h-sr) newval)
  	   (set (raw-reg h-cr index) newval)))
  )
  
***************
*** 163,170 ****
    (comment "Floating point register file bit")
    (attrs (ISA media,compact) VIRTUAL)
    (type register BI)
!   (get () (and (srl (reg h-sr) 14) 1))
!   (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 14))) (sll SI newvalue 14))))
  )
  
  (define-hardware
--- 1120,1127 ----
    (comment "Floating point register file bit")
    (attrs (ISA media,compact) VIRTUAL)
    (type register BI)
!   (get () (and (srl (reg h-fpscr) 21) 1))
!   (set (newvalue) (set (reg h-fpscr) (or (and (reg h-fpscr) (inv (sll 1 21))) (sll SI newvalue 21))))
  )
  
  (define-hardware
***************
*** 172,179 ****
    (comment "Floating point transfer size bit")
    (attrs (ISA media,compact) VIRTUAL)
    (type register BI)
!   (get () (and (srl (reg h-sr) 13) 1))
!   (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 13))) (sll SI newvalue 13))))
  )
  
  (define-hardware
--- 1129,1136 ----
    (comment "Floating point transfer size bit")
    (attrs (ISA media,compact) VIRTUAL)
    (type register BI)
!   (get () (and (srl (reg h-fpscr) 20) 1))
!   (set (newvalue) (set (reg h-fpscr) (or (and (reg h-fpscr) (inv (sll 1 20))) (sll SI newvalue 20))))
  )
  
  (define-hardware
***************
*** 181,188 ****
    (comment "Floating point precision bit")
    (attrs (ISA media,compact) VIRTUAL)
    (type register BI)
!   (get () (and (srl (reg h-sr) 12) 1))
!   (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 12))) (sll SI newvalue 12))))
  )
  
  (define-hardware
--- 1138,1145 ----
    (comment "Floating point precision bit")
    (attrs (ISA media,compact) VIRTUAL)
    (type register BI)
!   (get () (and (srl (reg h-fpscr) 19) 1))
!   (set (newvalue) (set (reg h-fpscr) (or (and (reg h-fpscr) (inv (sll 1 19))) (sll SI newvalue 19))))
  )
  
  (define-hardware
***************
*** 217,223 ****
  (define-hardware
    (name h-fr)
    (comment "Single precision floating point registers")
!   (attrs (ISA media,compact))
    (type register SF (64))
    (indices keyword "" (.map -build-freg-name (.iota 64)))
  )
--- 1174,1180 ----
  (define-hardware
    (name h-fr)
    (comment "Single precision floating point registers")
!   (attrs PROFILE (ISA media,compact))
    (type register SF (64))
    (indices keyword "" (.map -build-freg-name (.iota 64)))
  )
***************
*** 228,236 ****
  (define-hardware
    (name h-fp)
    (comment "Single precision floating point register pairs")
!   (attrs (ISA media,compact))
!   (type register DF (32))
!   (indices keyword "" (.map -build-fpair-name (.iota 32)))
  )
  
  (define-pmacro (-build-fvec-name n) ((.sym fv n) n))
--- 1185,1197 ----
  (define-hardware
    (name h-fp)
    (comment "Single precision floating point register pairs")
!   (attrs VIRTUAL PROFILE (ISA media,compact))
!   (type register SF (64))
!   (indices keyword "" (.map -build-fpair-name
! 			    (0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
! 			     32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62)))
!   (get (index) (reg h-fr index))
!   (set (index newval) (set (reg h-fr index) newval))
  )
  
  (define-pmacro (-build-fvec-name n) ((.sym fv n) n))
***************
*** 238,260 ****
  (define-hardware
    (name h-fv)
    (comment "Single precision floating point vectors")
!   (attrs VIRTUAL (ISA media,compact))
!   (type register SF (16))
!   (indices keyword "" (.map -build-fvec-name (.iota 16)))
!   ; Mask with $F to ensure 0 <= index < 15.
!   (get (index) (reg h-fr (mul (and UQI index 15) 4)))
!   (set (index newval) (set (reg h-fr (mul (and UQI index 15) 4)) newval))
  )
  
  (define-hardware
    (name h-fmtx)
    (comment "Single precision floating point matrices")
!   (attrs VIRTUAL (ISA media))
!   (type register SF (4))
!   (indices keyword "" ((mtrx0 0) (mtrx1 1) (mtrx2 2) (mtrx3 3)))
!   ; Mask with $3 to ensure 0 <= index < 4.
!   (get (index) (reg h-fr (mul (and UQI index 3) 16)))
!   (set (index newval) (set (reg h-fr (mul (and UQI index 3) 16)) newval))
  )
  
  (define-pmacro (-build-dreg-name n) ((.sym dr n) n))
--- 1199,1220 ----
  (define-hardware
    (name h-fv)
    (comment "Single precision floating point vectors")
!   (attrs VIRTUAL PROFILE (ISA media,compact))
!   (type register SF (64))
!   (indices keyword "" (.map -build-fvec-name
! 			    (0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60)))
!   (get (index) (reg h-fr index))
!   (set (index newval) (set (reg h-fr index) newval))
  )
  
  (define-hardware
    (name h-fmtx)
    (comment "Single precision floating point matrices")
!   (attrs VIRTUAL PROFILE (ISA media))
!   (type register SF (64))
!   (indices keyword "" ((mtrx0 0) (mtrx16 16) (mtrx32 32) (mtrx48 48)))
!   (get (index) (reg h-fr index))
!   (set (index newval) (set (reg h-fr index) newval))
  )
  
  (define-pmacro (-build-dreg-name n) ((.sym dr n) n))
***************
*** 262,270 ****
  (define-hardware
    (name h-dr)
    (comment "Double precision floating point registers")
!   (attrs (ISA media,compact) VIRTUAL)
!   (type register DF (32))
!   (indices keyword "" (.map -build-dreg-name (.iota 64)))
    (get (index)
         (subword DF
  		(or
--- 1222,1232 ----
  (define-hardware
    (name h-dr)
    (comment "Double precision floating point registers")
!   (attrs VIRTUAL PROFILE (ISA media,compact))
!   (type register DF (64))
!   (indices keyword "" (.map -build-dreg-name
! 			    (0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
! 			     32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62)))
    (get (index)
         (subword DF
  		(or
***************
*** 279,287 ****
  )
  
  (define-hardware
    (name h-tr)
    (comment "Branch target registers")
!   (attrs (ISA media))
    (type register DI (8))
    (indices keyword "" ((tr0 0) (tr1 1) (tr2 2) (tr3 3) (tr4 4) (tr5 5) (tr6 6) (tr7 7)))
  )
--- 1241,1291 ----
  )
  
  (define-hardware
+   (name h-fsd)
+   (comment "Single/Double precision floating point registers")
+   (attrs PROFILE (ISA compact,media) (SH2e-MACH))
+   (type register DF (16))
+   (indices keyword "" (.map -build-freg-name (.iota 16)))
+   (get (index)
+        (if DF prbit (reg h-drc index) (fext DF (reg h-fr index))))
+   (set (index newval)
+        (if prbit
+ 	   (set (reg h-drc index) newval)
+ 	   (set (reg h-frc index) (ftrunc SF newval))))
+ )
+ 
+ (define-pmacro (even x) (eq (and x 1) 0))
+ (define-pmacro (odd x)  (eq (and x 1) 1))
+ (define-pmacro (extd x) (odd x))
+ 
+ (define-hardware
+   (name h-fmov)
+   (comment "floating point registers for fmov")
+   (attrs PROFILE (ISA compact,media) (SH2e-MACH))
+   (type register DF (16))
+   (indices keyword "" (.map -build-freg-name (.iota 16)))
+   (get (index)
+        (if DF (not szbit)
+ 	   ; single precision operation
+ 	   (fext DF (reg h-frc index))
+ 	   ; double or extended operation
+ 	   (if DF (extd index)
+ 	       (reg h-xd (and index (inv 1)))
+ 	       (reg h-dr index))))
+   (set (index newval)
+        (if (not szbit)
+ 	   ; single precision operation
+ 	   (set (reg h-frc index) (ftrunc SF newval))
+ 	   ; double or extended operation
+ 	   (if (extd index)
+ 	       (set (reg h-xd (and index (inv 1))) newval)
+ 	       (set (reg h-dr index) newval))))
+ )
+ 
+ (define-hardware
    (name h-tr)
    (comment "Branch target registers")
!   (attrs (ISA media) PROFILE)
    (type register DI (8))
    (indices keyword "" ((tr0 0) (tr1 1) (tr2 2) (tr3 3) (tr4 4) (tr5 5) (tr6 6) (tr7 7)))
  )
Index: cgen/cpu/sh64-compact.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/sh64-compact.cpu,v
retrieving revision 1.4
diff -c -p -r1.4 sh64-compact.cpu
*** cgen/cpu/sh64-compact.cpu	21 May 2003 14:10:46 -0000	1.4
--- cgen/cpu/sh64-compact.cpu	22 Aug 2006 17:22:28 -0000
***************
*** 1,17 ****
  ; SuperH SHcompact instruction set description.  -*- Scheme -*-
! ; Copyright (C) 2000 Red Hat, Inc.
  ; This file is part of CGEN.
  ; See file COPYING.CGEN for details.
  \f
  ; dshcf -- define-normal-sh-compact-field
  
! (define-pmacro (dshcf xname xcomment ignored xstart xlength)
!   (dnf xname xcomment ((ISA compact)) xstart xlength))
  
  ; dshcop -- define-normal-sh-compact-operand
  
! (define-pmacro (dshcop xname xcomment ignored xhardware xfield)
!   (dnop xname xcomment ((ISA compact)) xhardware xfield))
  
  \f
  ; SHcompact-specific attributes.
--- 1,17 ----
  ; SuperH SHcompact instruction set description.  -*- Scheme -*-
! ; Copyright (C) 2000, 2006 Red Hat, Inc.
  ; This file is part of CGEN.
  ; See file COPYING.CGEN for details.
  \f
  ; dshcf -- define-normal-sh-compact-field
  
! (define-pmacro (dshcf xname xcomment xattrs xstart xlength)
!   (dnf xname xcomment (.splice (ISA compact) (.unsplice xattrs)) xstart xlength))
  
  ; dshcop -- define-normal-sh-compact-operand
  
! (define-pmacro (dshcop xname xcomment xattrs xhardware xfield)
!   (dnop xname xcomment (.splice (ISA compact) (.unsplice xattrs)) xhardware xfield))
  
  \f
  ; SHcompact-specific attributes.
***************
*** 30,35 ****
--- 30,63 ----
    (comment "floating point instruction")
  )
  
+ (define-attr
+   (for insn)
+   (type boolean)
+   (name 32-BIT-INSN)
+   (comment "32 bit insn")
+ )
+ 
+ ; Attributes to describe categories of insns
+ (define-attr
+   (for insn)
+   (type enum)
+   (name SH4-GROUP)
+   (comment "sh4 insn groups")
+   ; The order of declaration is significant. Table lookup is
+   ; performed using these as indices.
+   (values NONE MT EX BR LS FE CO MAX)
+ )
+ 
+ (define-attr
+   (for insn)
+   (type enum)
+   (name SH4A-GROUP)
+   (comment "sh4a insn groups")
+   ; The order of declaration is significant. Table lookup is
+   ; performed using these as indices.
+   (values NONE MT EX BR LS FE CO MAX)
+ )
+ 
  (define-keyword
    (name frc-names)
    (attrs (ISA compact))
***************
*** 63,69 ****
  (define-hardware
    (name h-frc)
    (comment "Single precision floating point registers")
!   (attrs VIRTUAL (ISA compact))
    (indices extern-keyword frc-names)
    (type register SF (16))
    (get (index) (reg h-fr (add (front) index)))
--- 91,97 ----
  (define-hardware
    (name h-frc)
    (comment "Single precision floating point registers")
!   (attrs VIRTUAL PROFILE (ISA compact))
    (indices extern-keyword frc-names)
    (type register SF (16))
    (get (index) (reg h-fr (add (front) index)))
***************
*** 73,79 ****
  (define-hardware
    (name h-drc)
    (comment "Double precision floating point registers")
!   (attrs VIRTUAL (ISA compact))
    (indices extern-keyword drc-names)
    (type register DF (8))
    (get (index) (reg h-dr (add (front) index)))
--- 101,107 ----
  (define-hardware
    (name h-drc)
    (comment "Double precision floating point registers")
!   (attrs VIRTUAL PROFILE (ISA compact))
    (indices extern-keyword drc-names)
    (type register DF (8))
    (get (index) (reg h-dr (add (front) index)))
***************
*** 110,127 ****
    (set (index newval) (set (reg h-fr (add (front) index)) newval))
  )
  
! (define-hardware
!   (name h-fpccr)
!   (comment "SHcompact floating point status/control register")
!   (attrs VIRTUAL (ISA compact))
!   (type register SI)
!   (get () (or (or (or (raw-reg h-fpscr) (sll SI prbit 19)) (sll SI szbit 20)) (sll SI frbit 21)))
!   (set (newvalue) (sequence ()
! 			    (set (reg h-fpscr) newvalue)
! 			    (set prbit (and (srl newvalue 19) 1))
! 			    (set szbit (and (srl newvalue 20) 1))
! 			    (set frbit (and (srl newvalue 21) 1))))
! )
  
  (define-hardware
    (name h-gbr)
--- 138,156 ----
    (set (index newval) (set (reg h-fr (add (front) index)) newval))
  )
  
! ; not needed? Using h-fpscr directly
! ;(define-hardware
! ;  (name h-fpccr)
! ;  (comment "SHcompact floating point status/control register")
! ;  (attrs VIRTUAL (ISA compact))
! ;  (type register SI)
! ;  (get () (or (or (or (raw-reg h-fpscr) (sll SI prbit 19)) (sll SI szbit 20)) (sll SI frbit 21)))
! ;  (set (newvalue) (sequence ()
! ;			    (set (reg h-fpscr) newvalue)
! ;			    (set prbit (and (srl newvalue 19) 1))
! ;			    (set szbit (and (srl newvalue 20) 1))
! ;			    (set frbit (and (srl newvalue 21) 1))))
! ;)
  
  (define-hardware
    (name h-gbr)
***************
*** 133,138 ****
--- 162,176 ----
  )
  
  (define-hardware
+   (name h-vbr)
+   (comment "Vector base register")
+   (attrs VIRTUAL (ISA compact))
+   (type register SI)
+   (get () (subword SI (raw-reg h-gr 20) 1))
+   (set (newval) (set (raw-reg h-gr 20) (ext DI newval)))
+ )
+ 
+ (define-hardware
    (name h-pr)
    (comment "Procedure link register")
    (attrs VIRTUAL (ISA compact))
***************
*** 169,238 ****
  )
  
  \f
! (dshcf f-op4     "Opcode (4 bits)"         ()  15   4)
! (dshcf f-op8     "Opcode (8 bits)"         ()  15   8)
! (dshcf f-op16    "Opcode (16 bits)"        ()  15  16)
! 
! (dshcf f-sub4    "Sub opcode (4 bits)"     ()   3   4)
! (dshcf f-sub8    "Sub opcode (8 bits)"     ()   7   8)
! (dshcf f-sub10   "Sub opcode (10 bits)"    ()   9  10)
! 
! (dshcf f-rn      "Register selector n"     ()  11   4)
! (dshcf f-rm      "Register selector m"     ()   7   4)
! 
! (dshcf f-8-1     "One bit at bit 8"        ()   8   1)
  
! (df  f-disp8  "Displacement (8 bits)"  ((ISA compact) PCREL-ADDR) 7 8 INT
       ((value pc) (sra SI value 1))
       ((value pc) (add SI (sll SI value 1) (add pc 4))))
  
! (df  f-disp12 "Displacement (12 bits)" ((ISA compact) PCREL-ADDR) 11 12 INT
       ((value pc) (sra SI value 1))
       ((value pc) (add SI (sll SI value 1) (add pc 4))))
  
! (dshcf f-imm8    "Immediate (8 bits)"      ()   7   8)
! (dshcf f-imm4    "Immediate (4 bits)"      ()   3   4)
  
! (df f-imm4x2     "Immediate (4 bits)"      ((ISA compact)) 3 4 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-imm4x4     "Immediate (4 bits)"      ((ISA compact)) 3 4 UINT
      ((value pc) (srl SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-imm8x2     "Immediate (8 bits)"      ((ISA compact)) 7 8 UINT
      ((value pc) (sra SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-imm8x4     "Immediate (8 bits)"      ((ISA compact)) 7 8 UINT
      ((value pc) (sra SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-dn "Double selector n" ((ISA compact)) 11 3 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-dm         "Double selector m"       ((ISA compact)) 7 3 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-vn         "Vector selector n"       ((ISA compact)) 11 2 UINT
      ((value pc) (srl SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-vm         "Vector selector m"       ((ISA compact)) 9 2 UINT
      ((value pc) (srl SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-xn         "Extended selector n"     ((ISA compact)) 11 3 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (add SI (sll SI value 1) 1)))
  
! (df f-xm         "Extended selector m"     ((ISA compact)) 7 3 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (add SI (sll SI value 1) 1)))
  
  \f
  ; Operands.
  
--- 207,301 ----
  )
  
  \f
! (dshcf f-op4     "Opcode (4 bits)"         ()   0   4)
! (dshcf f-op8     "Opcode (8 bits)"         ()   0   8)
! (dshcf f-op16    "Opcode (16 bits)"        ()   0  16)
! 
! (dshcf f-sub4    "Sub opcode (4 bits)"     ()  12   4)
! (dshcf f-sub8    "Sub opcode (8 bits)"     ()   8   8)
! (dshcf f-sub10   "Sub opcode (10 bits)"    ()   6  10)
! 
! (dshcf f-rn      "Register selector n"     ()   4   4)
! (dshcf f-rm      "Register selector m"     ()   8   4)
! 
! (dshcf f-7-1     "One bit at bit 8"        ()   7   1)
! (dshcf f-11-1    "One bit at bit 11"       ()  11   1)
! (dshcf f-16-4    "4 bits at bit 16"        ()  16   4)
  
! (df  f-disp8  "Displacement (8 bits)"  ((ISA compact) PCREL-ADDR) 8 8 INT
       ((value pc) (sra SI value 1))
       ((value pc) (add SI (sll SI value 1) (add pc 4))))
  
! (df  f-disp12 "Displacement (12 bits)" ((ISA compact) PCREL-ADDR) 4 12 INT
       ((value pc) (sra SI value 1))
       ((value pc) (add SI (sll SI value 1) (add pc 4))))
  
! (dshcf f-imm8    "Immediate (8 bits)"      ()   8   8)
! (dshcf f-imm4    "Immediate (4 bits)"      ()  12   4)
  
! (df f-imm4x2     "Immediate (4 bits)"      ((ISA compact)) 12 4 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-imm4x4     "Immediate (4 bits)"      ((ISA compact)) 12 4 UINT
      ((value pc) (srl SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-imm8x2     "Immediate (8 bits)"      ((ISA compact)) 8 8 UINT
      ((value pc) (sra SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-imm8x4     "Immediate (8 bits)"      ((ISA compact)) 8 8 UINT
      ((value pc) (sra SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df  f-imm12x4 "Displacement (12 bits)" ((ISA compact)) 20 12 INT
!      ((value pc) (sra SI value 2))
!      ((value pc) (sll SI value 2)))
! 
! (df  f-imm12x8 "Displacement (12 bits)" ((ISA compact)) 20 12 INT
!      ((value pc) (sra SI value 3))
!      ((value pc) (sll SI value 3)))
! 
! (df f-dn "Double selector n" ((ISA compact))  4 3 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-dm         "Double selector m"       ((ISA compact)) 8 3 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-vn         "Vector selector n"       ((ISA compact)) 4 2 UINT
      ((value pc) (srl SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-vm         "Vector selector m"       ((ISA compact)) 6 2 UINT
      ((value pc) (srl SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-xn         "Extended selector n"     ((ISA compact)) 4 3 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (add SI (sll SI value 1) 1)))
  
! (df f-xm         "Extended selector m"     ((ISA compact)) 8 3 UINT
      ((value pc) (srl SI value 1))
      ((value pc) (add SI (sll SI value 1) 1)))
  
+ (df f-imm20-hi "imm20 hi" ((ISA compact))  8  4  INT #f #f)
+ (df f-imm20-lo "imm20 lo" ((ISA compact)) 16 16 UINT #f #f)
+ (define-multi-ifield
+   (name f-imm20)
+   (comment "20 bit immediate")
+   (attrs (ISA compact))
+   (mode INT)
+   (subfields f-imm20-hi f-imm20-lo)
+   (insert (sequence ()
+ 		    (set (ifield f-imm20-lo) (and (ifield f-imm20) #xffff))
+ 		    (set (ifield f-imm20-hi) (sra (ifield f-imm20) 16))))
+   (extract (set (ifield f-imm20)
+ 		(or (sll (ifield f-imm20-hi) 16) (ifield f-imm20-lo))))
+   )
+ 
  \f
  ; Operands.
  
***************
*** 242,247 ****
--- 305,314 ----
  
  (dshcop frn    "Single precision register"              ()   h-frc   f-rn)
  (dshcop frm    "Single precision register"              ()   h-frc   f-rm)
+ (dshcop fr0    "Single precision register 0"            ()   h-frc   0)
+ 
+ (dshcop fmovn  "Register for fmov"                      ((SH2e-MACH)) h-fmov f-rn)
+ (dshcop fmovm  "Register for fmov"                      ((SH2e-MACH)) h-fmov f-rm)
  
  (dshcop fvn    "Left floating point vector"             ()   h-fvc   f-vn)
  (dshcop fvm    "Right floating point vector"            ()   h-fvc   f-vm)
***************
*** 252,257 ****
--- 319,325 ----
  (dshcop imm4   "Immediate value (4 bits)"		()   h-sint  f-imm4)
  (dshcop imm8   "Immediate value (8 bits)"               ()   h-sint  f-imm8)
  (dshcop uimm8  "Immediate value (8 bits unsigned)"      ()   h-uint  f-imm8)
+ (dshcop imm20  "Immediate value (20 bits)"              ()   h-sint  f-imm20)
  
  (dshcop imm4x2 "Immediate value (4 bits, 2x scale)"     ()   h-uint  f-imm4x2)
  (dshcop imm4x4 "Immediate value (4 bits, 4x scale)"     ()   h-uint  f-imm4x4)
***************
*** 260,273 ****
  
  (dshcop disp8  "Displacement (8 bits)"                  ()   h-iaddr f-disp8)
  (dshcop disp12 "Displacement (12 bits)"                 ()   h-iaddr f-disp12)
  
  (dshcop rm64   "Register m (64 bits)"                   ()   h-gr    f-rm)
  (dshcop rn64   "Register n (64 bits)"                   ()   h-gr    f-rn)
  
  (dshcop gbr    "Global base register"                   ()   h-gbr   f-nil)
  (dshcop pr     "Procedure link register"                ()   h-pr    f-nil)
  
! (dshcop fpscr  "Floating point status/control register" ()   h-fpccr f-nil)
  
  (dshcop tbit   "Condition code flag"                    ()   h-tbit  f-nil)
  (dshcop sbit   "Multiply-accumulate saturation flag"    ()   h-sbit  f-nil)
--- 328,344 ----
  
  (dshcop disp8  "Displacement (8 bits)"                  ()   h-iaddr f-disp8)
  (dshcop disp12 "Displacement (12 bits)"                 ()   h-iaddr f-disp12)
+ (dshcop imm12x4 "Displacement (12 bits)"                ()   h-sint  f-imm12x4)
+ (dshcop imm12x8 "Displacement (12 bits)"                ()   h-sint  f-imm12x8)
  
  (dshcop rm64   "Register m (64 bits)"                   ()   h-gr    f-rm)
  (dshcop rn64   "Register n (64 bits)"                   ()   h-gr    f-rn)
  
  (dshcop gbr    "Global base register"                   ()   h-gbr   f-nil)
+ (dshcop vbr    "Vector base register"                   ()   h-vbr   f-nil)
  (dshcop pr     "Procedure link register"                ()   h-pr    f-nil)
  
! (dshcop fpscr  "Floating point status/control register" ()   h-fpscr f-nil)
  
  (dshcop tbit   "Condition code flag"                    ()   h-tbit  f-nil)
  (dshcop sbit   "Multiply-accumulate saturation flag"    ()   h-sbit  f-nil)
***************
*** 282,493 ****
  (dshcop macl   "Multiply-accumulate low register"       ()   h-macl  f-nil)
  (dshcop mach   "Multiply-accumulate high register"      ()   h-mach  f-nil)
  
- 
  (define-operand (name fsdm) (comment "bar")
!   (attrs (ISA compact)) (type h-frc) (index f-rm) (handlers (parse "fsd")))
  
  (define-operand (name fsdn) (comment "bar")
!   (attrs (ISA compact)) (type h-frc) (index f-rn))
  \f
  
  ; Cover macro to dni to indicate these are all SHcompact instructions.
  ; dshmi: define-normal-sh-compact-insn
  
! (define-pmacro (dshci xname xcomment xattrs xsyntax xformat xsemantics)
    (define-insn
      (name (.sym xname -compact))
      (comment xcomment)
      (.splice attrs (.unsplice xattrs) (ISA compact))
      (syntax xsyntax)
      (format xformat)
!     (semantics xsemantics)))
! 
! (define-pmacro (dr operand) (reg h-dr (index-of operand)))
! (define-pmacro (xd x) (reg h-xd (and (index-of x) (inv QI 1))))
  \f
  (dshci add "Add"
!        ()
         "add $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 12))
!        (set rn (add rn rm)))
  
  (dshci addi "Add immediate"
!        ()
         "add #$imm8, $rn"
         (+ (f-op4 7) rn imm8)
!        (set rn (add rn (ext SI (and QI imm8 255)))))
  
  (dshci addc "Add with carry"
!        ()
         "addc $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 14))
         (sequence ((BI flag))
  		 (set flag (add-cflag rn rm tbit))
  		 (set rn (addc rn rm tbit))
! 		 (set tbit flag)))
  
  (dshci addv "Add with overflow"
!        ()
         "addv $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 15))
         (sequence ((BI t))
  		 (set t (add-oflag rn rm 0))
  		 (set rn (add rn rm))
! 		 (set tbit t)))
  
  (dshci and "Bitwise AND"
!        ()
         "and $rm64, $rn64"
         (+ (f-op4 2) rn64 rm64 (f-sub4 9))
!        (set rn64 (and rm64 rn64)))
  
  (dshci andi "Bitwise AND immediate"
!        ()
         "and #$uimm8, r0"
         (+ (f-op8 #xc9) uimm8)
!        (set r0 (and r0 (zext DI uimm8))))
  
  (dshci andb "Bitwise AND memory byte"
!        ()
         "and.b #$imm8, @(r0, gbr)"
         (+ (f-op8 #xcd) imm8)
         (sequence ((DI addr) (UQI data))
  		 (set addr (add r0 gbr))
  		 (set data (and (mem UQI addr) imm8))
! 		 (set (mem UQI addr) data)))
  
  (dshci bf "Conditional branch"
!        ()
         "bf $disp8"
         (+ (f-op8 #x8b) disp8)
         (if (not tbit)
! 	   (set pc disp8)))
  
  (dshci bfs "Conditional branch with delay slot"
!        ()
         "bf/s $disp8"
         (+ (f-op8 #x8f) disp8)
         (if (not tbit)
! 	   (delay 1 (set pc disp8))))
  
  (dshci bra "Branch"
!        ()
         "bra $disp12"
         (+ (f-op4 10) disp12)
!        (delay 1 (set pc disp12)))
  
  (dshci braf "Branch far"
!        ()
         "braf $rn"
         (+ (f-op4 0) rn (f-sub8 35))
!        (delay 1 (set pc (add (ext DI rn) (add pc 4)))))
  
  (dshci brk "Breakpoint"
!        ()
         "brk"
         (+ (f-op16 59))
!        (c-call "sh64_break" pc))
  
  (dshci bsr "Branch to subroutine"
!        ()
         "bsr $disp12"
         (+ (f-op4 11) disp12)
!        (delay 1 (sequence ()
! 			  (set pr (add pc 4))
! 			  (set pc disp12))))
  
  (dshci bsrf "Branch to far subroutine"
!        ()
         "bsrf $rn"
         (+ (f-op4 0) rn (f-sub8 3))
!        (delay 1 (sequence ()
! 			  (set pr (add pc 4))
! 			  (set pc (add (ext DI rn) (add pc 4))))))
         
  (dshci bt "Conditional branch"
!        ()
         "bt $disp8"
         (+ (f-op8 #x89) disp8)
         (if tbit
! 	   (set pc disp8)))
  
  (dshci bts "Conditional branch with delay slot"
!        ()
         "bt/s $disp8"
         (+ (f-op8 #x8d) disp8)
         (if tbit
! 	   (delay 1 (set pc disp8))))
  
  (dshci clrmac "Clear MACL and MACH"
!        ()
         "clrmac"
         (+ (f-op16 40))
         (sequence ()
  		 (set macl 0)
! 		 (set mach 0)))
  
  (dshci clrs "Clear S-bit"
!        ()
         "clrs"
         (+ (f-op16 72))
!        (set sbit 0))
  
  (dshci clrt "Clear T-bit"
!        ()
         "clrt"
         (+ (f-op16 8))
!        (set tbit 0))
  
  (dshci cmpeq "Compare if equal"
!        ()
         "cmp/eq $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 0))
!        (set tbit (eq rm rn)))
  
  (dshci cmpeqi "Compare if equal (immediate)"
!        ()
         "cmp/eq #$imm8, r0"
         (+ (f-op8 #x88) imm8)
!        (set tbit (eq r0 (ext SI (and QI imm8 255)))))
  
  (dshci cmpge "Compare if greater than or equal"
!        ()
         "cmp/ge $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 3))
!        (set tbit (ge rn rm)))
  
  (dshci cmpgt "Compare if greater than"
!        ()
         "cmp/gt $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 7))
!        (set tbit (gt rn rm)))
  
  (dshci cmphi "Compare if greater than (unsigned)"
!        ()
         "cmp/hi $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 6))
!        (set tbit (gtu rn rm)))
  
  (dshci cmphs "Compare if greater than or equal (unsigned)"
!        ()
         "cmp/hs $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 2))
!        (set tbit (geu rn rm)))
  
  (dshci cmppl "Compare if greater than zero"
!        ()
         "cmp/pl $rn"
         (+ (f-op4 4) rn (f-sub8 21))
!        (set tbit (gt rn 0)))
  
  (dshci cmppz "Compare if greater than or equal zero"
!        ()
         "cmp/pz $rn"
         (+ (f-op4 4) rn (f-sub8 17))
!        (set tbit (ge rn 0)))
  
  (dshci cmpstr "Compare bytes"
!        ()
         "cmp/str $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 12))
         (sequence ((BI t) (SI temp))
--- 353,670 ----
  (dshcop macl   "Multiply-accumulate low register"       ()   h-macl  f-nil)
  (dshcop mach   "Multiply-accumulate high register"      ()   h-mach  f-nil)
  
  (define-operand (name fsdm) (comment "bar")
!   (attrs (ISA compact) (SH2e-MACH)) (type h-fsd) (index f-rm) (handlers (parse "fsd")))
  
  (define-operand (name fsdn) (comment "bar")
!   (attrs (ISA compact) (SH2e-MACH)) (type h-fsd) (index f-rn))
  \f
  
  ; Cover macro to dni to indicate these are all SHcompact instructions.
  ; dshmi: define-normal-sh-compact-insn
  
! (define-pmacro (dshci xname xcomment xattrs xsyntax xformat xsemantics xtiming)
    (define-insn
      (name (.sym xname -compact))
      (comment xcomment)
      (.splice attrs (.unsplice xattrs) (ISA compact))
      (syntax xsyntax)
      (format xformat)
!     (semantics xsemantics)
!     (.splice timing (.unsplice xtiming))))
  \f
  (dshci add "Add"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "add $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 12))
!        (set rn (add rn rm))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-exec))))
  
  (dshci addi "Add immediate"
!        ((SH4-GROUP EX))
         "add #$imm8, $rn"
         (+ (f-op4 7) rn imm8)
!        (set rn (add rn (ext SI (and QI imm8 255))))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec))))
  
  (dshci addc "Add with carry"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "addc $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 14))
         (sequence ((BI flag))
  		 (set flag (add-cflag rn rm tbit))
  		 (set rn (addc rn rm tbit))
! 		 (set tbit flag))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci addv "Add with overflow"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "addv $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 15))
         (sequence ((BI t))
  		 (set t (add-oflag rn rm 0))
  		 (set rn (add rn rm))
! 		 (set tbit t))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci and "Bitwise AND"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "and $rm64, $rn64"
         (+ (f-op4 2) rn64 rm64 (f-sub4 9))
!        (set rn64 (and rm64 rn64))
!        (all-models ((unit u-use-gr (in usereg rn64))
! 		    (unit u-use-gr (in usereg rm64))
! 		    (unit u-exec))))
  
  (dshci andi "Bitwise AND immediate"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "and #$uimm8, r0"
         (+ (f-op8 #xc9) uimm8)
!        (set r0 (and r0 (zext DI uimm8)))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-exec))))
  
  (dshci andb "Bitwise AND memory byte"
!        ((SH4-GROUP CO) (SH4A-GROUP CO))
         "and.b #$imm8, @(r0, gbr)"
         (+ (f-op8 #xcd) imm8)
         (sequence ((DI addr) (UQI data))
  		 (set addr (add r0 gbr))
  		 (set data (and (mem UQI addr) imm8))
! 		 (set (mem UQI addr) data))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-logic-b)
! 		    (unit u-memory-access))))
  
  (dshci bf "Conditional branch"
!        ((SH4-GROUP BR) (SH4A-GROUP BR))
         "bf $disp8"
         (+ (f-op8 #x8b) disp8)
         (if (not tbit)
! 	   (set pc disp8))
!        ; non-delayed branch stalls 2 cycles
!        (all-models ((unit u-use-tbit)
! 		    (unit u-branch (cycles 3)))))
  
  (dshci bfs "Conditional branch with delay slot"
!        ((SH2-MACH) (SH4-GROUP BR) (SH4A-GROUP BR))
         "bf/s $disp8"
         (+ (f-op8 #x8f) disp8)
         (if (not tbit)
! 	   (sequence ()
! 		     (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		     (save-delayed-pc disp8)
! 		     (set-delay 1 pc disp8)))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-use-tbit)
! 		    (unit u-branch (cycles 2)))))
  
  (dshci bra "Branch"
!        ((SH4-GROUP BR) (SH4A-GROUP BR))
         "bra $disp12"
         (+ (f-op4 10) disp12)
!        (sequence ()
! 		 (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		 (save-delayed-pc disp12)
! 		 (set-delay 1 pc disp12))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-branch (cycles 2)))))
  
  (dshci braf "Branch far"
!        ((SH2-MACH) (SH4-GROUP CO) (SH4A-GROUP BR))
         "braf $rn"
         (+ (f-op4 0) rn (f-sub8 35))
!        (sequence ()
! 		 (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		 (save-delayed-pc (add (ext DI rn) (add pc 4)))
! 		 (set-delay 1 pc (add (ext DI rn) (add pc 4))))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-jmp (cycles 2)))))
  
  (dshci brk "Breakpoint"
!        ((SH5-MACH))
         "brk"
         (+ (f-op16 59))
!        (c-call "sh64_break" pc)
!        ())
  
  (dshci bsr "Branch to subroutine"
!        ((SH4-GROUP BR) (SH4A-GROUP BR))
         "bsr $disp12"
         (+ (f-op4 11) disp12)
!        (sequence ()
! 		 (set-delay 1 pr (add pc 4))
! 		 (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		 (save-delayed-pc disp12)
! 		 (set-delay 1 pc disp12))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-branch (cycles 2)))))
  
  (dshci bsrf "Branch to far subroutine"
!        ((SH2-MACH) (SH4-GROUP CO) (SH4A-GROUP BR))
         "bsrf $rn"
         (+ (f-op4 0) rn (f-sub8 3))
!        (sequence ()
! 		 (set-delay 1 pr (add pc 4))
! 		 (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		 (save-delayed-pc (add (ext DI rn) (add pc 4)))
! 		 (set-delay 1 pc (add (ext DI rn) (add pc 4))))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-jsr (cycles 2)))))
         
  (dshci bt "Conditional branch"
!        ((SH4-GROUP BR) (SH4A-GROUP BR))
         "bt $disp8"
         (+ (f-op8 #x89) disp8)
         (if tbit
! 	   (set pc disp8))
!        ; non-delayed branch stalls 2 cycles
!        (all-models ((unit u-use-tbit)
! 		    (unit u-branch (cycles 3)))))
  
  (dshci bts "Conditional branch with delay slot"
!        ((SH2-MACH) (SH4-GROUP BR) (SH4A-GROUP BR))
         "bt/s $disp8"
         (+ (f-op8 #x8d) disp8)
         (if tbit
! 	   (sequence ()
! 		     (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		     (save-delayed-pc disp8)
! 		     (set-delay 1 pc disp8)))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-use-tbit)
! 		    (unit u-branch (cycles 2)))))
  
  (dshci clrmac "Clear MACL and MACH"
!        ((SH4-GROUP CO) (SH4A-GROUP EX))
         "clrmac"
         (+ (f-op16 40))
         (sequence ()
  		 (set macl 0)
! 		 (set mach 0))
!        (all-models ((unit u-use-multiply-result)
! 		    (unit u-exec)
! 		    (unit u-set-mac))))
  
  (dshci clrs "Clear S-bit"
!        ((SH3-MACH) (SH4-GROUP CO) (SH4A-GROUP EX))
         "clrs"
         (+ (f-op16 72))
!        (set sbit 0)
!        (sh3-models ((unit u-exec)
! 		    (unit u-set-sr-bit))))
! ;		    (unit u-set-sr))))
  
  (dshci clrt "Clear T-bit"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "clrt"
         (+ (f-op16 8))
!        (set tbit 0)
!        (all-models ((unit u-exec)
! 		    (unit u-use-tbit)
! 		    (unit u-set-sr-bit))))
! ;		    (unit u-set-sr))))
  
  (dshci cmpeq "Compare if equal"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/eq $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 0))
!        (set tbit (eq rm rn))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci cmpeqi "Compare if equal (immediate)"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/eq #$imm8, r0"
         (+ (f-op8 #x88) imm8)
!        (set tbit (eq r0 (ext SI (and QI imm8 255))))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci cmpge "Compare if greater than or equal"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/ge $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 3))
!        (set tbit (ge rn rm))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci cmpgt "Compare if greater than"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/gt $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 7))
!        (set tbit (gt rn rm))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci cmphi "Compare if greater than (unsigned)"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/hi $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 6))
!        (set tbit (gtu rn rm))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci cmphs "Compare if greater than or equal (unsigned)"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/hs $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 2))
!        (set tbit (geu rn rm))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci cmppl "Compare if greater than zero"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/pl $rn"
         (+ (f-op4 4) rn (f-sub8 21))
!        (set tbit (gt rn 0))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci cmppz "Compare if greater than or equal zero"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/pz $rn"
         (+ (f-op4 4) rn (f-sub8 17))
!        (set tbit (ge rn 0))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci cmpstr "Compare bytes"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "cmp/str $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 12))
         (sequence ((BI t) (SI temp))
***************
*** 496,523 ****
  		 (set t (or (eq (and temp #xff0000) 0) t))
  		 (set t (or (eq (and temp #xff00) 0) t))
  		 (set t (or (eq (and temp #xff) 0) t))
! 		 (set tbit (if BI (gtu t 0) 1 0))))
  
  (dshci div0s "Initialise divide-step state for signed division"
!        ()
         "div0s $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 7))
         (sequence ()
  		 (set qbit (srl rn 31))
  		 (set mbit (srl rm 31))
! 		 (set tbit (if BI (eq (srl rm 31) (srl rn 31)) 0 1))))
  
  (dshci div0u "Initialise divide-step state for unsigned division"
!        ()
         "div0u"
         (+ (f-op16 25))
         (sequence ()
  		 (set tbit 0)
  		 (set qbit 0)
! 		 (set mbit 0)))
  
  (dshci div1 "Divide step"
!        ()
         "div1 $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 4))
         (sequence ((BI oldq) (SI tmp0) (UQI tmp1))
--- 673,713 ----
  		 (set t (or (eq (and temp #xff0000) 0) t))
  		 (set t (or (eq (and temp #xff00) 0) t))
  		 (set t (or (eq (and temp #xff) 0) t))
! 		 (set tbit (if BI (gtu t 0) 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci div0s "Initialise divide-step state for signed division"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "div0s $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 7))
         (sequence ()
  		 (set qbit (srl rn 31))
  		 (set mbit (srl rm 31))
! 		 (set tbit (if BI (eq (srl rm 31) (srl rn 31)) 0 1)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci div0u "Initialise divide-step state for unsigned division"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "div0u"
         (+ (f-op16 25))
         (sequence ()
  		 (set tbit 0)
  		 (set qbit 0)
! 		 (set mbit 0))
!        (all-models ((unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci div1 "Divide step"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "div1 $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 4))
         (sequence ((BI oldq) (SI tmp0) (UQI tmp1))
***************
*** 555,995 ****
  				   (if (not qbit)
  				       (set qbit (if BI (eq tmp1 0) 1 0))
  				       (set qbit (if BI tmp1 1 0))))))
! 		 (set tbit (if BI (eq qbit mbit) 1 0))))
  
  (dshci dmulsl "Multiply long (signed)"
!        ()
         "dmuls.l $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 13))
         (sequence ((DI result))
  		 (set result (mul (ext DI rm) (ext DI rn)))
  		 (set mach (subword SI result 0))
! 		 (set macl (subword SI result 1))))
  
  (dshci dmulul "Multiply long (unsigned)"
!        ()
         "dmulu.l $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 5))
         (sequence ((DI result))
  		 (set result (mul (zext DI rm) (zext DI rn)))
  		 (set mach (subword SI result 0))
! 		 (set macl (subword SI result 1))))
  
  (dshci dt "Decrement and set"
!        ()
         "dt $rn"
         (+ (f-op4 4) rn (f-sub8 16))
         (sequence ()
  		 (set rn (sub rn 1))
! 		 (set tbit (eq rn 0))))
  
  (dshci extsb "Sign extend byte"
!        ()
         "exts.b $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 14))
!        (set rn (ext SI (subword QI rm 3))))
  
  (dshci extsw "Sign extend word"
!        ()
         "exts.w $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 15))
!        (set rn (ext SI (subword HI rm 1))))
  
  (dshci extub "Zero extend byte"
!        ()
         "extu.b $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 12))
!        (set rn (zext SI (subword QI rm 3))))
  
  (dshci extuw "Zero etxend word"
!        ()
         "extu.w $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 13))
!        (set rn (zext SI (subword HI rm 1))))
  
  (dshci fabs "Floating point absolute"
!        (FP-INSN)
         "fabs $fsdn"
         (+ (f-op4 15) fsdn (f-sub8 #x5d))
         (if prbit
! 	   (set (dr fsdn) (c-call DF "sh64_fabsd" (dr fsdn)))
! 	   (set fsdn (c-call SF "sh64_fabss" fsdn))))
  
  (dshci fadd "Floating point add"
!        (FP-INSN)
         "fadd $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 0))
         (if prbit
! 	   (set (dr fsdn) (c-call DF "sh64_faddd" (dr fsdm) (dr fsdn)))
! 	   (set fsdn (c-call SF "sh64_fadds" fsdm fsdn))))
  
  (dshci fcmpeq "Floating point compare equal"
!        (FP-INSN)
         "fcmp/eq $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 4))
         (if prbit
! 	   (set tbit (c-call BI "sh64_fcmpeqd" (dr fsdm) (dr fsdn)))
! 	   (set tbit (c-call BI "sh64_fcmpeqs" fsdm fsdn))))
         
  (dshci fcmpgt "Floating point compare greater than"
!        (FP-INSN)
         "fcmp/gt $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 5))
         (if prbit
! 	   (set tbit (c-call BI "sh64_fcmpgtd" (dr fsdn) (dr fsdm)))
! 	   (set tbit (c-call BI "sh64_fcmpgts" fsdn fsdm))))
  
  (dshci fcnvds "Floating point convert (double to single)"
!        (FP-INSN)
         "fcnvds $drn, fpul"
!        (+ (f-op4 15) drn (f-8-1 10) (f-sub8 #xbd))
!        (set fpul (c-call SF "sh64_fcnvds" drn)))
  
  (dshci fcnvsd "Floating point convert (single to double)"
!        (FP-INSN)
         "fcnvsd fpul, $drn"
!        (+ (f-op4 15) drn (f-8-1 0) (f-sub8 #xad))
!        (set drn (c-call DF "sh64_fcnvsd" fpul)))
  
  (dshci fdiv "Floating point divide"
!        (FP-INSN)
         "fdiv $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 3))
         (if prbit
! 	   (set (dr fsdn) (c-call DF "sh64_fdivd" (dr fsdn) (dr fsdm)))
! 	   (set fsdn (c-call SF "sh64_fdivs" fsdn fsdm))))
  
  (dshci fipr "Floating point inner product"
!        (FP-INSN)
         "fipr $fvm, $fvn"
         (+ (f-op4 15) fvn fvm (f-sub8 #xed))
!        (sequence ((QI m) (QI n) (SF res))
! 		 (set m (index-of fvm))
! 		 (set n (index-of fvn))
! 		 (set res (c-call SF "sh64_fmuls" fvm fvn))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 1)) (reg h-frc (add n 1)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 2)) (reg h-frc (add n 2)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 3)) (reg h-frc (add n 3)))))
! 		 (set (reg h-frc (add n 3)) res)))
  
  (dshci flds "Floating point load status register"
!        (FP-INSN)
!        "flds $frn"
         (+ (f-op4 15) frn (f-sub8 #x1d))
!        (set fpul frn))
  
  (dshci fldi0 "Floating point load immediate 0.0"
!        (FP-INSN)
         "fldi0 $frn"
         (+ (f-op4 15) frn (f-sub8 #x8d))
!        (set frn (c-call SF "sh64_fldi0")))
  
  (dshci fldi1 "Floating point load immediate 1.0"
!        (FP-INSN)
         "fldi1 $frn"
         (+ (f-op4 15) frn (f-sub8 #x9d))
!        (set frn (c-call SF "sh64_fldi1")))
  
  (dshci float "Floating point integer conversion"
!        (FP-INSN)
         "float fpul, $fsdn"
         (+ (f-op4 15) fsdn (f-sub8 #x2d))
         (if prbit
! 	   (set (dr fsdn) (c-call DF "sh64_floatld" fpul))
! 	   (set fsdn (c-call SF "sh64_floatls" fpul))))
  
  (dshci fmac "Floating point multiply and accumulate"
!        (FP-INSN)
         "fmac fr0, $frm, $frn"
         (+ (f-op4 15) frn frm (f-sub4 14))
!        (set frn (c-call SF "sh64_fmacs" (reg h-frc 0) frm frn)))
! 
! (define-pmacro (even x) (eq (and x 1) 0))
! (define-pmacro (odd x)  (eq (and x 1) 1))
! (define-pmacro (extd x) (odd (index-of x)))
  
  (dshci fmov1 "Floating point move (register to register)"
!        (FP-INSN)
!        "fmov $frm, $frn"
!        (+ (f-op4 15) frn frm (f-sub4 12))
!        (if (not szbit)
! 	   ; single precision operation
! 	   (set frn frm)
! 	   ; double or extended operation
! 	   (if (extd frm)
! 	       (if (extd frn)
! 		   (set (xd frn) (xd frm))
! 		   (set (dr frn) (xd frm)))
! 	       (if (extd frn)
! 		   (set (xd frn) (dr frm))
! 		   (set (dr frn) (dr frm))))))
  
  (dshci fmov2 "Floating point load"
!        (FP-INSN)
!        "fmov @$rm, $frn"
!        (+ (f-op4 15) frn rm (f-sub4 8))
         (if (not szbit)
! 	   ; single precision operation
! 	   (set frn (mem SF rm))
! 	   ; double or extended operation
! 	   (if (extd frn)
! 	       (set (xd frn) (mem DF rm))
! 	       (set (dr frn) (mem DF rm)))))
  
  (dshci fmov3 "Floating point load (post-increment)"
!        (FP-INSN)
!        "fmov @${rm}+, frn"
!        (+ (f-op4 15) frn rm (f-sub4 9))
         (if (not szbit)
- 	   ; single precision operation
  	   (sequence ()
! 		     (set frn (mem SF rm))
  		     (set rm (add rm 4)))
- 	   ; double or extended operation
  	   (sequence ()
! 		     (if (extd frn)
! 			 (set (xd frn) (mem DF rm))
! 			 (set (dr frn) (mem DF rm)))
! 		     (set rm (add rm 8)))))
  
  (dshci fmov4 "Floating point load (register/register indirect)"
!        (FP-INSN)
!        "fmov @(r0, $rm), $frn"
!        (+ (f-op4 15) frn rm (f-sub4 6))
         (if (not szbit)
! 	   ; single precision operation
! 	   (set frn (mem SF (add r0 rm)))
! 	   ; double or extended operation
! 	   (if (extd frn)
! 	       (set (xd frn) (mem DF (add r0 rm)))
! 	       (set (dr frn) (mem DF (add r0 rm))))))
  
  (dshci fmov5 "Floating point store"
!        (FP-INSN)
!        "fmov $frm, @$rn"
!        (+ (f-op4 15) rn frm (f-sub4 10))
         (if (not szbit)
! 	   ; single precision operation
! 	   (set (mem SF rn) frm)
! 	   ; double or extended operation
! 	   (if (extd frm)
! 	       (set (mem DF rn) (xd frm))
! 	       (set (mem DF rn) (dr frm)))))
  
  (dshci fmov6 "Floating point store (pre-decrement)"
!        (FP-INSN)
!        "fmov $frm, @-$rn"
!        (+ (f-op4 15) rn frm (f-sub4 11))
         (if (not szbit)
- 	   ; single precision operation
  	   (sequence ()
  		     (set rn (sub rn 4))
! 		     (set (mem SF rn) frm))
! 	   ; double or extended operation
  	   (sequence ()
  		     (set rn (sub rn 8))
! 		     (if (extd frm)
! 			 (set (mem DF rn) (xd frm))
! 			 (set (mem DF rn) (dr frm))))))
  
  (dshci fmov7 "Floating point store (register/register indirect)"
!        (FP-INSN)
!        "fmov $frm, @(r0, $rn)"
!        (+ (f-op4 15) rn frm (f-sub4 7))
         (if (not szbit)
! 	   ; single precision operation
! 	   (set (mem SF (add r0 rn)) frm)
! 	   ; double or extended operation
! 	   (if (extd frm)
! 	       (set (mem DF (add r0 rn)) (xd frm))
! 	       (set (mem DF (add r0 rn)) (dr frm)))))
  
  (dshci fmul "Floating point multiply"
!        (FP-INSN)
         "fmul $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 2))
         (if prbit
! 	   (set (dr fsdn) (c-call DF "sh64_fmuld" (dr fsdm) (dr fsdn)))
! 	   (set fsdn (c-call SF "sh64_fmuls" fsdm fsdn))))
  
  (dshci fneg "Floating point negate"
!        (FP-INSN)
         "fneg $fsdn"
         (+ (f-op4 15) fsdn (f-sub8 #x4d))
         (if prbit
! 	   (set (dr fsdn) (c-call DF "sh64_fnegd" (dr fsdn)))
! 	   (set fsdn (c-call SF "sh64_fnegs" fsdn))))
  
  (dshci frchg "Toggle floating point register banks"
!        (FP-INSN)
         "frchg"
         (+ (f-op16 #xfbfd))
!        (set frbit (not frbit)))
  
  (dshci fschg "Set size of floating point transfers"
!        (FP-INSN)
         "fschg"
         (+ (f-op16 #xf3fd))
!        (set szbit (not szbit)))
  
  (dshci fsqrt "Floating point square root"
!        (FP-INSN)
         "fsqrt $fsdn"
         (+ (f-op4 15) fsdn (f-sub8 #x6d))
         (if prbit
! 	   (set (dr fsdn) (c-call DF "sh64_fsqrtd" (dr fsdn)))
! 	   (set fsdn (c-call SF "sh64_fsqrts" fsdn))))
  
  (dshci fsts "Floating point store status register"
!        (FP-INSN)
        "fsts fpul, $frn"
         (+ (f-op4 15) frn (f-sub8 13))
!        (set frn fpul))
  
  (dshci fsub "Floating point subtract"
!        (FP-INSN)
         "fsub $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 1))
         (if prbit
! 	   (set (dr fsdn) (c-call DF "sh64_fsubd" (dr fsdn) (dr fsdm)))
! 	   (set fsdn (c-call SF "sh64_fsubs" fsdn fsdm))))
  
  (dshci ftrc "Floating point truncate"
!        (FP-INSN)
         "ftrc $fsdn, fpul"
         (+ (f-op4 15) fsdn (f-sub8 #x3d))
         (set fpul (if SF prbit
! 		     (c-call SF "sh64_ftrcdl" (dr fsdn))
! 		     (c-call SF "sh64_ftrcsl" fsdn))))
  
  (dshci ftrv "Floating point transform vector"
!        (FP-INSN)
         "ftrv xmtrx, $fvn"
         (+ (f-op4 15) fvn (f-sub10 #x1fd))
!        (sequence ((QI n) (SF res))
! 		 (set n (index-of fvn))
! 		 (set res (c-call SF "sh64_fmuls" (reg h-xf 0) (reg h-frc n)))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 4)  (reg h-frc (add n 1)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 8)  (reg h-frc (add n 2)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 12) (reg h-frc (add n 3)))))
! 		 (set (reg h-frc n) res)
! 		 (set res (c-call SF "sh64_fmuls" (reg h-xf 1) (reg h-frc n)))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 5)  (reg h-frc (add n 1)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 9)  (reg h-frc (add n 2)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 13) (reg h-frc (add n 3)))))
! 		 (set (reg h-frc (add n 1)) res)
! 		 (set res (c-call SF "sh64_fmuls" (reg h-xf 2) (reg h-frc n)))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 6)  (reg h-frc (add n 1)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 10) (reg h-frc (add n 2)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 14) (reg h-frc (add n 3)))))
! 		 (set (reg h-frc (add n 2)) res)
! 		 (set res (c-call SF "sh64_fmuls" (reg h-xf 3) (reg h-frc n)))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 7)  (reg h-frc (add n 1)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 11) (reg h-frc (add n 2)))))
! 		 (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 15) (reg h-frc (add n 3)))))
! 		 (set (reg h-frc (add n 3)) res)))
  
  (dshci jmp "Jump"
!        ()
         "jmp @$rn"
         (+ (f-op4 4) rn (f-sub8 43))
!        (delay 1 (set pc rn)))
  
  (dshci jsr "Jump to subroutine"
!        ()
         "jsr @$rn"
         (+ (f-op4 4) rn (f-sub8 11))
!        (delay 1 (sequence ()
! 			  (set pr (add pc 4))
! 			  (set pc rn))))
  
! (dshci ldc "Load control register (GBR)"
!        ()
         "ldc $rn, gbr"
         (+ (f-op4 4) rn (f-sub8 30))
!        (set gbr rn))
  
! (dshci ldcl "Load control register (GBR)"
!        ()
         "ldc.l @${rn}+, gbr"
         (+ (f-op4 4) rn (f-sub8 23))
         (sequence ()
  		 (set gbr (mem SI rn))
! 		 (set rn (add rn 4))))
  
  (dshci lds-fpscr "Load status register (FPSCR)"
!        ()
         "lds $rn, fpscr"
         (+ (f-op4 4) rn (f-sub8 106))
!        (set fpscr rn))
  
  (dshci ldsl-fpscr "Load status register (FPSCR)"
!        ()
         "lds.l @${rn}+, fpscr"
         (+ (f-op4 4) rn (f-sub8 102))
         (sequence ()
  		 (set fpscr (mem SI rn))
! 		 (set rn (add rn 4))))
  
  (dshci lds-fpul "Load status register (FPUL)"
!        ()
         "lds $rn, fpul"
         (+ (f-op4 4) rn (f-sub8 90))
         ; Use subword to convert rn's mode.
!        (set fpul (subword SF rn 0)))
  
  (dshci ldsl-fpul "Load status register (FPUL)"
!        ()
         "lds.l @${rn}+, fpul"
         (+ (f-op4 4) rn (f-sub8 86))
         (sequence ()
  		 (set fpul (mem SF rn))
! 		 (set rn (add rn 4))))
  
  (dshci lds-mach "Load status register (MACH)"
!        ()
         "lds $rn, mach"
         (+ (f-op4 4) rn (f-sub8 10))
!        (set mach rn))
  
  (dshci ldsl-mach "Load status register (MACH), post-increment"
!        ()
         "lds.l @${rn}+, mach"
         (+ (f-op4 4) rn (f-sub8 6))
         (sequence ()
  		 (set mach (mem SI rn))
! 		 (set rn (add rn 4))))
  
  (dshci lds-macl "Load status register (MACL)"
!        ()
         "lds $rn, macl"
         (+ (f-op4 4) rn (f-sub8 26))
!        (set macl rn))
  
  (dshci ldsl-macl "Load status register (MACL), post-increment"
!        ()
         "lds.l @${rn}+, macl"
         (+ (f-op4 4) rn (f-sub8 22))
         (sequence ()
  		 (set macl (mem SI rn))
! 		 (set rn (add rn 4))))
  
  (dshci lds-pr "Load status register (PR)"
!        ()
         "lds $rn, pr"
         (+ (f-op4 4) rn (f-sub8 42))
!        (set pr rn))
  
  (dshci ldsl-pr "Load status register (PR), post-increment"
!        ()
         "lds.l @${rn}+, pr"
         (+ (f-op4 4) rn (f-sub8 38))
         (sequence ()
  		 (set pr (mem SI rn))
! 		 (set rn (add rn 4))))
  
  (dshci macl "Multiply and accumulate (long)"
!        ()
         "mac.l @${rm}+, @${rn}+"
         (+ (f-op4 0) rn rm (f-sub4 15))
         (sequence ((DI tmpry) (DI mac) (DI result) (SI x) (SI y))
--- 745,1388 ----
  				   (if (not qbit)
  				       (set qbit (if BI (eq tmp1 0) 1 0))
  				       (set qbit (if BI tmp1 1 0))))))
! 		 (set tbit (if BI (eq qbit mbit) 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
! 
! (dshci divu "Unsigned Divide"
!        ((SH2a-nofpu-MACH))
!        "divu r0, $rn"
!        (+ (f-op4 4) rn (f-sub8 #x84))
!        (set rn (udiv rn r0))
!        (sh2a-nofpu-models ((unit u-use-gr (in usereg rn))
! 			   (unit u-use-gr (in usereg r0))
! 			   (unit u-exec (cycles 34)))))
! 
! (dshci mulr "Multiply to Register"
!        ((SH2a-nofpu-MACH))
!        "mulr r0, $rn"
!        (+ (f-op4 4) rn (f-sub8 #x80))
!        (set rn (mul rn r0))
!        (sh2a-nofpu-models ((unit u-use-gr (in usereg rn))
! 			   (unit u-use-gr (in usereg r0))
! 			   (unit u-mulr)
! 			   (unit u-mulr-gr (out loadreg rn)))))
  
  (dshci dmulsl "Multiply long (signed)"
!        ((SH2-MACH) (SH4-GROUP CO) (SH4A-GROUP EX))
         "dmuls.l $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 13))
         (sequence ((DI result))
  		 (set result (mul (ext DI rm) (ext DI rn)))
  		 (set mach (subword SI result 0))
! 		 (set macl (subword SI result 1)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-dmul))))
  
  (dshci dmulul "Multiply long (unsigned)"
!        ((SH2-MACH) (SH4-GROUP CO) (SH4A-GROUP EX))
         "dmulu.l $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 5))
         (sequence ((DI result))
  		 (set result (mul (zext DI rm) (zext DI rn)))
  		 (set mach (subword SI result 0))
! 		 (set macl (subword SI result 1)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-dmul))))
  
  (dshci dt "Decrement and set"
!        ((SH2-MACH) (SH4-GROUP EX) (SH4A-GROUP EX))
         "dt $rn"
         (+ (f-op4 4) rn (f-sub8 16))
         (sequence ()
  		 (set rn (sub rn 1))
! 		 (set tbit (eq rn 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci extsb "Sign extend byte"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "exts.b $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 14))
!        (set rn (ext SI (subword QI rm 3)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci extsw "Sign extend word"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "exts.w $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 15))
!        (set rn (ext SI (subword HI rm 1)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci extub "Zero extend byte"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "extu.b $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 12))
!        (set rn (zext SI (subword QI rm 3)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci extuw "Zero etxend word"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "extu.w $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 13))
!        (set rn (zext SI (subword HI rm 1)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci fabs "Floating point absolute"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
         "fabs $fsdn"
         (+ (f-op4 15) fsdn (f-sub8 #x5d))
         (if prbit
! 	   (set fsdn (c-call DF "sh64_fabsd" fsdn))
! 	   (set fsdn (c-call SF "sh64_fabss" fsdn)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-set-fr-0 (out loadreg fsdn)))))
  
  (dshci fadd "Floating point add"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fadd $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 0))
         (if prbit
! 	   (set fsdn (c-call DF "sh64_faddd" fsdm fsdn))
! 	   (set fsdn (c-call SF "sh64_fadds" fsdm fsdn)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdm))
! 		     (unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-fpu)
! 		     (unit u-set-fr (out loadreg fsdn)))))
  
  (dshci fcmpeq "Floating point compare equal"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fcmp/eq $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 4))
         (if prbit
! 	   (set tbit (c-call BI "sh64_fcmpeqd" fsdm fsdn))
! 	   (set tbit (c-call BI "sh64_fcmpeqs" fsdm fsdn)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdm))
! 		     (unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-fcmp)
! 		     (unit u-fpu))))
         
  (dshci fcmpgt "Floating point compare greater than"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fcmp/gt $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 5))
         (if prbit
! 	   (set tbit (c-call BI "sh64_fcmpgtd" fsdn fsdm))
! 	   (set tbit (c-call BI "sh64_fcmpgts" fsdn fsdm)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdm))
! 		     (unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-fcmp)
! 		     (unit u-fpu))))
  
  (dshci fcnvds "Floating point convert (double to single)"
!        ((SH2a-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fcnvds $drn, fpul"
!        (+ (f-op4 15) drn (f-7-1 0) (f-sub8 #xbd))
!        (set fpul (c-call SF "sh64_fcnvds" drn))
!        (sh2a-fpu-models ((unit u-use-dr (in usereg drn))
! 			 (unit u-exec)
! 			 (unit u-fcnv)
! 			 (unit u-set-fpul))))
  
  (dshci fcnvsd "Floating point convert (single to double)"
!        ((SH2a-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fcnvsd fpul, $drn"
!        (+ (f-op4 15) drn (f-7-1 0) (f-sub8 #xad))
!        (set drn (c-call DF "sh64_fcnvsd" fpul))
!        (sh2a-fpu-models ((unit u-use-fpul)
! 			 (unit u-exec)
! 			 (unit u-fcnv)
! 			 (unit u-set-dr (out loadreg drn)))))
  
  (dshci fdiv "Floating point divide"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fdiv $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 3))
         (if prbit
! 	   (set fsdn (c-call DF "sh64_fdivd" fsdn fsdm))
! 	   (set fsdn (c-call SF "sh64_fdivs" fsdn fsdm)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdm))
! 		     (unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-fdiv (out loadreg fsdn)))))
  
  (dshci fipr "Floating point inner product"
!        ((SH4-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fipr $fvm, $fvn"
         (+ (f-op4 15) fvn fvm (f-sub8 #xed))
!        (c-call VOID "sh64_fipr" (index-of fvm) (index-of fvn))
!        (sh4-models ((unit u-exec)
! 		    (unit u-fipr))))
  
  (dshci flds "Floating point load status register"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
!        "flds $frn, fpul"
         (+ (f-op4 15) frn (f-sub8 #x1d))
!        (set fpul frn)
!        (sh2e-models ((unit u-use-fr (in usereg frn))
! 		     (unit u-exec)
! 		     (unit u-flds-fpul))))
  
  (dshci fldi0 "Floating point load immediate 0.0"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
         "fldi0 $frn"
         (+ (f-op4 15) frn (f-sub8 #x8d))
!        (set frn (c-call SF "sh64_fldi0"))
!        (sh2e-models ((unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-set-fr-0 (out loadreg frn)))))
  
  (dshci fldi1 "Floating point load immediate 1.0"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
         "fldi1 $frn"
         (+ (f-op4 15) frn (f-sub8 #x9d))
!        (set frn (c-call SF "sh64_fldi1"))
!        (sh2e-models ((unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-set-fr-0 (out loadreg frn)))))
  
  (dshci float "Floating point integer conversion"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "float fpul, $fsdn"
         (+ (f-op4 15) fsdn (f-sub8 #x2d))
         (if prbit
! 	   (set fsdn (c-call DF "sh64_floatld" fpul))
! 	   (set fsdn (c-call SF "sh64_floatls" fpul)))
!        (sh2e-models ((unit u-use-fpul)
! 		     (unit u-exec)
! 		     (unit u-fpu)
! 		     (unit u-set-fr (out loadreg fsdn)))))
  
  (dshci fmac "Floating point multiply and accumulate"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fmac fr0, $frm, $frn"
         (+ (f-op4 15) frn frm (f-sub4 14))
!        (set frn (c-call SF "sh64_fmacs" fr0 frm frn))
!        (sh2e-models ((unit u-use-fr (in usereg frm))
! 		     (unit u-use-fr (in usereg frn))
! 		     (unit u-use-fr (in usereg fr0))
! 		     (unit u-exec)
! 		     (unit u-fpu)
! 		     (unit u-set-fr (out loadreg frn)))))
  
  (dshci fmov1 "Floating point move (register to register)"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
!        "fmov $fmovm, $fmovn"
!        (+ (f-op4 15) fmovn fmovm (f-sub4 12))
!        (set fmovn fmovm)
!        (sh2e-models ((unit u-use-fr (in usereg fmovm))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-set-fr-0 (out loadreg fmovn)))))
  
  (dshci fmov2 "Floating point load"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
!        "fmov @$rm, $fmovn"
!        (+ (f-op4 15) fmovn rm (f-sub4 8))
         (if (not szbit)
! 	   (set fmovn (mem SF rm))
! 	   (set fmovn (mem DF rm)))
!        (sh2e-models ((unit u-use-gr (in usereg rm))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access)
! 		     (unit u-load-fr (out loadreg fmovn)))))
  
  (dshci fmov3 "Floating point load (post-increment)"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
!        "fmov @${rm}+, fmovn"
!        (+ (f-op4 15) fmovn rm (f-sub4 9))
         (if (not szbit)
  	   (sequence ()
! 		     (set fmovn (mem SF rm))
  		     (set rm (add rm 4)))
  	   (sequence ()
! 		     (set fmovn (mem DF rm))
! 		     (set rm (add rm 8))))
!        (sh2e-models ((unit u-use-gr (in usereg rm))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access)
! 		     (unit u-load-fr (out loadreg fmovn)))))
  
  (dshci fmov4 "Floating point load (register/register indirect)"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
!        "fmov @(r0, $rm), $fmovn"
!        (+ (f-op4 15) fmovn rm (f-sub4 6))
         (if (not szbit)
! 	   (set fmovn (mem SF (add r0 rm)))
! 	   (set fmovn (mem DF (add r0 rm))))
!        (sh2e-models ((unit u-use-gr (in usereg rm))
! 		     (unit u-use-gr (in usereg r0))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access)
! 		     (unit u-load-fr (out loadreg fmovn)))))
  
  (dshci fmov5 "Floating point store"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
!        "fmov $fmovm, @$rn"
!        (+ (f-op4 15) rn fmovm (f-sub4 10))
         (if (not szbit)
! 	   (set (mem SF rn) fmovm)
! 	   (set (mem DF rn) fmovm))
!        (sh2e-models ((unit u-use-fr (in usereg fmovm))
! 		     (unit u-use-gr (in usereg rn))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access))))
  
  (dshci fmov6 "Floating point store (pre-decrement)"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
!        "fmov $fmovm, @-$rn"
!        (+ (f-op4 15) rn fmovm (f-sub4 11))
         (if (not szbit)
  	   (sequence ()
  		     (set rn (sub rn 4))
! 		     (set (mem SF rn) fmovm))
  	   (sequence ()
  		     (set rn (sub rn 8))
! 		     (set (mem DF rn) fmovm)))
!        (sh2e-models ((unit u-use-fr (in usereg fmovm))
! 		     (unit u-use-gr (in usereg rn))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access))))
  
  (dshci fmov7 "Floating point store (register/register indirect)"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
!        "fmov $fmovm, @(r0, $rn)"
!        (+ (f-op4 15) rn fmovm (f-sub4 7))
         (if (not szbit)
! 	   (set (mem SF (add r0 rn)) fmovm)
! 	   (set (mem DF (add r0 rn)) fmovm))
!        (sh2e-models ((unit u-use-fr (in usereg fmovm))
! 		     (unit u-use-gr (in usereg rn))
! 		     (unit u-use-gr (in usereg r0))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access))))
! 
! (dshci fmov8 "Load double float from memory (register indirect w/ displacement)"
!        ((SH2a-MACH) 32-BIT-INSN)
!        "fmov.d @($imm12x8, $rm), $drn"
!        (+ (f-op4 3) (f-sub4 1) (f-7-1 0) (f-16-4 7) drn rm imm12x8)
!        (set drn (mem DF (add rm imm12x8)))
!        (sh2a-fpu-models ((unit u-use-gr (in usereg rm))
! 			 (unit u-exec)
! 			 (unit u-fpu)
! 			 (unit u-fpu-memory-access (cycles 1)) ; 1 extra cycle
! 			 (unit u-load-dr (out loadreg drn)))))
! 
! (dshci fmov9 "Store double float to memory (register indirect w/ displacement)"
!        ((SH2a-MACH) 32-BIT-INSN)
!        "mov.l $drm, @($imm12x8, $rn)"
!        (+ (f-op4 3) (f-sub4 1) (f-11-1 0) (f-16-4 3) rn drm imm12x8)
!        (set (mem DF (add rn imm12x8)) drm)
!        (sh2a-fpu-models ((unit u-use-fr (in usereg drm))
! 			 (unit u-exec)
! 			 (unit u-fpu)
! 			 (unit u-fpu-memory-access (cycles 1))))) ; 1 extra cycle
  
  (dshci fmul "Floating point multiply"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fmul $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 2))
         (if prbit
! 	   (set fsdn (c-call DF "sh64_fmuld" fsdm fsdn))
! 	   (set fsdn (c-call SF "sh64_fmuls" fsdm fsdn)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdm))
! 		     (unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-fpu)
! 		     (unit u-set-fr (out loadreg fsdn)))))
  
  (dshci fneg "Floating point negate"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
         "fneg $fsdn"
         (+ (f-op4 15) fsdn (f-sub8 #x4d))
         (if prbit
! 	   (set fsdn (c-call DF "sh64_fnegd" fsdn))
! 	   (set fsdn (c-call SF "sh64_fnegs" fsdn)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-set-fr-0 (out loadreg fsdn)))))
  
  (dshci frchg "Toggle floating point register banks"
!        (FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "frchg"
         (+ (f-op16 #xfbfd))
!        (set frbit (not frbit))
!        ())
  
  (dshci fschg "Set size of floating point transfers"
!        (FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fschg"
         (+ (f-op16 #xf3fd))
!        (set szbit (not szbit))
!        ())
  
  (dshci fsqrt "Floating point square root"
!        ((MACH sh2a-fpu,sh3e,sh4,sh4a,sh5) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fsqrt $fsdn"
         (+ (f-op4 15) fsdn (f-sub8 #x6d))
         (if prbit
! 	   (set fsdn (c-call DF "sh64_fsqrtd" fsdn))
! 	   (set fsdn (c-call SF "sh64_fsqrts" fsdn)))
!        (fsqrt-models ((unit u-use-fr (in usereg fsdn))
! 		      (unit u-exec)
! 		      (unit u-fsqrt (out loadreg fsdn)))))
  
  (dshci fsts "Floating point store status register"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP LS) (SH4A-GROUP LS))
        "fsts fpul, $frn"
         (+ (f-op4 15) frn (f-sub8 13))
!        (set frn fpul)
!        (sh2e-models ((unit u-use-fpul)
! 		     (unit u-exec)
! 		     (unit u-fpu)
! 		     (unit u-set-fr-0 (out loadreg frn)))))
  
  (dshci fsub "Floating point subtract"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "fsub $fsdm, $fsdn"
         (+ (f-op4 15) fsdn fsdm (f-sub4 1))
         (if prbit
! 	   (set fsdn (c-call DF "sh64_fsubd" fsdn fsdm))
! 	   (set fsdn (c-call SF "sh64_fsubs" fsdn fsdm)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdm))
! 		     (unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-fpu)
! 		     (unit u-set-fr (out loadreg fsdn)))))
  
  (dshci ftrc "Floating point truncate"
!        ((SH2e-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "ftrc $fsdn, fpul"
         (+ (f-op4 15) fsdn (f-sub8 #x3d))
         (set fpul (if SF prbit
! 		     (c-call SF "sh64_ftrcdl" fsdn)
! 		     (c-call SF "sh64_ftrcsl" fsdn)))
!        (sh2e-models ((unit u-use-fr (in usereg fsdn))
! 		     (unit u-exec)
! 		     (unit u-fpu)
! 		     (unit u-set-fpul))))
  
  (dshci ftrv "Floating point transform vector"
!        ((SH4-MACH) FP-INSN (SH4-GROUP FE) (SH4A-GROUP FE))
         "ftrv xmtrx, $fvn"
         (+ (f-op4 15) fvn (f-sub10 #x1fd))
!        (c-call VOID "sh64_ftrv" (index-of fvn))
!        (sh4-models ((unit u-exec)
! 		    (unit u-ftrv))))
  
  (dshci jmp "Jump"
!        ((SH4-GROUP CO) (SH4A-GROUP BR))
         "jmp @$rn"
         (+ (f-op4 4) rn (f-sub8 43))
!        (sequence ()
! 		 (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		 (save-delayed-pc rn)
! 		 (set-delay 1 pc rn)
! 		 (cg-profile pc rn))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-jmp (cycles 2)))))
  
  (dshci jsr "Jump to subroutine"
!        ((SH4-GROUP CO) (SH4A-GROUP BR))
         "jsr @$rn"
         (+ (f-op4 4) rn (f-sub8 11))
!        (sequence ()
! 		 (set-delay 1 pr (add pc 4))
! 		 (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		 (save-delayed-pc rn)
! 		 (set-delay 1 pc rn)
! 		 (cg-profile pc rn))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-jsr (cycles 2)))))
  
! (dshci ldc-gbr "Load control register (GBR)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "ldc $rn, gbr"
         (+ (f-op4 4) rn (f-sub8 30))
!        (set gbr rn)
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-ldc-gbr))))
! 
! (dshci ldc-vbr "Load control register (VBR)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
!        "ldc $rn, vbr"
!        (+ (f-op4 4) rn (f-sub8 46))
!        (set vbr rn)
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec))))
! 
! (dshci ldc-sr "Load control register (SR)"
!        ((SH4-GROUP CO) (SH4A-GROUP CO))
!        "ldc $rn, sr"
!        (+ (f-op4 4) rn (f-sub8 14))
!        (set (reg h-sr) rn)
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-ldc-sr))))
  
! (dshci ldcl-gbr "Load control register (GBR)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "ldc.l @${rn}+, gbr"
         (+ (f-op4 4) rn (f-sub8 23))
         (sequence ()
  		 (set gbr (mem SI rn))
! 		 (set rn (add rn 4)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-ldcl)
! 		    (unit u-memory-access)
! 		    (unit u-load-gbr))))
! 
! (dshci ldcl-vbr "Load control register (VBR)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
!        "ldc.l @${rn}+, vbr"
!        (+ (f-op4 4) rn (f-sub8 39))
!        (sequence ()
! 		 (set vbr (mem SI rn))
! 		 (set rn (add rn 4)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-ldcl-vbr)
! 		    (unit u-memory-access)
! 		    (unit u-load-vbr))))
  
  (dshci lds-fpscr "Load status register (FPSCR)"
!        ((SH2e-MACH) (SH4-GROUP CO) (SH4A-GROUP LS))
         "lds $rn, fpscr"
         (+ (f-op4 4) rn (f-sub8 106))
!        (set fpscr rn)
!        (sh2e-models ((unit u-use-gr (in usereg rn))
! 		     (unit u-lds-fpscr))))
  
  (dshci ldsl-fpscr "Load status register (FPSCR)"
!        ((SH2e-MACH) (SH4-GROUP CO) (SH4A-GROUP LS))
         "lds.l @${rn}+, fpscr"
         (+ (f-op4 4) rn (f-sub8 102))
         (sequence ()
  		 (set fpscr (mem SI rn))
! 		 (set rn (add rn 4)))
!        (sh2e-models ((unit u-use-gr (in usereg rn))
! 		     (unit u-lds-fpscr)
! 		     (unit u-fpu-memory-access)
! 		     (unit u-ldsl-fpscr))))
  
  (dshci lds-fpul "Load status register (FPUL)"
!        ((SH2e-MACH) (SH4-GROUP LS) (SH4A-GROUP LS))
         "lds $rn, fpul"
         (+ (f-op4 4) rn (f-sub8 90))
         ; Use subword to convert rn's mode.
!        (set fpul (subword SF rn 0))
!        (sh2e-models ((unit u-use-gr (in usereg rn))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access)
! 		     (unit u-load-fpul))))
  
  (dshci ldsl-fpul "Load status register (FPUL)"
!        ((SH2e-MACH) (SH4-GROUP CO) (SH4A-GROUP LS))
         "lds.l @${rn}+, fpul"
         (+ (f-op4 4) rn (f-sub8 86))
         (sequence ()
  		 (set fpul (mem SF rn))
! 		 (set rn (add rn 4)))
!        (sh2e-models ((unit u-use-gr (in usereg rn))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access)
! 		     (unit u-load-fpul))))
  
  (dshci lds-mach "Load status register (MACH)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "lds $rn, mach"
         (+ (f-op4 4) rn (f-sub8 10))
!        (set mach rn)
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-multiply-result)
! 		    (unit u-exec)
! 		    (unit u-set-mac))))
  
  (dshci ldsl-mach "Load status register (MACH), post-increment"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "lds.l @${rn}+, mach"
         (+ (f-op4 4) rn (f-sub8 6))
         (sequence ()
  		 (set mach (mem SI rn))
! 		 (set rn (add rn 4)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-multiply-result)
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-mac))))
  
  (dshci lds-macl "Load status register (MACL)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "lds $rn, macl"
         (+ (f-op4 4) rn (f-sub8 26))
!        (set macl rn)
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-multiply-result)
! 		    (unit u-exec)
! 		    (unit u-set-mac))))
  
  (dshci ldsl-macl "Load status register (MACL), post-increment"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "lds.l @${rn}+, macl"
         (+ (f-op4 4) rn (f-sub8 22))
         (sequence ()
  		 (set macl (mem SI rn))
! 		 (set rn (add rn 4)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-multiply-result)
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-mac))))
  
  (dshci lds-pr "Load status register (PR)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "lds $rn, pr"
         (+ (f-op4 4) rn (f-sub8 42))
!        (set pr rn)
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-lds-pr))))
  
  (dshci ldsl-pr "Load status register (PR), post-increment"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "lds.l @${rn}+, pr"
         (+ (f-op4 4) rn (f-sub8 38))
         (sequence ()
  		 (set pr (mem SI rn))
! 		 (set rn (add rn 4)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-lds-pr)
! 		    (unit u-memory-access)
! 		    (unit u-load-pr))))
  
  (dshci macl "Multiply and accumulate (long)"
!        ((SH2-MACH) (SH4-GROUP CO) (SH4A-GROUP CO))
         "mac.l @${rm}+, @${rn}+"
         (+ (f-op4 0) rn rm (f-sub4 15))
         (sequence ((DI tmpry) (DI mac) (DI result) (SI x) (SI y))
***************
*** 1015,1024 ****
  					     (if (lt result min)
  						 (set result min)))))
  			   (set mach (subword SI result 0))
! 			   (set macl (subword SI result 1)))))
  
  (dshci macw "Multiply and accumulate (word)"
!        ()
         "mac.w @${rm}+, @${rn}+"
         (+ (f-op4 4) rn rm (f-sub4 15))
         (sequence ((SI tmpry) (DI mac) (DI result) (HI x) (HI y))
--- 1408,1420 ----
  					     (if (lt result min)
  						 (set result min)))))
  			   (set mach (subword SI result 0))
! 			   (set macl (subword SI result 1))))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-macl))))
  
  (dshci macw "Multiply and accumulate (word)"
!        ((SH4-GROUP CO) (SH4A-GROUP CO))
         "mac.w @${rm}+, @${rn}+"
         (+ (f-op4 4) rn rm (f-sub4 15))
         (sequence ((SI tmpry) (DI mac) (DI result) (HI x) (HI y))
***************
*** 1040,1104 ****
  			       (set mac (or DI (sll (zext DI mach) 32) (zext DI macl)))
  			       (set result (add mac (ext DI tmpry)))
  			       (set mach (subword SI result 0))
! 			       (set macl (subword SI result 1))))))
  
  (dshci mov "Move"
!        ()
         "mov $rm64, $rn64"
         (+ (f-op4 6) rn64 rm64 (f-sub4 3))
!        (set rn64 rm64))
  
  (dshci movi "Move immediate"
!        ()
         "mov #$imm8, $rn"
         (+ (f-op4 14) rn imm8)
!        (set rn (ext DI (and QI imm8 255))))
  
  (dshci movb1 "Store byte to memory (register indirect w/ zero displacement)"
!        ()
         "mov.b $rm, @$rn"
         (+ (f-op4 2) rn rm (f-sub4 0))
!        (set (mem UQI rn) (subword UQI rm 3)))
  
  (dshci movb2 "Store byte to memory (register indirect w/ pre-decrement)"
!        ()
         "mov.b $rm, @-$rn"
         (+ (f-op4 2) rn rm (f-sub4 4))
         (sequence ((DI addr))
  		 (set addr (sub rn 1))
  		 (set (mem UQI addr) (subword UQI rm 3))
! 		 (set rn addr)))
  
  (dshci movb3 "Store byte to memory (register/register indirect)"
!        ()
         "mov.b $rm, @(r0,$rn)"
         (+ (f-op4 0) rn rm (f-sub4 4))
!        (set (mem UQI (add r0 rn)) (subword UQI rm 3)))
  
  (dshci movb4 "Store byte to memory (GBR-relative w/ displacement)"
!        ()
         "mov.b r0, @($imm8, gbr)"
         (+ (f-op8 #xc0) imm8)
         (sequence ((DI addr))
  		 (set addr (add gbr imm8))
! 		 (set (mem UQI addr) (subword UQI r0 3))))
  
  (dshci movb5 "Store byte to memory (register indirect w/ displacement)"
!        ()
         "mov.b r0, @($imm4, $rm)"
         (+ (f-op8 #x80) rm imm4)
         (sequence ((DI addr))
  		 (set addr (add rm imm4))
! 		 (set (mem UQI addr) (subword UQI r0 3))))
  
  (dshci movb6 "Load byte from memory (register indirect w/ zero displacement)"
!        ()
         "mov.b @$rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 0))
!        (set rn (ext SI (mem QI rm))))
  
  (dshci movb7 "Load byte from memory (register indirect w/ post-increment)"
!        ()
         "mov.b @${rm}+, $rn"
         (+ (f-op4 6) rn rm (f-sub4 4))
         (sequence ((QI data))
--- 1436,1537 ----
  			       (set mac (or DI (sll (zext DI mach) 32) (zext DI macl)))
  			       (set result (add mac (ext DI tmpry)))
  			       (set mach (subword SI result 0))
! 			       (set macl (subword SI result 1)))))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-macw))))
  
  (dshci mov "Move"
!        ((SH4-GROUP MT) (SH4A-GROUP MT))
         "mov $rm64, $rn64"
         (+ (f-op4 6) rn64 rm64 (f-sub4 3))
!        (set rn64 rm64)
!        (all-models ((unit u-use-gr (in usereg rm64))
! 		    (unit u-exec))))
  
  (dshci movi "Move immediate"
!        ((SH4-GROUP EX) (SH4A-GROUP MT))
         "mov #$imm8, $rn"
         (+ (f-op4 14) rn imm8)
!        (set rn (ext DI (and QI imm8 255)))
!        ())
! 
! (dshci movi20 "Move immediate"
!        ((SH2a-nofpu-MACH) 32-BIT-INSN)
!        "movi20 #$imm20, $rn"
!        (+ (f-op4 0) (f-sub4 0) rn imm20)
!        (set rn imm20)
!        (sh2a-nofpu-models ((unit u-exec))))
  
  (dshci movb1 "Store byte to memory (register indirect w/ zero displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b $rm, @$rn"
         (+ (f-op4 2) rn rm (f-sub4 0))
!        (set (mem UQI rn) (subword UQI rm 3))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movb2 "Store byte to memory (register indirect w/ pre-decrement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b $rm, @-$rn"
         (+ (f-op4 2) rn rm (f-sub4 4))
         (sequence ((DI addr))
  		 (set addr (sub rn 1))
  		 (set (mem UQI addr) (subword UQI rm 3))
! 		 (set rn addr))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movb3 "Store byte to memory (register/register indirect)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b $rm, @(r0,$rn)"
         (+ (f-op4 0) rn rm (f-sub4 4))
!        (set (mem UQI (add r0 rn)) (subword UQI rm 3))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movb4 "Store byte to memory (GBR-relative w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b r0, @($imm8, gbr)"
         (+ (f-op8 #xc0) imm8)
         (sequence ((DI addr))
  		 (set addr (add gbr imm8))
! 		 (set (mem UQI addr) (subword UQI r0 3)))
!        (all-models ((unit u-exec)
! 		    (unit u-sx)
! 		    (unit u-memory-access))))
  
  (dshci movb5 "Store byte to memory (register indirect w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b r0, @($imm4, $rm)"
         (+ (f-op8 #x80) rm imm4)
         (sequence ((DI addr))
  		 (set addr (add rm imm4))
! 		 (set (mem UQI addr) (subword UQI r0 3)))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movb6 "Load byte from memory (register indirect w/ zero displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b @$rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 0))
!        (set rn (ext SI (mem QI rm)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movb7 "Load byte from memory (register indirect w/ post-increment)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b @${rm}+, $rn"
         (+ (f-op4 6) rn rm (f-sub4 4))
         (sequence ((QI data))
***************
*** 1106,1245 ****
  		 (if (eq (index-of rm) (index-of rn))
  		     (set rm (ext SI data))
  		     (set rm (add rm 1)))
! 		 (set rn (ext SI data))))
  
  (dshci movb8 "Load byte from memory (register/register indirect)"
!        ()
         "mov.b @(r0, $rm), $rn"
         (+ (f-op4 0) rn rm (f-sub4 12))
!        (set rn (ext SI (mem QI (add r0 rm)))))
  
  (dshci movb9 "Load byte from memory (GBR-relative with displacement)"
!        ()
         "mov.b @($imm8, gbr), r0"
         (+ (f-op8 #xc4) imm8)
!        (set r0 (ext SI (mem QI (add gbr imm8)))))
  
  (dshci movb10 "Load byte from memory (register indirect w/ displacement)"
!        ()
         "mov.b @($imm4, $rm), r0"
         (+ (f-op8 #x84) rm imm4)
!        (set r0 (ext SI (mem QI (add rm imm4)))))
  
  (dshci movl1 "Store long word to memory (register indirect w/ zero displacement)"
!        ()
         "mov.l $rm, @$rn"
         (+ (f-op4 2) rn rm (f-sub4 2))
!        (set (mem SI rn) rm))
  
  (dshci movl2 "Store long word to memory (register indirect w/ pre-decrement)"
!        ()
         "mov.l $rm, @-$rn"
         (+ (f-op4 2) rn rm (f-sub4 6))
         (sequence ((SI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) rm)
! 		 (set rn addr)))
  
  (dshci movl3 "Store long word to memory (register/register indirect)"
!        ()
         "mov.l $rm, @(r0, $rn)"
         (+ (f-op4 0) rn rm (f-sub4 6))
!        (set (mem SI (add r0 rn)) rm))
  
  (dshci movl4 "Store long word to memory (GBR-relative w/ displacement)"
!        ()
         "mov.l r0, @($imm8x4, gbr)"
         (+ (f-op8 #xc2) imm8x4)
!        (set (mem SI (add gbr imm8x4)) r0))
  
  (dshci movl5 "Store long word to memory (register indirect w/ displacement)"
!        ()
         "mov.l $rm, @($imm4x4, $rn)"
         (+ (f-op4 1) rn rm imm4x4)
!        (set (mem SI (add rn imm4x4)) rm))
  
  (dshci movl6 "Load long word to memory (register indirect w/ zero displacement)"
!        ()
         "mov.l @$rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 2))
!        (set rn (mem SI rm)))
  
  (dshci movl7 "Load long word from memory (register indirect w/ post-increment)"
!        ()
         "mov.l @${rm}+, $rn"
         (+ (f-op4 6) rn rm (f-sub4 6))
         (sequence ()
  		 (set rn (mem SI rm))
  		 (if (eq (index-of rm) (index-of rn))
  		     (set rm rn)
! 		     (set rm (add rm 4)))))
  
  (dshci movl8 "Load long word from memory (register/register indirect)"
!        ()
         "mov.l @(r0, $rm), $rn"
         (+ (f-op4 0) rn rm (f-sub4 14))
!        (set rn (mem SI (add r0 rm))))
  
  (dshci movl9 "Load long word from memory (GBR-relative w/ displacement)"
!        ()
         "mov.l @($imm8x4, gbr), r0"
         (+ (f-op8 #xc6) imm8x4)
!        (set r0 (mem SI (add gbr imm8x4))))
  
  (dshci movl10 "Load long word from memory (PC-relative w/ displacement)"
!        (ILLSLOT)
         "mov.l @($imm8x4, pc), $rn"
         (+ (f-op4 13) rn imm8x4)
!        (set rn (mem SI (add imm8x4 (and (add pc 4) (inv 3))))))
  
  (dshci movl11 "Load long word from memory (register indirect w/ displacement)"
!        ()
         "mov.l @($imm4x4, $rm), $rn"
         (+ (f-op4 5) rn rm imm4x4)
!        (set rn (mem SI (add rm imm4x4))))
  
  (dshci movw1 "Store word to memory (register indirect w/ zero displacement)"
!        ()
         "mov.w $rm, @$rn"
         (+ (f-op4 2) rn rm (f-sub4 1))
!        (set (mem HI rn) (subword HI rm 1)))
  
  (dshci movw2 "Store word to memory (register indirect w/ pre-decrement)"
!        ()
         "mov.w $rm, @-$rn"
         (+ (f-op4 2) rn rm (f-sub4 5))
         (sequence ((DI addr))
  		 (set addr (sub rn 2))
  		 (set (mem HI addr) (subword HI rm 1))
! 		 (set rn addr)))
  
  (dshci movw3 "Store word to memory (register/register indirect)"
!        ()
         "mov.w $rm, @(r0, $rn)"
         (+ (f-op4 0) rn rm (f-sub4 5))
!        (set (mem HI (add r0 rn)) (subword HI rm 1)))
  
  (dshci movw4 "Store word to memory (GBR-relative w/ displacement)"
!        ()
         "mov.w r0, @($imm8x2, gbr)"
         (+ (f-op8 #xc1) imm8x2)
!        (set (mem HI (add gbr imm8x2)) (subword HI r0 1)))
  
  (dshci movw5 "Store word to memory (register indirect w/ displacement)"
!        ()
         "mov.w r0, @($imm4x2, $rm)"
         (+ (f-op8 #x81) rm imm4x2)
!        (set (mem HI (add rm imm4x2)) (subword HI r0 1)))
  
  (dshci movw6 "Load word from memory (register indirect w/ zero displacement)"
!        ()
         "mov.w @$rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 1))
!        (set rn (ext SI (mem HI rm))))
  
  (dshci movw7 "Load word from memory (register indirect w/ post-increment)"
!        ()
         "mov.w @${rm}+, $rn"
         (+ (f-op4 6) rn rm (f-sub4 5))
         (sequence ((HI data))
--- 1539,1782 ----
  		 (if (eq (index-of rm) (index-of rn))
  		     (set rm (ext SI data))
  		     (set rm (add rm 1)))
! 		 (set rn (ext SI data)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movb8 "Load byte from memory (register/register indirect)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b @(r0, $rm), $rn"
         (+ (f-op4 0) rn rm (f-sub4 12))
!        (set rn (ext SI (mem QI (add r0 rm))))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movb9 "Load byte from memory (GBR-relative with displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b @($imm8, gbr), r0"
         (+ (f-op8 #xc4) imm8)
!        (set r0 (ext SI (mem QI (add gbr imm8))))
!        (all-models ((unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg r0)))))
  
  (dshci movb10 "Load byte from memory (register indirect w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.b @($imm4, $rm), r0"
         (+ (f-op8 #x84) rm imm4)
!        (set r0 (ext SI (mem QI (add rm imm4))))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg r0)))))
  
  (dshci movl1 "Store long word to memory (register indirect w/ zero displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l $rm, @$rn"
         (+ (f-op4 2) rn rm (f-sub4 2))
!        (set (mem SI rn) rm)
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movl2 "Store long word to memory (register indirect w/ pre-decrement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l $rm, @-$rn"
         (+ (f-op4 2) rn rm (f-sub4 6))
         (sequence ((SI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) rm)
! 		 (set rn addr))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movl3 "Store long word to memory (register/register indirect)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l $rm, @(r0, $rn)"
         (+ (f-op4 0) rn rm (f-sub4 6))
!        (set (mem SI (add r0 rn)) rm)
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movl4 "Store long word to memory (GBR-relative w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l r0, @($imm8x4, gbr)"
         (+ (f-op8 #xc2) imm8x4)
!        (set (mem SI (add gbr imm8x4)) r0)
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-sx)
! 		    (unit u-memory-access))))
  
  (dshci movl5 "Store long word to memory (register indirect w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l $rm, @($imm4x4, $rn)"
         (+ (f-op4 1) rn rm imm4x4)
!        (set (mem SI (add rn imm4x4)) rm)
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movl6 "Load long word to memory (register indirect w/ zero displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l @$rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 2))
!        (set rn (mem SI rm))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movl7 "Load long word from memory (register indirect w/ post-increment)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l @${rm}+, $rn"
         (+ (f-op4 6) rn rm (f-sub4 6))
         (sequence ()
  		 (set rn (mem SI rm))
  		 (if (eq (index-of rm) (index-of rn))
  		     (set rm rn)
! 		     (set rm (add rm 4))))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movl8 "Load long word from memory (register/register indirect)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l @(r0, $rm), $rn"
         (+ (f-op4 0) rn rm (f-sub4 14))
!        (set rn (mem SI (add r0 rm)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movl9 "Load long word from memory (GBR-relative w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l @($imm8x4, gbr), r0"
         (+ (f-op8 #xc6) imm8x4)
!        (set r0 (mem SI (add gbr imm8x4)))
!        (all-models ((unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg r0)))))
  
  (dshci movl10 "Load long word from memory (PC-relative w/ displacement)"
!        (ILLSLOT (SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l @($imm8x4, pc), $rn"
         (+ (f-op4 13) rn imm8x4)
!        (set rn (mem SI (add imm8x4 (and (add pc 4) (inv 3)))))
!        (all-models ((unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movl11 "Load long word from memory (register indirect w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.l @($imm4x4, $rm), $rn"
         (+ (f-op4 5) rn rm imm4x4)
!        (set rn (mem SI (add rm imm4x4)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
! 
! (dshci movl12 "Load long word from memory (register indirect w/ displacement)"
!        ((SH2a-nofpu-MACH) 32-BIT-INSN)
!        "mov.l @($imm12x4, $rm), $rn"
!        (+ (f-op4 3) (f-sub4 1) (f-16-4 6) rn rm imm12x4)
!        (set rn (mem SI (add rm imm12x4)))
!        (sh2a-nofpu-models ((unit u-use-gr (in usereg rm))
! 			   (unit u-exec)
! 			   (unit u-memory-access)
! 			   (unit u-load-gr (out loadreg rn)))))
! 
! (dshci movl13 "Store long word to memory (register indirect w/ displacement)"
!        ((SH2a-nofpu-MACH) 32-BIT-INSN)
!        "mov.l $rm, @($imm12x4, $rn)"
!        (+ (f-op4 3) (f-sub4 1) (f-16-4 2) rn rm imm12x4)
!        (set (mem SI (add rn imm12x4)) rm)
!        (sh2a-nofpu-models ((unit u-use-gr (in usereg rm))
! 			   (unit u-exec)
! 			   (unit u-memory-access))))
  
  (dshci movw1 "Store word to memory (register indirect w/ zero displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w $rm, @$rn"
         (+ (f-op4 2) rn rm (f-sub4 1))
!        (set (mem HI rn) (subword HI rm 1))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movw2 "Store word to memory (register indirect w/ pre-decrement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w $rm, @-$rn"
         (+ (f-op4 2) rn rm (f-sub4 5))
         (sequence ((DI addr))
  		 (set addr (sub rn 2))
  		 (set (mem HI addr) (subword HI rm 1))
! 		 (set rn addr))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movw3 "Store word to memory (register/register indirect)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w $rm, @(r0, $rn)"
         (+ (f-op4 0) rn rm (f-sub4 5))
!        (set (mem HI (add r0 rn)) (subword HI rm 1))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movw4 "Store word to memory (GBR-relative w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w r0, @($imm8x2, gbr)"
         (+ (f-op8 #xc1) imm8x2)
!        (set (mem HI (add gbr imm8x2)) (subword HI r0 1))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-sx)
! 		    (unit u-memory-access))))
  
  (dshci movw5 "Store word to memory (register indirect w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w r0, @($imm4x2, $rm)"
         (+ (f-op8 #x81) rm imm4x2)
!        (set (mem HI (add rm imm4x2)) (subword HI r0 1))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci movw6 "Load word from memory (register indirect w/ zero displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w @$rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 1))
!        (set rn (ext SI (mem HI rm)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movw7 "Load word from memory (register indirect w/ post-increment)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w @${rm}+, $rn"
         (+ (f-op4 6) rn rm (f-sub4 5))
         (sequence ((HI data))
***************
*** 1247,1729 ****
  		 (if (eq (index-of rm) (index-of rn))
  		     (set rm (ext SI data))
  		     (set rm (add rm 2)))
! 		 (set rn (ext SI data))))
  
  (dshci movw8 "Load word from memory (register/register indirect)"
!        ()
         "mov.w @(r0, $rm), $rn"
         (+ (f-op4 0) rn rm (f-sub4 13))
!        (set rn (ext SI (mem HI (add r0 rm)))))
  
  (dshci movw9 "Load word from memory (GBR-relative w/ displacement)"
!        ()
         "mov.w @($imm8x2, gbr), r0"
         (+ (f-op8 #xc5) imm8x2)
!        (set r0 (ext SI (mem HI (add gbr imm8x2)))))
  
  (dshci movw10 "Load word from memory (PC-relative w/ displacement)"
!        (ILLSLOT)
         "mov.w @($imm8x2, pc), $rn"
         (+ (f-op4 9) rn imm8x2)
!        (set rn (ext SI (mem HI (add (add pc 4) imm8x2)))))
  
  (dshci movw11 "Load word from memory (register indirect w/ displacement)"
!        ()
         "mov.w @($imm4x2, $rm), r0"
         (+ (f-op8 #x85) rm imm4x2)
!        (set r0 (ext SI (mem HI (add rm imm4x2)))))
  
  (dshci mova "Move effective address"
!        (ILLSLOT)
         "mova @($imm8x4, pc), r0"
         (+ (f-op8 #xc7) imm8x4)
!        (set r0 (add (and (add pc 4) (inv 3)) imm8x4)))
  
  (dshci movcal "Move with cache block allocation"
!        ()
         "movca.l r0, @$rn"
         (+ (f-op4 0) rn (f-sub8 #xc3))
!        (set (mem SI rn) r0))
         
  (dshci movt "Move t-bit"
!        ()
         "movt $rn"
         (+ (f-op4 0) rn (f-sub8 41))
!        (set rn (zext SI tbit)))
  
  (dshci mull "Multiply"
!        ()
         "mul.l $rm, $rn"
         (+ (f-op4 0) rn rm (f-sub4 7))
!        (set macl (mul rm rn)))
  
  (dshci mulsw "Multiply words (signed)"
!        ()
         "muls.w $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 15))
!        (set macl (mul (ext SI (subword HI rm 1)) (ext SI (subword HI rn 1)))))
  
  (dshci muluw "Multiply words (unsigned)"
!        ()
         "mulu.w $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 14))
!        (set macl (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))))
  
  (dshci neg "Negate"
!        ()
         "neg $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 11))
!        (set rn (neg rm)))
  
  (dshci negc "Negate with carry"
!        ()
         "negc $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 10))
         (sequence ((BI flag))
  		 (set flag (sub-cflag 0 rm tbit))
  		 (set rn (subc 0 rm tbit))
! 		 (set tbit flag)))
  
  (dshci nop "No operation"
!        ()
         "nop"
         (+ (f-op16 9))
!        (nop))
  
  (dshci not "Bitwise NOT"
!        ()
         "not $rm64, $rn64"
         (+ (f-op4 6) rn64 rm64 (f-sub4 7))
!        (set rn64 (inv rm64)))
  
  (dshci ocbi "Invalidate operand cache block"
!        ()
         "ocbi @$rn"
         (+ (f-op4 0) rn (f-sub8 147))
!        (unimp "ocbi"))
  
  (dshci ocbp "Purge operand cache block"
!        ()
         "ocbp @$rn"
         (+ (f-op4 0) rn (f-sub8 163))
!        (unimp "ocbp"))
  
  (dshci ocbwb "Write back operand cache block"
!        ()
         "ocbwb @$rn"
         (+ (f-op4 0) rn (f-sub8 179))
!        (unimp "ocbwb"))
  
  (dshci or "Bitwise OR"
!        ()
         "or $rm64, $rn64"
         (+ (f-op4 2) rn64 rm64 (f-sub4 11))
!        (set rn64 (or rm64 rn64)))
  
  (dshci ori "Bitwise OR immediate"
!        ()
         "or #$uimm8, r0"
         (+ (f-op8 #xcb) uimm8)
!        (set r0 (or r0 (zext DI uimm8))))
  
  (dshci orb "Bitwise OR immediate"
!        ()
         "or.b #$imm8, @(r0, gbr)"
         (+ (f-op8 #xcf) imm8)
         (sequence ((DI addr) (UQI data))
  		 (set addr (add r0 gbr))
  		 (set data (or (mem UQI addr) imm8))
! 		 (set (mem UQI addr) data)))
  
  (dshci pref "Prefetch data"
!        ()
         "pref @$rn"
         (+ (f-op4 0) rn (f-sub8 131))
!        (unimp "pref"))
  
  (dshci rotcl "Rotate with carry left"
!        ()
         "rotcl $rn"
         (+ (f-op4 4) rn (f-sub8 36))
         (sequence ((BI temp))
  		 (set temp (srl rn 31))
  		 (set rn (or (sll rn 1) tbit))
! 		 (set tbit (if BI temp 1 0))))
  
  (dshci rotcr "Rotate with carry right"
!        ()
         "rotcr $rn"
         (+ (f-op4 4) rn (f-sub8 37))
         (sequence ((BI lsbit) (SI temp))
  		 (set lsbit (if BI (eq (and rn 1) 0) 0 1))
  		 (set temp tbit)
  		 (set rn (or (srl rn 1) (sll temp 31)))
! 		 (set tbit (if BI lsbit 1 0))))
  
  (dshci rotl "Rotate left"
!        ()
         "rotl $rn"
         (+ (f-op4 4) rn (f-sub8 4))
         (sequence ((BI temp))
  		 (set temp (srl rn 31))
  		 (set rn (or (sll rn 1) temp))
! 		 (set tbit (if BI temp 1 0))))
  
  (dshci rotr "Rotate right"
!        ()
         "rotr $rn"
         (+ (f-op4 4) rn (f-sub8 5))
         (sequence ((BI lsbit) (SI temp))
  		 (set lsbit (if BI (eq (and rn 1) 0) 0 1))
  		 (set temp lsbit)
  		 (set rn (or (srl rn 1) (sll temp 31)))
! 		 (set tbit (if BI lsbit 1 0))))
  
  (dshci rts "Return from subroutine"
!        ()
         "rts"
         (+ (f-op16 11))
!        (delay 1 (set pc pr)))
  
  (dshci sets "Set S-bit"
!        ()
         "sets"
         (+ (f-op16 88))
!        (set sbit 1))
  
  (dshci sett "Set T-bit"
!        ()
         "sett"
         (+ (f-op16 24))
!        (set tbit 1))
  
  (dshci shad "Shift arithmetic dynamic"
!        ()
         "shad $rm, $rn"
         (+ (f-op4 4) rn rm (f-sub4 12))
!        (sequence ((QI shamt))
! 		 (set shamt (and QI rm 31))
  		 (if (ge rm 0)
  		     (set rn (sll rn shamt))
  		     (if (ne shamt 0)
  			 (set rn (sra rn (sub 32 shamt)))
  			 (if (lt rn 0)
  			     (set rn (neg 1))
! 			     (set rn 0))))))
  
  (dshci shal "Shift left arithmetic one bit"
!        ()
         "shal $rn"
         (+ (f-op4 4) rn (f-sub8 32))
         (sequence ((BI t))
  		 (set t (srl rn 31))
  		 (set rn (sll rn 1))
! 		 (set tbit (if BI t 1 0))))
  
  (dshci shar "Shift right arithmetic one bit"
!        ()
         "shar $rn"
         (+ (f-op4 4) rn (f-sub8 33))
         (sequence ((BI t))
  		 (set t (and rn 1))
  		 (set rn (sra rn 1))
! 		 (set tbit (if BI t 1 0))))
  
  (dshci shld "Shift logical dynamic"
!        ()
         "shld $rm, $rn"
         (+ (f-op4 4) rn rm (f-sub4 13))
!        (sequence ((QI shamt))
! 		 (set shamt (and QI rm 31))
  		 (if (ge rm 0)
  		     (set rn (sll rn shamt))
  		     (if (ne shamt 0)
  			 (set rn (srl rn (sub 32 shamt)))
! 			 (set rn 0)))))
  
  (dshci shll "Shift left logical one bit"
!        ()
         "shll $rn"
         (+ (f-op4 4) rn (f-sub8 0))
         (sequence ((BI t))
  		 (set t (srl rn 31))
  		 (set rn (sll rn 1))
! 		 (set tbit (if BI t 1 0))))
  
  (dshci shll2 "Shift left logical two bits"
!        ()
         "shll2 $rn"
         (+ (f-op4 4) rn (f-sub8 8))
!        (set rn (sll rn 2)))
  
  (dshci shll8 "Shift left logical eight bits"
!        ()
         "shll8 $rn"
         (+ (f-op4 4) rn (f-sub8 24))
!        (set rn (sll rn 8)))
  
  (dshci shll16 "Shift left logical sixteen bits"
!        ()
         "shll16 $rn"
         (+ (f-op4 4) rn (f-sub8 40))
!        (set rn (sll rn 16)))
  
  (dshci shlr "Shift right logical one bit"
!        ()
         "shlr $rn"
         (+ (f-op4 4) rn (f-sub8 1))
         (sequence ((BI t))
  		 (set t (and rn 1))
  		 (set rn (srl rn 1))
! 		 (set tbit (if BI t 1 0))))
  
  (dshci shlr2 "Shift right logical two bits"
!        ()
         "shlr2 $rn"
         (+ (f-op4 4) rn (f-sub8 9))
!        (set rn (srl rn 2)))
  
  (dshci shlr8 "Shift right logical eight bits"
!        ()
         "shlr8 $rn"
         (+ (f-op4 4) rn (f-sub8 25))
!        (set rn (srl rn 8)))
  
  (dshci shlr16 "Shift right logical sixteen bits"
!        ()
         "shlr16 $rn"
         (+ (f-op4 4) rn (f-sub8 41))
!        (set rn (srl rn 16)))
  
  (dshci stc-gbr "Store control register (GBR)"
!        ()
         "stc gbr, $rn"
         (+ (f-op4 0) rn (f-sub8 18))
!        (set rn gbr))
  
  (dshci stcl-gbr "Store control register (GBR)"
!        ()
         "stc.l gbr, @-$rn"
         (+ (f-op4 4) rn (f-sub8 19))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) gbr)
! 		 (set rn addr)))
  
  (dshci sts-fpscr "Store status register (FPSCR)"
!        ()
         "sts fpscr, $rn"
         (+ (f-op4 0) rn (f-sub8 106))
!        (set rn fpscr))
  
  (dshci stsl-fpscr "Store status register (FPSCR)"
!        ()
         "sts.l fpscr, @-$rn"
         (+ (f-op4 4) rn (f-sub8 98))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) fpscr)
! 		 (set rn addr)))
  
! (dshci sts-fpul "Store status register (FPUL)"
!        ()
         "sts fpul, $rn"
         (+ (f-op4 0) rn (f-sub8 90))
!        (set rn (subword SI fpul 0)))
  
  (dshci stsl-fpul "Store status register (FPUL)"
!        ()
         "sts.l fpul, @-$rn"
         (+ (f-op4 4) rn (f-sub8 82))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SF addr) fpul)
! 		 (set rn addr)))
  
  (dshci sts-mach "Store status register (MACH)"
!        ()
         "sts mach, $rn"
         (+ (f-op4 0) rn (f-sub8 10))
!        (set rn mach))
  
  (dshci stsl-mach "Store status register (MACH)"
!        ()
         "sts.l mach, @-$rn"
         (+ (f-op4 4) rn (f-sub8 2))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) mach)
! 		 (set rn addr)))
  
  (dshci sts-macl "Store status register (MACL)"
!        ()
         "sts macl, $rn"
         (+ (f-op4 0) rn (f-sub8 26))
!        (set rn macl))
  
  (dshci stsl-macl "Store status register (MACL)"
!        ()
         "sts.l macl, @-$rn"
         (+ (f-op4 4) rn (f-sub8 18))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) macl)
! 		 (set rn addr)))
  
  (dshci sts-pr "Store status register (PR)"
!        ()
         "sts pr, $rn"
         (+ (f-op4 0) rn (f-sub8 42))
!        (set rn pr))
  
  (dshci stsl-pr "Store status register (PR)"
!        ()
         "sts.l pr, @-$rn"
         (+ (f-op4 4) rn (f-sub8 34))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) pr)
! 		 (set rn addr)))
  
  (dshci sub "Subtract"
!        ()
         "sub $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 8))
!        (set rn (sub rn rm)))
  
  (dshci subc "Subtract and detect carry"
!        ()
         "subc $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 10))
         (sequence ((BI flag))
  		 (set flag (sub-cflag rn rm tbit))
  		 (set rn (subc rn rm tbit))
! 		 (set tbit flag)))
  
  (dshci subv "Subtract and detect overflow"
!        ()
         "subv $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 11))
         (sequence ((BI t))
  		 (set t (sub-oflag rn rm 0))
  		 (set rn (sub rn rm))
! 		 (set tbit (if BI t 1 0))))
  
  (dshci swapb "Swap bytes"
!        ()
         "swap.b $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 8))
         (sequence ((UHI top-half) (UQI byte1) (UQI byte0))
  		 (set top-half (subword HI rm 0))
  		 (set byte1 (subword QI rm 2))
  		 (set byte0 (subword QI rm 3))
! 		 (set rn (or SI (sll SI top-half 16) (or SI (sll SI byte0 8) byte1)))))
  
  (dshci swapw "Swap words"
!        ()
         "swap.w $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 9))
!        (set rn (or (srl rm 16) (sll rm 16))))
  
  (dshci tasb "Test and set byte"
!        ()
         "tas.b @$rn"
         (+ (f-op4 4) rn (f-sub8 27))
         (sequence ((UQI byte))
  		 (set byte (mem UQI rn))
  		 (set tbit (if BI (eq byte 0) 1 0))
  		 (set byte (or byte 128))
! 		 (set (mem UQI rn) byte)))
  
  (dshci trapa "Trap"
!        (ILLSLOT)
         "trapa #$uimm8"
         (+ (f-op8 #xc3) uimm8)
!        (c-call "sh64_compact_trapa" uimm8 pc))
  
  (dshci tst "Test and set t-bit"
!        ()
         "tst $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 8))
!        (set tbit (if BI (eq (and rm rn) 0) 1 0)))
  
  (dshci tsti "Test and set t-bit immediate" 
!        ()
         "tst #$uimm8, r0"
         (+ (f-op8 #xc8) uimm8)
!        (set tbit (if BI (eq (and r0 (zext SI uimm8)) 0) 1 0)))
  
  (dshci tstb "Test and set t-bit immedate with memory byte"
!        ()
         "tst.b #$imm8, @(r0, gbr)"
         (+ (f-op8 #xcc) imm8)
         (sequence ((DI addr))
  		 (set addr (add r0 gbr))
! 		 (set tbit (if BI (eq (and (mem UQI addr) imm8) 0) 1 0))))
  
  (dshci xor "Exclusive OR"
!        ()
         "xor $rm64, $rn64"
         (+ (f-op4 2) rn64 rm64 (f-sub4 10))
!        (set rn64 (xor rn64 rm64)))
  
  (dshci xori "Exclusive OR immediate"
!        ()
         "xor #$uimm8, r0"
         (+ (f-op8 #xca) uimm8)
!        (set (reg h-gr 0) (xor (reg h-gr 0) (zext DI uimm8))))
  
  (dshci xorb "Exclusive OR immediate with memory byte"
!        ()
         "xor.b #$imm8, @(r0, gbr)"
         (+ (f-op8 #xce) imm8)
         (sequence ((DI addr) (UQI data))
  		 (set addr (add r0 gbr))
  		 (set data (xor (mem UQI addr) imm8))
! 		 (set (mem UQI addr) data)))
  
  (dshci xtrct "Extract"
!        ()
         "xtrct $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 13))
!        (set rn (or (sll rm 16) (srl rn 16))))
--- 1784,2560 ----
  		 (if (eq (index-of rm) (index-of rn))
  		     (set rm (ext SI data))
  		     (set rm (add rm 2)))
! 		 (set rn (ext SI data)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movw8 "Load word from memory (register/register indirect)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w @(r0, $rm), $rn"
         (+ (f-op4 0) rn rm (f-sub4 13))
!        (set rn (ext SI (mem HI (add r0 rm))))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-gr (in usereg r0))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movw9 "Load word from memory (GBR-relative w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w @($imm8x2, gbr), r0"
         (+ (f-op8 #xc5) imm8x2)
!        (set r0 (ext SI (mem HI (add gbr imm8x2))))
!        (all-models ((unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg r0)))))
  
  (dshci movw10 "Load word from memory (PC-relative w/ displacement)"
!        (ILLSLOT (SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w @($imm8x2, pc), $rn"
         (+ (f-op4 9) rn imm8x2)
!        (set rn (ext SI (mem HI (add (add pc 4) imm8x2))))
!        (all-models ((unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg rn)))))
  
  (dshci movw11 "Load word from memory (register indirect w/ displacement)"
!        ((SH4-GROUP LS) (SH4A-GROUP LS))
         "mov.w @($imm4x2, $rm), r0"
         (+ (f-op8 #x85) rm imm4x2)
!        (set r0 (ext SI (mem HI (add rm imm4x2))))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-memory-access)
! 		    (unit u-load-gr (out loadreg r0)))))
  
  (dshci mova "Move effective address"
!        (ILLSLOT (SH4-GROUP EX) (SH4A-GROUP LS))
         "mova @($imm8x4, pc), r0"
         (+ (f-op8 #xc7) imm8x4)
!        (set r0 (add (and (add pc 4) (inv 3)) imm8x4))
!        ())
  
  (dshci movcal "Move with cache block allocation"
!        ((SH4-nofpu-MACH) (SH4-GROUP LS) (SH4A-GROUP LS))
         "movca.l r0, @$rn"
         (+ (f-op4 0) rn (f-sub8 #xc3))
!        (set (mem SI rn) r0)
!        (sh4-nofpu-models ((unit u-use-gr (in usereg rn))
! 			  (unit u-ocb (cycles 6)))))
         
+ (dshci movcol "Move Conditional"
+        ((SH4a-nofpu-MACH) (SH4A-GROUP CO))
+        "movco.l r0, @$rn"
+        (+ (f-op4 0) rn (f-sub8 #x73))
+        ; Never executes since LDST and movli are not implemented
+        (set rn rn) ; hack to allow profiling
+        (sh4a-nofpu-models ((unit u-use-gr (in usereg rn))
+ 			   (unit u-exec))))
+ 
  (dshci movt "Move t-bit"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "movt $rn"
         (+ (f-op4 0) rn (f-sub8 41))
!        (set rn (zext SI tbit))
!        (all-models ((unit u-use-tbit)
! 		    (unit u-exec))))
! 
! (dshci movual "Move unaligned"
!        ((SH4a-nofpu-MACH) (SH4A-GROUP LS))
!        "movua.l @$rn, r0"
!        (+ (f-op4 4) rn (f-sub8 #xa9))
!        (set r0 (c-call SI "sh64_movua" pc rn))
!        (sh4a-nofpu-models ((unit u-use-gr (in usereg rn))
! 			   (unit u-exec)
! 			   (unit u-memory-access (cycles 1))
! 			   (unit u-load-gr (out loadreg r0)))))
! 
! (dshci movual2 "Move unaligned with post increment"
!        ((SH4a-nofpu-MACH) (SH4A-GROUP LS))
!        "movua.l @$rn+, r0"
!        (+ (f-op4 4) rn (f-sub8 #xe9))
!        (sequence ()
! 		 (set r0 (c-call SI "sh64_movua" pc rn))
! 		 (set rn (add rn 4)))
!        (sh4a-nofpu-models ((unit u-use-gr (in usereg rn))
! 			   (unit u-exec)
! 			   (unit u-memory-access (cycles 1))
! 			   (unit u-load-gr (out loadreg r0)))))
  
  (dshci mull "Multiply"
!        ((SH2-MACH) (SH4-GROUP CO) (SH4A-GROUP EX))
         "mul.l $rm, $rn"
         (+ (f-op4 0) rn rm (f-sub4 7))
!        (set macl (mul rm rn))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-mull))))
  
  (dshci mulsw "Multiply words (signed)"
!        ((SH4-GROUP CO) (SH4A-GROUP EX))
         "muls.w $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 15))
!        (set macl (mul (ext SI (subword HI rm 1)) (ext SI (subword HI rn 1))))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-mulsw)
! 		    (unit u-multiply))))
  
  (dshci muluw "Multiply words (unsigned)"
!        ((SH4-GROUP CO) (SH4A-GROUP EX))
         "mulu.w $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 14))
!        (set macl (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1))))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-mulsw)
! 		    (unit u-multiply))))
  
  (dshci neg "Negate"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "neg $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 11))
!        (set rn (neg rm))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec))))
  
  (dshci negc "Negate with carry"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "negc $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 10))
         (sequence ((BI flag))
  		 (set flag (sub-cflag 0 rm tbit))
  		 (set rn (subc 0 rm tbit))
! 		 (set tbit flag))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci nop "No operation"
!        ((SH4-GROUP MT) (SH4A-GROUP MT))
         "nop"
         (+ (f-op16 9))
!        (nop)
!        ())
  
  (dshci not "Bitwise NOT"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "not $rm64, $rn64"
         (+ (f-op4 6) rn64 rm64 (f-sub4 7))
!        (set rn64 (inv rm64))
!        (all-models ((unit u-use-gr (in usereg rm64))
! 		    (unit u-exec))))
  
  (dshci ocbi "Invalidate operand cache block"
!        ((SH4-nofpu-MACH) (SH4-GROUP LS) (SH4A-GROUP LS))
         "ocbi @$rn"
         (+ (f-op4 0) rn (f-sub8 147))
!        (sequence ()
! 		 (set rn rn) ; appease CGEN profiling generation for now
! 		 (unimp "ocbi"))
!        (sh4-nofpu-models ((unit u-use-gr (in usereg rn))
! 			  (unit u-ocb (cycles 1)))))
  
  (dshci ocbp "Purge operand cache block"
!        ((SH4-nofpu-MACH) (SH4-GROUP LS) (SH4A-GROUP LS))
         "ocbp @$rn"
         (+ (f-op4 0) rn (f-sub8 163))
!        (sequence ()
! 		 (set rn rn) ; appease CGEN profiling generation for now
! 		 (unimp "ocbp"))
!        (sh4-nofpu-models ((unit u-use-gr (in usereg rn))
! 			  (unit u-ocb (cycles 4)))))
  
  (dshci ocbwb "Write back operand cache block"
!        ((SH4-nofpu-MACH) (SH4-GROUP LS) (SH4A-GROUP LS))
         "ocbwb @$rn"
         (+ (f-op4 0) rn (f-sub8 179))
!        (sequence ()
! 		 (set rn rn) ; appease CGEN profiling generation for now
! 		 (unimp "ocbwb"))
!        (sh4-nofpu-models ((unit u-use-gr (in usereg rn))
! 			  (unit u-ocb (cycles 4)))))
  
  (dshci or "Bitwise OR"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "or $rm64, $rn64"
         (+ (f-op4 2) rn64 rm64 (f-sub4 11))
!        (set rn64 (or rm64 rn64))
!        (all-models ((unit u-use-gr (in usereg rm64))
! 		    (unit u-use-gr (in usereg rn64))
! 		    (unit u-exec))))
  
  (dshci ori "Bitwise OR immediate"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "or #$uimm8, r0"
         (+ (f-op8 #xcb) uimm8)
!        (set r0 (or r0 (zext DI uimm8)))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-exec))))
  
  (dshci orb "Bitwise OR immediate"
!        ((SH4-GROUP CO) (SH4A-GROUP CO))
         "or.b #$imm8, @(r0, gbr)"
         (+ (f-op8 #xcf) imm8)
         (sequence ((DI addr) (UQI data))
  		 (set addr (add r0 gbr))
  		 (set data (or (mem UQI addr) imm8))
! 		 (set (mem UQI addr) data))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-logic-b)
! 		    (unit u-memory-access))))
  
  (dshci pref "Prefetch data"
!        ((SH3-MACH) (SH4-GROUP LS) (SH4A-GROUP LS))
         "pref @$rn"
         (+ (f-op4 0) rn (f-sub8 131))
!        (c-call VOID "sh64_pref" rn)
!        (sh3-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci rotcl "Rotate with carry left"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "rotcl $rn"
         (+ (f-op4 4) rn (f-sub8 36))
         (sequence ((BI temp))
  		 (set temp (srl rn 31))
  		 (set rn (or (sll rn 1) tbit))
! 		 (set tbit (if BI temp 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-shift)
! 		    (unit u-set-sr-bit))))
  
  (dshci rotcr "Rotate with carry right"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "rotcr $rn"
         (+ (f-op4 4) rn (f-sub8 37))
         (sequence ((BI lsbit) (SI temp))
  		 (set lsbit (if BI (eq (and rn 1) 0) 0 1))
  		 (set temp tbit)
  		 (set rn (or (srl rn 1) (sll temp 31)))
! 		 (set tbit (if BI lsbit 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-shift)
! 		    (unit u-set-sr-bit))))
  
  (dshci rotl "Rotate left"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "rotl $rn"
         (+ (f-op4 4) rn (f-sub8 4))
         (sequence ((BI temp))
  		 (set temp (srl rn 31))
  		 (set rn (or (sll rn 1) temp))
! 		 (set tbit (if BI temp 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-shift)
! 		    (unit u-set-sr-bit))))
  
  (dshci rotr "Rotate right"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "rotr $rn"
         (+ (f-op4 4) rn (f-sub8 5))
         (sequence ((BI lsbit) (SI temp))
  		 (set lsbit (if BI (eq (and rn 1) 0) 0 1))
  		 (set temp lsbit)
  		 (set rn (or (srl rn 1) (sll temp 31)))
! 		 (set tbit (if BI lsbit 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-shift)
! 		    (unit u-set-sr-bit))))
  
  (dshci rts "Return from subroutine"
!        ((SH4-GROUP CO) (SH4A-GROUP BR))
         "rts"
         (+ (f-op16 11))
!        (sequence ()
! 		 (set pc (add pc 2)) ; kludge to get it marked as referenced
! 		 (save-delayed-pc pr)
! 		 (set-delay 1 pc pr)
! 		 (notify-ret pr))
!        ; delayed branch stalls 1 cycle
!        (all-models ((unit u-jmp (cycles 2)))))
  
  (dshci sets "Set S-bit"
!        ((SH3-MACH) (SH4-GROUP CO) (SH4A-GROUP EX))
         "sets"
         (+ (f-op16 88))
!        (set sbit 1)
!        (sh3-models ((unit u-exec)
! 		    (unit u-set-sr-bit))))
! ;		    (unit u-set-sr))))
  
  (dshci sett "Set T-bit"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "sett"
         (+ (f-op16 24))
!        (set tbit 1)
!        (all-models ((unit u-exec)
! 		    (unit u-use-tbit)
! 		    (unit u-set-sr-bit))))
! ;		    (unit u-set-sr))))
  
  (dshci shad "Shift arithmetic dynamic"
!        ((MACH sh2a-nofpu,sh2a-fpu,sh3,sh3e,sh4-nofpu,sh4,sh4a-nofpu,sh4a,sh4al,sh5) (SH4-GROUP EX) (SH4A-GROUP EX))
         "shad $rm, $rn"
         (+ (f-op4 4) rn rm (f-sub4 12))
!        (sequence ((SI shamt))
! 		 (set shamt (and rm 31))
  		 (if (ge rm 0)
  		     (set rn (sll rn shamt))
  		     (if (ne shamt 0)
  			 (set rn (sra rn (sub 32 shamt)))
  			 (if (lt rn 0)
  			     (set rn (neg 1))
! 			     (set rn 0)))))
!        (shad-models ((unit u-use-gr (in usereg rn))
! 		     (unit u-use-gr (in usereg rm))
! 		     (unit u-exec)
! 		     (unit u-shift))))
  
  (dshci shal "Shift left arithmetic one bit"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shal $rn"
         (+ (f-op4 4) rn (f-sub8 32))
         (sequence ((BI t))
  		 (set t (srl rn 31))
  		 (set rn (sll rn 1))
! 		 (set tbit (if BI t 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-shift)
! 		    (unit u-set-sr-bit))))
  
  (dshci shar "Shift right arithmetic one bit"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shar $rn"
         (+ (f-op4 4) rn (f-sub8 33))
         (sequence ((BI t))
  		 (set t (and rn 1))
  		 (set rn (sra rn 1))
! 		 (set tbit (if BI t 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-shift)
! 		    (unit u-set-sr-bit))))
  
  (dshci shld "Shift logical dynamic"
!        ((SH3-MACH) (SH4-GROUP EX) (SH4A-GROUP EX))
         "shld $rm, $rn"
         (+ (f-op4 4) rn rm (f-sub4 13))
!        (sequence ((SI shamt))
! 		 (set shamt (and rm 31))
  		 (if (ge rm 0)
  		     (set rn (sll rn shamt))
  		     (if (ne shamt 0)
  			 (set rn (srl rn (sub 32 shamt)))
! 			 (set rn 0))))
!        (sh3-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci shll "Shift left logical one bit"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shll $rn"
         (+ (f-op4 4) rn (f-sub8 0))
         (sequence ((BI t))
  		 (set t (srl rn 31))
  		 (set rn (sll rn 1))
! 		 (set tbit (if BI t 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-shift)
! 		    (unit u-set-sr-bit))))
  
  (dshci shll2 "Shift left logical two bits"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shll2 $rn"
         (+ (f-op4 4) rn (f-sub8 8))
!        (set rn (sll rn 2))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci shll8 "Shift left logical eight bits"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shll8 $rn"
         (+ (f-op4 4) rn (f-sub8 24))
!        (set rn (sll rn 8))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci shll16 "Shift left logical sixteen bits"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shll16 $rn"
         (+ (f-op4 4) rn (f-sub8 40))
!        (set rn (sll rn 16))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci shlr "Shift right logical one bit"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shlr $rn"
         (+ (f-op4 4) rn (f-sub8 1))
         (sequence ((BI t))
  		 (set t (and rn 1))
  		 (set rn (srl rn 1))
! 		 (set tbit (if BI t 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-shift)
! 		    (unit u-set-sr-bit))))
  
  (dshci shlr2 "Shift right logical two bits"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shlr2 $rn"
         (+ (f-op4 4) rn (f-sub8 9))
!        (set rn (srl rn 2))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci shlr8 "Shift right logical eight bits"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shlr8 $rn"
         (+ (f-op4 4) rn (f-sub8 25))
!        (set rn (srl rn 8))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci shlr16 "Shift right logical sixteen bits"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "shlr16 $rn"
         (+ (f-op4 4) rn (f-sub8 41))
!        (set rn (srl rn 16))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci stc-gbr "Store control register (GBR)"
!        ((SH4-GROUP CO))
         "stc gbr, $rn"
         (+ (f-op4 0) rn (f-sub8 18))
!        (set rn gbr)
!        ())
! 
! (dshci stc-vbr "Store control register (VBR)"
!        ((SH4-GROUP CO))
!        "stc vbr, $rn"
!        (+ (f-op4 0) rn (f-sub8 34))
!        (set rn vbr)
!        (all-models ((unit u-stc-vbr))))
  
  (dshci stcl-gbr "Store control register (GBR)"
!        ((SH4-GROUP CO))
         "stc.l gbr, @-$rn"
         (+ (f-op4 4) rn (f-sub8 19))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) gbr)
! 		 (set rn addr))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-ldcl (cycles 2))
! 		    (unit u-memory-access))))
! 
! (dshci stcl-vbr "Store control register (VBR)"
!        ((SH4-GROUP CO))
!        "stc.l vbr, @-$rn"
!        (+ (f-op4 4) rn (f-sub8 35))
!        (sequence ((DI addr))
! 		 (set addr (sub rn 4))
! 		 (set (mem SI addr) vbr)
! 		 (set rn addr))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-ldcl (cycles 2))
! 		    (unit u-memory-access))))
  
  (dshci sts-fpscr "Store status register (FPSCR)"
!        ((SH2e-MACH) (SH4-GROUP CO) (SH4A-GROUP LS))
         "sts fpscr, $rn"
         (+ (f-op4 0) rn (f-sub8 106))
!        (set rn fpscr)
!        (sh2e-models ((unit u-use-fpscr)
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access)
! 		     (unit u-fpu-load-gr (out loadreg rn)))))
  
  (dshci stsl-fpscr "Store status register (FPSCR)"
!        ((SH2e-MACH) (SH4-GROUP CO) (SH4A-GROUP LS))
         "sts.l fpscr, @-$rn"
         (+ (f-op4 4) rn (f-sub8 98))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) fpscr)
! 		 (set rn addr))
!        (sh2e-models ((unit u-use-gr (in usereg rn))
! 		     (unit u-use-fpscr)
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access))))
  
! (dshci sts-fpul "Store status regitser (FPUL)"
!        ((SH2e-MACH) (SH4-GROUP LS) (SH4A-GROUP LS))
         "sts fpul, $rn"
         (+ (f-op4 0) rn (f-sub8 90))
!        (set rn (subword SI fpul 0))
!        (sh2e-models ((unit u-use-fpul)
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access)
! 		     (unit u-fpu-load-gr (out loadreg rn)))))
  
  (dshci stsl-fpul "Store status register (FPUL)"
!        ((SH2e-MACH) (SH4-GROUP CO) (SH4A-GROUP LS))
         "sts.l fpul, @-$rn"
         (+ (f-op4 4) rn (f-sub8 82))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SF addr) fpul)
! 		 (set rn addr))
!        (sh2e-models ((unit u-use-fpul)
! 		     (unit u-use-gr (in usereg rn))
! 		     (unit u-exec)
! 		     (unit u-maybe-fpu)
! 		     (unit u-fpu-memory-access))))
  
  (dshci sts-mach "Store status register (MACH)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "sts mach, $rn"
         (+ (f-op4 0) rn (f-sub8 10))
!        (set rn mach)
!        (all-models ((unit u-use-multiply-result)
! 		    (unit u-write-back)
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci stsl-mach "Store status register (MACH)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "sts.l mach, @-$rn"
         (+ (f-op4 4) rn (f-sub8 2))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) mach)
! 		 (set rn addr))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-multiply-result)
! 		    (unit u-write-back)
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci sts-macl "Store status register (MACL)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "sts macl, $rn"
         (+ (f-op4 0) rn (f-sub8 26))
!        (set rn macl)
!        (all-models ((unit u-use-multiply-result)
! 		    (unit u-write-back)
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci stsl-macl "Store status register (MACL)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "sts.l macl, @-$rn"
         (+ (f-op4 4) rn (f-sub8 18))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) macl)
! 		 (set rn addr))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-multiply-result)
! 		    (unit u-write-back)
! 		    (unit u-exec)
! 		    (unit u-memory-access))))
  
  (dshci sts-pr "Store status register (PR)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "sts pr, $rn"
         (+ (f-op4 0) rn (f-sub8 42))
!        (set rn pr)
!        (all-models ((unit u-use-pr)
! 		    (unit u-sts-pr))))
  
  (dshci stsl-pr "Store status register (PR)"
!        ((SH4-GROUP CO) (SH4A-GROUP LS))
         "sts.l pr, @-$rn"
         (+ (f-op4 4) rn (f-sub8 34))
         (sequence ((DI addr))
  		 (set addr (sub rn 4))
  		 (set (mem SI addr) pr)
! 		 (set rn addr))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-pr)
! 		    (unit u-sts-pr)
! 		    (unit u-memory-access))))
  
  (dshci sub "Subtract"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "sub $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 8))
!        (set rn (sub rn rm))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-exec))))
  
  (dshci subc "Subtract and detect carry"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "subc $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 10))
         (sequence ((BI flag))
  		 (set flag (sub-cflag rn rm tbit))
  		 (set rn (subc rn rm tbit))
! 		 (set tbit flag))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec))))
  
  (dshci subv "Subtract and detect overflow"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "subv $rm, $rn"
         (+ (f-op4 3) rn rm (f-sub4 11))
         (sequence ((BI t))
  		 (set t (sub-oflag rn rm 0))
  		 (set rn (sub rn rm))
! 		 (set tbit (if BI t 1 0)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci swapb "Swap bytes"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "swap.b $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 8))
         (sequence ((UHI top-half) (UQI byte1) (UQI byte0))
  		 (set top-half (subword HI rm 0))
  		 (set byte1 (subword QI rm 2))
  		 (set byte0 (subword QI rm 3))
! 		 (set rn (or SI (sll SI top-half 16) (or SI (sll SI byte0 8) byte1))))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci swapw "Swap words"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "swap.w $rm, $rn"
         (+ (f-op4 6) rn rm (f-sub4 9))
!        (set rn (or (srl rm 16) (sll rm 16)))
!        (all-models ((unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-shift))))
  
  (dshci tasb "Test and set byte"
!        ((SH4-GROUP CO) (SH4A-GROUP CO))
         "tas.b @$rn"
         (+ (f-op4 4) rn (f-sub8 27))
         (sequence ((UQI byte))
  		 (set byte (mem UQI rn))
  		 (set tbit (if BI (eq byte 0) 1 0))
  		 (set byte (or byte 128))
! 		 (set (mem UQI rn) byte))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-tbit)
! 		    (unit u-tas)
! 		    (unit u-set-sr-bit)
! 		    (unit u-memory-access))))
  
  (dshci trapa "Trap"
!        (ILLSLOT (SH4-GROUP CO) (SH4A-GROUP CO))
         "trapa #$uimm8"
         (+ (f-op8 #xc3) uimm8)
!        (c-call "sh64_compact_trapa" uimm8 pc)
!        (all-models ((unit u-trap))))
  
  (dshci tst "Test and set t-bit"
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "tst $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 8))
!        (set tbit (if BI (eq (and rm rn) 0) 1 0))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci tsti "Test and set t-bit immediate" 
!        ((SH4-GROUP MT) (SH4A-GROUP EX))
         "tst #$uimm8, r0"
         (+ (f-op8 #xc8) uimm8)
!        (set tbit (if BI (eq (and r0 (zext SI uimm8)) 0) 1 0))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-use-tbit)
! 		    (unit u-exec)
! 		    (unit u-set-sr-bit))))
  
  (dshci tstb "Test and set t-bit immedate with memory byte"
!        ((SH4-GROUP CO) (SH4A-GROUP CO))
         "tst.b #$imm8, @(r0, gbr)"
         (+ (f-op8 #xcc) imm8)
         (sequence ((DI addr))
  		 (set addr (add r0 gbr))
! 		 (set tbit (if BI (eq (and (mem UQI addr) imm8) 0) 1 0)))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-use-tbit)
! 		    (unit u-exec (cycles 3))
! 		    (unit u-sx (cycles 3))
! 		    (unit u-set-sr-bit)
! 		    (unit u-memory-access))))
  
  (dshci xor "Exclusive OR"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "xor $rm64, $rn64"
         (+ (f-op4 2) rn64 rm64 (f-sub4 10))
!        (set rn64 (xor rn64 rm64))
!        (all-models ((unit u-use-gr (in usereg rn64))
! 		    (unit u-use-gr (in usereg rm64))
! 		    (unit u-exec))))
  
  (dshci xori "Exclusive OR immediate"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "xor #$uimm8, r0"
         (+ (f-op8 #xca) uimm8)
!        (set r0 (xor r0 (zext DI uimm8)))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-exec))))
  
  (dshci xorb "Exclusive OR immediate with memory byte"
!        ((SH4-GROUP CO) (SH4A-GROUP CO))
         "xor.b #$imm8, @(r0, gbr)"
         (+ (f-op8 #xce) imm8)
         (sequence ((DI addr) (UQI data))
  		 (set addr (add r0 gbr))
  		 (set data (xor (mem UQI addr) imm8))
! 		 (set (mem UQI addr) data))
!        (all-models ((unit u-use-gr (in usereg r0))
! 		    (unit u-logic-b)
! 		    (unit u-memory-access))))
  
  (dshci xtrct "Extract"
!        ((SH4-GROUP EX) (SH4A-GROUP EX))
         "xtrct $rm, $rn"
         (+ (f-op4 2) rn rm (f-sub4 13))
!        (set rn (or (sll rm 16) (srl rn 16)))
!        (all-models ((unit u-use-gr (in usereg rn))
! 		    (unit u-use-gr (in usereg rm))
! 		    (unit u-exec)
! 		    (unit u-shift))))
Index: cgen/cpu/sh64-media.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/sh64-media.cpu,v
retrieving revision 1.5
diff -c -p -r1.5 sh64-media.cpu
*** cgen/cpu/sh64-media.cpu	21 May 2003 14:10:46 -0000	1.5
--- cgen/cpu/sh64-media.cpu	22 Aug 2006 17:22:28 -0000
***************
*** 1,5 ****
  ; SuperH SHmedia instruction set description.  -*- Scheme -*-
! ; Copyright (C) 2000, 2001 Red Hat, Inc.
  ; Copyright (C) 2002 SuperH Ltd
  ; This file is part of CGEN.
  ; See file COPYING.CGEN for details.
--- 1,5 ----
  ; SuperH SHmedia instruction set description.  -*- Scheme -*-
! ; Copyright (C) 2000, 2001, 2006 Red Hat, Inc.
  ; Copyright (C) 2002 SuperH Ltd
  ; This file is part of CGEN.
  ; See file COPYING.CGEN for details.
***************
*** 16,29 ****
  
  ; dnshmi -- define-normal-sh-media-insn
  
! (define-pmacro (dshmi xname xcomment xattrs xsyntax xformat xsemantics)
    (define-insn
      (name xname)
      (comment xcomment)
      (.splice attrs (.unsplice xattrs) (ISA media))
      (syntax xsyntax)
      (format xformat)
!     (semantics xsemantics)))
  
  ; Saturation functions.
  ; Force a value `i' into words `n' bits wide.
--- 16,31 ----
  
  ; dnshmi -- define-normal-sh-media-insn
  
! (define-pmacro (dshmi xname xcomment xattrs xsyntax xformat xsemantics xtiming)
    (define-insn
      (name xname)
      (comment xcomment)
      (.splice attrs (.unsplice xattrs) (ISA media))
      (syntax xsyntax)
      (format xformat)
!     (semantics xsemantics)
!     (.splice timing (.unsplice xtiming))))
! 
  
  ; Saturation functions.
  ; Force a value `i' into words `n' bits wide.
***************
*** 51,63 ****
  \f
  ; Ifields.
  
! (dshmf f-op          "Opcode"                       ()  31  6)
! (dshmf f-ext         "Extension opcode"             ()  19  4)
! (dshmf f-rsvd        "Reserved"		    (RESERVED)   3  4)
! 
! (dshmf f-left        "Left register"                ()  25  6)
! (dshmf f-right       "Right register"               ()  15  6)
! (dshmf f-dest        "Destination register"         ()   9  6)
  
  (define-multi-ifield
    (name f-left-right)
--- 53,65 ----
  \f
  ; Ifields.
  
! (dshmf f-op          "Opcode"                       ()   0  6)
! (dshmf f-ext         "Extension opcode"             ()  12  4)
! (dshmf f-rsvd        "Reserved"		    (RESERVED)  28  4)
! 
! (dshmf f-left        "Left register"                ()   6  6)
! (dshmf f-right       "Right register"               ()  16  6)
! (dshmf f-dest        "Destination register"         ()  22  6)
  
  (define-multi-ifield
    (name f-left-right)
***************
*** 73,115 ****
    (extract (set (ifield f-left-right) (ifield f-left)))
  )
  
! (dshmf f-tra         "Target register"              ()   6  3)
! (dshmf f-trb         "Target register"              ()  22  3)
! (dshmf f-likely      "Likely bit"                   ()   9  1)
! (dshmf f-25          "Three unused bits at bit 25"  ()  25  3)
! (dshmf f-8-2         "Two unused bits at bit 8"     ()   8  2)
! 
! (df f-imm6   "Immediate value (6 bits)"      ((ISA media)) 15 6 INT #f #f)
! (df f-imm10  "Immediate value (10 bits)"     ((ISA media)) 19 10 INT #f #f)
! (df f-imm16  "Immediate value (16 bits)"     ((ISA media)) 25 16 INT #f #f)
  
! (dshmf f-uimm6       "Immediate value (6 bits)"     ()  15  6)
! (dshmf f-uimm16      "Immediate value (16 bits)"    ()  25 16)
  
  ; Various displacement fields.
  ; The 10 bit field, for example, has different scaling for displacements.
  
! (df f-disp6	     "Displacement (6 bits)"        ((ISA media)) 15 6 INT #f #f)
  
! (df f-disp6x32       "Displacement (6 bits)"        ((ISA media)) 15 6 INT
      ((value pc) (sra SI value 5))
      ((value pc) (sll SI value 5)))
  
! (df f-disp10         "Displacement (10 bits)"       ((ISA media)) 19 10 INT #f #f)
  
! (df f-disp10x8       "Displacement (10 bits)"       ((ISA media)) 19 10 INT
      ((value pc) (sra SI value 3))
      ((value pc) (sll SI value 3)))
  
! (df f-disp10x4       "Displacement (10 bits)"       ((ISA media)) 19 10 INT
      ((value pc) (sra SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-disp10x2       "Displacement (10 bits)"       ((ISA media)) 19 10 INT
      ((value pc) (sra SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-disp16         "Displacement (16 bits)"       ((ISA media) PCREL-ADDR) 25 16 INT
      ((value pc) (sra DI value 2))
      ((value pc) (add DI (sll DI value 2) pc)))
  
--- 75,117 ----
    (extract (set (ifield f-left-right) (ifield f-left)))
  )
  
! (dshmf f-tra         "Target register"              ()  25  3)
! (dshmf f-trb         "Target register"              ()   9  3)
! (dshmf f-likely      "Likely bit"                   ()  22  1)
! (dshmf f-6-3           "Three unused bits at bit 25"  ()   6  3)
! (dshmf f-23-2        "Two unused bits at bit 25"    ()  23  2)
! 
! (df f-imm6   "Immediate value (6 bits)"      ((ISA media)) 16 6 INT #f #f)
! (df f-imm10  "Immediate value (10 bits)"     ((ISA media)) 12 10 INT #f #f)
! (df f-imm16  "Immediate value (16 bits)"     ((ISA media))  6 16 INT #f #f)
  
! (dshmf f-uimm6       "Immediate value (6 bits)"     ()  16  6)
! (dshmf f-uimm16      "Immediate value (16 bits)"    ()   6 16)
  
  ; Various displacement fields.
  ; The 10 bit field, for example, has different scaling for displacements.
  
! (df f-disp6	     "Displacement (6 bits)"        ((ISA media)) 16 6 INT #f #f)
  
! (df f-disp6x32       "Displacement (6 bits)"        ((ISA media)) 16 6 INT
      ((value pc) (sra SI value 5))
      ((value pc) (sll SI value 5)))
  
! (df f-disp10         "Displacement (10 bits)"       ((ISA media)) 12 10 INT #f #f)
  
! (df f-disp10x8       "Displacement (10 bits)"       ((ISA media)) 12 10 INT
      ((value pc) (sra SI value 3))
      ((value pc) (sll SI value 3)))
  
! (df f-disp10x4       "Displacement (10 bits)"       ((ISA media)) 12 10 INT
      ((value pc) (sra SI value 2))
      ((value pc) (sll SI value 2)))
  
! (df f-disp10x2       "Displacement (10 bits)"       ((ISA media)) 12 10 INT
      ((value pc) (sra SI value 1))
      ((value pc) (sll SI value 1)))
  
! (df f-disp16         "Displacement (16 bits)"       ((ISA media) PCREL-ADDR)  6 16 INT
      ((value pc) (sra DI value 2))
      ((value pc) (add DI (sll DI value 2) pc)))
  
***************
*** 170,294 ****
         ()
         "add $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 9) rn rd (f-rsvd 0))
!        (set rd (add rm rn)))
  
  (dshmi addl "Add long"
         ()
         "add.l $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 8) rn rd (f-rsvd 0))
!        (set rd (add (subword SI rm 1) (subword SI rn 1))))
  
  (dshmi addi "Add immediate"
         ()
         "addi $rm, $disp10, $rd"
         (+ (f-op 52) rm disp10 rd (f-rsvd 0))
!        (set rd (add rm (ext DI disp10))))
  
  (dshmi addil "Add immediate long"
         ()
         "addi.l $rm, $disp10, $rd"
         (+ (f-op 53) rm disp10 rd (f-rsvd 0))
!        (set rd (ext DI (add (ext SI disp10) (subword SI rm 1)))))
  
  (dshmi addzl "Add zero extended long"
         ()
         "addz.l $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 12) rn rd (f-rsvd 0))
!        (set rd (zext DI (add (subword SI rm 1) (subword SI rn 1)))))
  
  (dshmi alloco "Allocate operand cache block"
         ()
         "alloco $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 4) disp6x32 (f-dest 63) (f-rsvd 0))
!        (unimp "alloco"))
  
  (dshmi and "AND"
         ()
         "and $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 11) rn rd (f-rsvd 0))
!        (set rd (and rm rn)))
  
  (dshmi andc "AND complement"
         ()
         "andc $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 15) rn rd (f-rsvd 0))
!        (set rd (and rm (inv rn))))
  
  (dshmi andi "AND immediate"
         ()
         "andi $rm, $disp10, $rd"
         (+ (f-op 54) rm disp10 rd (f-rsvd 0))
!        (set rd (and rm (ext DI disp10))))
  
  (dshmi beq "Branch if equal"
         ()
         "beq$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 1) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (if (eq rm rn)
! 	   (set pc tra)))
  
  (dshmi beqi "Branch if equal immediate"
         ()
         "beqi$likely $rm, $imm6, $tra"
!        (+ (f-op 57) rm (f-ext 1) imm6 likely (f-8-2 0) tra (f-rsvd 0))
!        (if (eq rm (ext DI imm6))
! 	   (set pc tra)))
  
  (dshmi bge "Branch if greater than or equal"
         ()
         "bge$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 3) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (if (ge rm rn)
! 	   (set pc tra)))
  
  (dshmi bgeu "Branch if greater than or equal (unsigned comparison)"
         ()
         "bgeu$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 11) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (if (geu rm rn)
! 	   (set pc tra)))
  
  (dshmi bgt "Branch greater than"
         ()
         "bgt$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 7) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (if (gt rm rn)
! 	   (set pc tra)))
  
  (dshmi bgtu "Branch greater than (unsigned comparison)"
         ()
         "bgtu$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 15) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (if (gtu rm rn)
! 	   (set pc tra)))
  
  (dshmi blink "Branch and link"
         ()
         "blink $trb, $rd"
!        (+ (f-op 17) (f-25 0) trb (f-ext 1) (f-right 63) rd (f-rsvd 0))
         (sequence ()
  		 (set rd (or (add pc 4) 1))
! 		 (set pc trb)))
  
  (dshmi bne "Branch if not equal"
         ()
         "bne$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (if (ne rm rn)
! 	   (set pc tra)))
  
  (dshmi bnei "Branch if not equal immediate"
         ()
         "bnei$likely $rm, $imm6, $tra"
!        (+ (f-op 57) rm (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (if (ne rm (ext DI imm6))
! 	   (set pc tra)))
  
  (dshmi brk "Breakpoint instruction"
         ()
         "brk"
         (+ (f-op 27) (f-left 63) (f-ext 5) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (c-call "sh64_break" pc))
  
  (define-pmacro (-byterev-step)
    (sequence ()
--- 172,372 ----
         ()
         "add $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 9) rn rd (f-rsvd 0))
!        (set rd (add rm rn))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi addl "Add long"
         ()
         "add.l $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 8) rn rd (f-rsvd 0))
!        (set rd (add (subword SI rm 1) (subword SI rn 1)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi addi "Add immediate"
         ()
         "addi $rm, $disp10, $rd"
         (+ (f-op 52) rm disp10 rd (f-rsvd 0))
!        (set rd (add rm (ext DI disp10)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi addil "Add immediate long"
         ()
         "addi.l $rm, $disp10, $rd"
         (+ (f-op 53) rm disp10 rd (f-rsvd 0))
!        (set rd (ext DI (add (ext SI disp10) (subword SI rm 1))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi addzl "Add zero extended long"
         ()
         "addz.l $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 12) rn rd (f-rsvd 0))
!        (set rd (zext DI (add (subword SI rm 1) (subword SI rn 1))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi alloco "Allocate operand cache block"
         ()
         "alloco $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 4) disp6x32 (f-dest 63) (f-rsvd 0))
!        (sequence ()
! 		 (set rm rm) ; for now to allow profiling
! 		 (unimp "alloco"))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi and "AND"
         ()
         "and $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 11) rn rd (f-rsvd 0))
!        (set rd (and rm rn))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi andc "AND complement"
         ()
         "andc $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 15) rn rd (f-rsvd 0))
!        (set rd (and rm (inv rn)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi andi "AND immediate"
         ()
         "andi $rm, $disp10, $rd"
         (+ (f-op 54) rm disp10 rd (f-rsvd 0))
!        (set rd (and rm (ext DI disp10)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi beq "Branch if equal"
         ()
         "beq$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 1) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-optimization likely)
! 		 (if (eq rm rn)
! 		     (set pc tra)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-cond-branch (in targetreg tra)))))
  
  (dshmi beqi "Branch if equal immediate"
         ()
         "beqi$likely $rm, $imm6, $tra"
!        (+ (f-op 57) rm (f-ext 1) imm6 likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-optimization likely)
! 		 (if (eq rm (ext DI imm6))
! 		     (set pc tra)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-cond-branch (in targetreg tra)))))
  
  (dshmi bge "Branch if greater than or equal"
         ()
         "bge$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 3) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-optimization likely)
! 		 (if (ge rm rn)
! 		     (set pc tra)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-cond-branch (in targetreg tra)))))
  
  (dshmi bgeu "Branch if greater than or equal (unsigned comparison)"
         ()
         "bgeu$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 11) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-optimization likely)
! 		 (if (geu rm rn)
! 		     (set pc tra)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-cond-branch (in targetreg tra)))))
  
  (dshmi bgt "Branch greater than"
         ()
         "bgt$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 7) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-optimization likely)
! 		 (if (gt rm rn)
! 		     (set pc tra)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-cond-branch (in targetreg tra)))))
  
  (dshmi bgtu "Branch greater than (unsigned comparison)"
         ()
         "bgtu$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 15) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-optimization likely)
! 		 (if (gtu rm rn)
! 		     (set pc tra)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-cond-branch (in targetreg tra)))))
  
  (dshmi blink "Branch and link"
         ()
         "blink $trb, $rd"
!        (+ (f-op 17) (f-6-3 0) trb (f-ext 1) (f-right 63) rd (f-rsvd 0))
         (sequence ()
  		 (set rd (or (add pc 4) 1))
! 		 (set pc trb)
! 		 (if (eq (index-of rd) 63)
! 		     (cg-profile-jump pc trb) ; rd==r63 is used for local branches and returns
! 		     (cg-profile pc trb)))
!        (sh5-media-models ((unit u-blink (in targetreg trb)))))
  
  (dshmi bne "Branch if not equal"
         ()
         "bne$likely $rm, $rn, $tra"
!        (+ (f-op 25) rm (f-ext 5) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-optimization likely)
! 		 (if (ne rm rn)
! 		     (set pc tra)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-cond-branch (in targetreg tra)))))
  
  (dshmi bnei "Branch if not equal immediate"
         ()
         "bnei$likely $rm, $imm6, $tra"
!        (+ (f-op 57) rm (f-ext 5) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-optimization likely)
! 		 (if (ne rm (ext DI imm6))
! 		     (set pc tra)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-cond-branch (in targetreg tra)))))
  
  (dshmi brk "Breakpoint instruction"
         ()
         "brk"
         (+ (f-op 27) (f-left 63) (f-ext 5) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (c-call "sh64_break" pc)
!        (sh5-media-models ((unit u-exec (cycles 10)))))
  
  (define-pmacro (-byterev-step)
    (sequence ()
***************
*** 311,765 ****
  		 (-byterev-step)
  		 (-byterev-step)
  		 (-byterev-step)
! 		 (set rd result)))
  
  (dshmi cmpeq "Compare equal"
         ()
         "cmpeq $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 1) rn rd (f-rsvd 0))
!        (set rd (if DI (eq rm rn) 1 0)))
  
  (dshmi cmpgt "Compare greater than"
         ()
         "cmpgt $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set rd (if DI (gt rm rn) 1 0)))
  
  (dshmi cmpgtu "Compare greater than (unsigned comparison)"
         ()
         "cmpgtu $rm,$rn, $rd"
         (+ (f-op 0) rm (f-ext 7) rn rd (f-rsvd 0))
!        (set rd (if DI (gtu rm rn) 1 0)))
  
  (dshmi cmveq "Conditional move if equal to zero"
         ()
         "cmveq $rm, $rn, $rd"
         (+ (f-op 8) rm (f-ext 1) rn rd (f-rsvd 0))
         (if (eq rm 0)
! 	   (set rd rn)))
  
  (dshmi cmvne "Conditional move if not equal to zero"
         ()
         "cmvne $rm, $rn, $rd"
         (+ (f-op 8) rm (f-ext 5) rn rd (f-rsvd 0))
         (if (ne rm 0)
! 	   (set rd rn)))
  
  (dshmi fabsd "Floating point absolute (double)"
         ()
         "fabs.d $drgh, $drf"
         (+ (f-op 6) drgh (f-ext 1) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fabsd" drgh)))
  
  (dshmi fabss "Floating point absolute (single)"
         ()
         "fabs.s $frgh, $frf"
         (+ (f-op 6) frgh (f-ext 0) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fabss" frgh)))
  
  (dshmi faddd "Floating point add (double)"
         ()
         "fadd.d $drg, $drh, $drf"
         (+ (f-op 13) drg (f-ext 1) drh drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_faddd" drg drh)))
  
  (dshmi fadds "Floating point add (single)"
         ()
         "fadd.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 0) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fadds" frg frh)))
  
  (dshmi fcmpeqd "Floating point compare if equal (double)"
         ()
         "fcmpeq.d $drg, $drh, $rd"
         (+ (f-op 12) drg (f-ext 9) drh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpeqd" drg drh))))
  
  (dshmi fcmpeqs "Floating point compare if equal (single)"
         ()
         "fcmpeq.s $frg, $frh, $rd"
         (+ (f-op 12) frg (f-ext 8) frh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpeqs" frg frh))))
  
  (dshmi fcmpged "Floating compare compare if greater than or equal (double)"
         ()
         "fcmpge.d $drg, $drh, $rd"
         (+ (f-op 12) drg (f-ext 15) drh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpged" drg drh))))
  
  (dshmi fcmpges "Floating point compare if greater than or equal (single)"
         ()
         "fcmpge.s $frg, $frh, $rd"
         (+ (f-op 12) frg (f-ext 14) frh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpges" frg frh))))
  
  (dshmi fcmpgtd "Floating point compare if greater than (double)"
         ()
         "fcmpgt.d $drg, $drh, $rd"
         (+ (f-op 12) drg (f-ext 13) drh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpgtd" drg drh))))
  
  (dshmi fcmpgts "Floating point compare if greater than (single)"
         ()
         "fcmpgt.s $frg, $frh, $rd"
         (+ (f-op 12) frg (f-ext 12) frh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpgts" frg frh))))
  
  (dshmi fcmpund "Floating point unordered comparison (double)"
         ()
         "fcmpun.d $drg, $drh, $rd"
         (+ (f-op 12) drg (f-ext 11) drh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpund" drg drh))))
  
  (dshmi fcmpuns "Floating point unordered comparison (single)"
         ()
         "fcmpun.s $frg, $frh, $rd"
         (+ (f-op 12) frg (f-ext 10) frh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpuns" frg frh))))
  
  (dshmi fcnvds "Floating point coversion (double to single)"
         ()
         "fcnv.ds $drgh, $frf"
         (+ (f-op 14) drgh (f-ext 7) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fcnvds" drgh)))
  
  (dshmi fcnvsd "Floating point conversion (single to double)"
         ()
         "fcnv.sd $frgh, $drf"
         (+ (f-op 14) frgh (f-ext 6) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fcnvsd" frgh)))
  
  (dshmi fdivd "Floating point divide (double)"
         ()
         "fdiv.d $drg, $drh, $drf"
         (+ (f-op 13) drg (f-ext 5) drh drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fdivd" drg drh)))
  
  (dshmi fdivs "Floating point divide (single)"
         ()
         "fdiv.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 4) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fdivs" frg frh)))
  
  (dshmi fgetscr "Floating point get from FPSCR"
         ()
         "fgetscr $frf"
         (+ (f-op 7) (f-left 63) (f-ext 2) (f-right 63) frf (f-rsvd 0))
!        (unimp "fputscr"))
!        ; FIXME: this should work!
!        ; (set frf fpscr))
  
  (dshmi fiprs "Floating point inner product (single)"
         ()
         "fipr.s $fvg, $fvh, $frf"
         (+ (f-op 5) fvg (f-ext 6) fvh frf (f-rsvd 0))
!        (sequence ((UQI g) (UQI h) (SF temp))
! 		 (set g (index-of fvg))
! 		 (set h (index-of fvh))
! 		 (set temp (c-call SF "sh64_fmuls" (reg h-fr g) (reg h-fr h)))
! 		 (set temp (c-call SF "sh64_fadds" temp
! 		   (c-call SF "sh64_fmuls" (reg h-fr (add g 1)) (reg h-fr (add h 1)))))
! 		 (set temp (c-call SF "sh64_fadds" temp
! 		   (c-call SF "sh64_fmuls" (reg h-fr (add g 2)) (reg h-fr (add h 2)))))
! 		 (set temp (c-call SF "sh64_fadds" temp
! 		   (c-call SF "sh64_fmuls" (reg h-fr (add g 3)) (reg h-fr (add h 3)))))
! 		 (set frf temp)))
  
  (dshmi fldd "Floating point load (double)"
         ()
         "fld.d $rm, $disp10x8, $drf"
         (+ (f-op 39) rm disp10x8 drf (f-rsvd 0))
!        (set drf (mem DF (add rm disp10x8))))
  
  (dshmi fldp "Floating point load (pair of singles)"
         ()
         "fld.p $rm, $disp10x8, $fpf"
         (+ (f-op 38) rm disp10x8 fpf (f-rsvd 0))
!        (sequence ((QI f))
! 		 (set f (index-of fpf))
! 		 (set (reg h-fr f) (mem SF (add rm disp10x8)))
! 		 (set (reg h-fr (add f 1)) (mem SF (add rm (add disp10x8 4))))))
  
  (dshmi flds "Floating point load (single)"
         ()
         "fld.s $rm, $disp10x4, $frf"
         (+ (f-op 37) rm disp10x4 frf (f-rsvd 0))
!        (set frf (mem SF (add rm disp10x4))))
  
  (dshmi fldxd "Floating point extended load (double)"
         ()
         "fldx.d $rm, $rn, $drf"
         (+ (f-op 7) rm (f-ext 9) rn frf (f-rsvd 0))
!        (set drf (mem DF (add rm rn))))
  
  (dshmi fldxp "Floating point extended load (pair of singles)"
         ()
         "fldx.p $rm, $rn, $fpf"
         (+ (f-op 7) rm (f-ext 13) rn fpf (f-rsvd 0))
!        (sequence ((QI f))
! 		 (set f (index-of fpf))
! 		 (set (reg h-fr f) (mem SF (add rm rn)))
! 		 (set (reg h-fr (add f 1)) (mem SF (add rm (add rn 4))))))
  
  (dshmi fldxs "Floating point extended load (single)"
         ()
         "fldx.s $rm, $rn, $frf"
         (+ (f-op 7) rm (f-ext 8) rn frf (f-rsvd 0))
!        (set frf (mem SF (add rm rn))))
  
  (dshmi floatld "Floating point conversion (long to double)"
         ()
         "float.ld $frgh, $drf"
         (+ (f-op 14) frgh (f-ext 14) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_floatld" frgh)))
  
  (dshmi floatls "Floating point conversion (long to single)"
         ()
         "float.ls $frgh, $frf"
         (+ (f-op 14) frgh (f-ext 12) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_floatls" frgh)))
  
  (dshmi floatqd "Floating point conversion (quad to double)"
         ()
         "float.qd $drgh, $drf"
         (+ (f-op 14) drgh (f-ext 13) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_floatqd" drgh)))
  
  (dshmi floatqs "Floating point conversion (quad to single)"
         ()
         "float.qs $drgh, $frf"
         (+ (f-op 14) drgh (f-ext 15) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_floatqs" drgh)))
  
  (dshmi fmacs "Floating point multiply and accumulate (single)"
         ()
         "fmac.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 14) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fadds" frf (c-call SF "sh64_fmuls" frg frh))))
  
  (dshmi fmovd "Floating point move double"
         ()
         "fmov.d $drgh, $drf"
         (+ (f-op 14) drgh (f-ext 1) drf (f-rsvd 0))
!        (set drf drgh))
  
  (dshmi fmovdq "Floating point move (double to quad integer)"
         ()
         "fmov.dq $drgh, $rd"
         (+ (f-op 12) drgh (f-ext 1) rd (f-rsvd 0))
!        (set rd (subword DI drgh 0)))
  
  (dshmi fmovls "Floating point move (lower to single)"
         ()
         "fmov.ls $rm, $frf"
         (+ (f-op 7) rm (f-ext 0) (f-right 63) frf (f-rsvd 0))
!        (set frf (subword SF (subword SI rm 1) 0)))
  
  (dshmi fmovqd "Floating point move (quad to double)"
         ()
         "fmov.qd $rm, $drf"
         (+ (f-op 7) rm (f-ext 1) (f-right 63) frf (f-rsvd 0))
!        (set drf (subword DF rm 0)))
  
  (dshmi fmovs "Floating point move (single)"
         ()
         "fmov.s $frgh, $frf"
         (+ (f-op 14) frgh (f-ext 0) frf (f-rsvd 0))
!        (set frf frgh))
  
  (dshmi fmovsl "Floating point move (single to lower)"
         ()
         "fmov.sl $frgh, $rd"
         (+ (f-op 12) frgh (f-ext 0) rd (f-rsvd 0))
!        (set rd (ext DI (subword SI frgh 1))))
  
  (dshmi fmuld "Floating point multiply (double)"
         ()
         "fmul.d $drg, $drh, $drf"
         (+ (f-op 13) drg (f-ext 7) drh drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fmuld" drg drh)))
  
  (dshmi fmuls "Floating point multiply (single)"
         ()
         "fmul.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 6) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fmuls" frg frh)))
  
  (dshmi fnegd "Floating point negate (double)"
         ()
         "fneg.d $drgh, $drf"
         (+ (f-op 6) drgh (f-ext 3) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fnegd" drgh)))
  
  (dshmi fnegs "Floating point negate (single)"
         ()
         "fneg.s $frgh, $frf"
         (+ (f-op 6) frgh (f-ext 2) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fnegs" frgh)))
  
  (dshmi fputscr "Floating point put to FPSCR"
         ()
         "fputscr $frgh"
         (+ (f-op 12) frgh (f-ext 2) (f-dest 63) (f-rsvd 0))
!        (unimp "fputscr"))
!        ; FIXME: this should work!
!        ; (set fpscr (subword SI frgh 0)))
  
  (dshmi fsqrtd "Floating point square root (double)"
         ()
         "fsqrt.d $drgh, $drf"
         (+ (f-op 14) drgh (f-ext 5) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fsqrtd" drgh)))
  
  (dshmi fsqrts "Floating point squart root (single)"
         ()
         "fsqrt.s $frgh, $frf"
         (+ (f-op 14) frgh (f-ext 4) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fsqrts" frgh)))
  
  (dshmi fstd "Floating point store (double)"
         ()
         "fst.d $rm, $disp10x8, $drf"
         (+ (f-op 47) rm disp10x8 drf (f-rsvd 0))
!        (set (mem DF (add rm disp10x8)) drf))
  
  (dshmi fstp "Floating point store (pair of singles)"
         ()
         "fst.p $rm, $disp10x8, $fpf"
         (+ (f-op 46) rm disp10x8 fpf (f-rsvd 0))
!        (sequence ((QI f))
! 		 (set f (index-of fpf))
! 		 (set (mem SF (add rm disp10x8)) (reg h-fr f))
! 		 (set (mem SF (add rm (add disp10x8 4))) (reg h-fr (add f 1)))))
  
  (dshmi fsts "Floating point store (single)"
         ()
         "fst.s $rm, $disp10x4, $frf"
         (+ (f-op 45) rm disp10x4 frf (f-rsvd 0))
!        (set (mem SF (add rm disp10x4)) frf))
  
  (dshmi fstxd "Floating point extended store (double)"
         ()
         "fstx.d $rm, $rn, $drf"
         (+ (f-op 15) rm (f-ext 9) rn drf (f-rsvd 0))
!        (set (mem DF (add rm rn)) drf))
  
  (dshmi fstxp "Floating point extended store (pair of singles)"
         ()
         "fstx.p $rm, $rn, $fpf"
         (+ (f-op 15) rm (f-ext 13) rn fpf (f-rsvd 0))
!        (sequence ((QI f))
! 		 (set f (index-of fpf))
! 		 (set (mem SF (add rm rn)) (reg h-fr f))
! 		 (set (mem SF (add rm (add rn 4))) (reg h-fr (add f 1)))))
  
  (dshmi fstxs "Floating point extended store (single)"
         ()
         "fstx.s $rm, $rn, $frf"
         (+ (f-op 15) rm (f-ext 8) rn frf (f-rsvd 0))
!        (set (mem SF (add rm rn)) frf))
  
  (dshmi fsubd "Floating point subtract (double)"
         ()
         "fsub.d $drg, $drh, $drf"
         (+ (f-op 13) frg (f-ext 3) frh frf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fsubd" drg drh)))
  
  (dshmi fsubs "Floating point subtract (single)"
         ()
         "fsub.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 2) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fsubs" frg frh)))
  
  (dshmi ftrcdl "Floating point conversion (double to long)"
         ()
         "ftrc.dl $drgh, $frf"
         (+ (f-op 14) drgh (f-ext 11) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_ftrcdl" drgh)))
  
  (dshmi ftrcsl "Floating point conversion (single to long)"
         ()
         "ftrc.sl $frgh, $frf"
         (+ (f-op 14) frgh (f-ext 8) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_ftrcsl" frgh)))
  
  (dshmi ftrcdq "Floating point conversion (double to quad)"
         ()
         "ftrc.dq $drgh, $drf"
         (+ (f-op 14) drgh (f-ext 9) frf (f-rsvd 0))
!        (set drf (c-call DF "sh64_ftrcdq" drgh)))
  
  (dshmi ftrcsq "Floating point conversion (single to quad)"
         ()
         "ftrc.sq $frgh, $drf"
         (+ (f-op 14) frgh (f-ext 10) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_ftrcsq" frgh)))
  
  (dshmi ftrvs "Floating point matrix multiply"
         ()
         "ftrv.s $mtrxg, $fvh, $fvf"
         (+ (f-op 5) mtrxg (f-ext 14) fvh fvf (f-rsvd 0))
!        (c-call "sh64_ftrvs" (index-of mtrxg) (index-of fvh) (index-of fvf)))
  
  (dshmi getcfg "Get configuration register"
         ()
         "getcfg $rm, $disp6, $rd"
         (+ (f-op 48) rm (f-ext 15) disp6 rd (f-rsvd 0))
!        (unimp "getcfg"))
  
  (dshmi getcon "Get control register"
         ()
         "getcon $crk, $rd"
         (+ (f-op 9) crk (f-ext 15) (f-right 63) rd (f-rsvd 0))
!        (set rd crk))
  
  (dshmi gettr "Get target register"
         ()
         "gettr $trb, $rd"
!        (+ (f-op 17) (f-25 0) trb (f-ext 5) (f-right 63) rd (f-rsvd 0))
!        (set rd trb))
  
  (dshmi icbi "Invalidate instruction cache block"
         ()
         "icbi $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 5) disp6x32 (f-dest 63) (f-rsvd 0))
!        (unimp "icbi"))
  
  (dshmi ldb "Load byte"
         ()
         "ld.b $rm, $disp10, $rd"
         (+ (f-op 32) rm disp10 rd (f-rsvd 0))
!        (set rd (ext DI (mem QI (add rm (ext DI disp10))))))
  
  (dshmi ldl "Load long word"
         ()
         "ld.l $rm, $disp10x4, $rd"
         (+ (f-op 34) rm disp10x4 rd (f-rsvd 0))
!        (set rd (ext DI (mem SI (add rm (ext DI disp10x4))))))
  
  (dshmi ldq "Load quad word"
         ()
         "ld.q $rm, $disp10x8, $rd"
         (+ (f-op 35) rm disp10x8 rd (f-rsvd 0))
!        (set rd (mem DI (add rm (ext DI disp10x8)))))
  
  (dshmi ldub "Load unsigned byte"
         ()
         "ld.ub $rm, $disp10, $rd"
         (+ (f-op 36) rm disp10 rd (f-rsvd 0))
!        (set rd (zext DI (mem QI (add rm (ext DI disp10))))))
  
  (dshmi lduw "Load unsigned word"
         ()
         "ld.uw $rm, $disp10x2, $rd"
         (+ (f-op 44) rm disp10 rd (f-rsvd 0))
!        (set rd (zext DI (mem HI (add rm (ext DI disp10x2))))))
  
  (dshmi ldw "Load word"
         ()
         "ld.w $rm, $disp10x2, $rd"
         (+ (f-op 33) rm disp10 rd (f-rsvd 0))
!        (set rd (ext DI (mem HI (add rm (ext DI disp10x2))))))
  
  (define-pmacro (-ldhi-byte)
    (if (and bytecount 1)
--- 389,1211 ----
  		 (-byterev-step)
  		 (-byterev-step)
  		 (-byterev-step)
! 		 (set rd result))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi cmpeq "Compare equal"
         ()
         "cmpeq $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 1) rn rd (f-rsvd 0))
!        (set rd (if DI (eq rm rn) 1 0))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi cmpgt "Compare greater than"
         ()
         "cmpgt $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set rd (if DI (gt rm rn) 1 0))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi cmpgtu "Compare greater than (unsigned comparison)"
         ()
         "cmpgtu $rm,$rn, $rd"
         (+ (f-op 0) rm (f-ext 7) rn rd (f-rsvd 0))
!        (set rd (if DI (gtu rm rn) 1 0))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi cmveq "Conditional move if equal to zero"
         ()
         "cmveq $rm, $rn, $rd"
         (+ (f-op 8) rm (f-ext 1) rn rd (f-rsvd 0))
         (if (eq rm 0)
! 	   (set rd rn))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi cmvne "Conditional move if not equal to zero"
         ()
         "cmvne $rm, $rn, $rd"
         (+ (f-op 8) rm (f-ext 5) rn rd (f-rsvd 0))
         (if (ne rm 0)
! 	   (set rd rn))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi fabsd "Floating point absolute (double)"
         ()
         "fabs.d $drgh, $drf"
         (+ (f-op 6) drgh (f-ext 1) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fabsd" drgh))
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 4))
! 			  (unit u-set-fp (out loadreg drf) (cycles 4))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi fabss "Floating point absolute (single)"
         ()
         "fabs.s $frgh, $frf"
         (+ (f-op 6) frgh (f-ext 0) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fabss" frgh))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 4))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi faddd "Floating point add (double)"
         ()
         "fadd.d $drg, $drh, $drf"
         (+ (f-op 13) drg (f-ext 1) drh drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_faddd" drg drh))
!        (sh5-media-models ((unit u-use-dr (in usereg drg))
! 			  (unit u-use-dr (in usereg drh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 6))
! 			  (unit u-set-fp (out loadreg drf) (cycles 6))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi fadds "Floating point add (single)"
         ()
         "fadd.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 0) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fadds" frg frh))
!        (sh5-media-models ((unit u-use-fr (in usereg frg))
! 			  (unit u-use-fr (in usereg frh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fcmpeqd "Floating point compare if equal (double)"
         ()
         "fcmpeq.d $drg, $drh, $rd"
         (+ (f-op 12) drg (f-ext 9) drh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpeqd" drg drh)))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fcmpeqs "Floating point compare if equal (single)"
         ()
         "fcmpeq.s $frg, $frh, $rd"
         (+ (f-op 12) frg (f-ext 8) frh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpeqs" frg frh)))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fcmpged "Floating compare compare if greater than or equal (double)"
         ()
         "fcmpge.d $drg, $drh, $rd"
         (+ (f-op 12) drg (f-ext 15) drh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpged" drg drh)))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fcmpges "Floating point compare if greater than or equal (single)"
         ()
         "fcmpge.s $frg, $frh, $rd"
         (+ (f-op 12) frg (f-ext 14) frh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpges" frg frh)))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fcmpgtd "Floating point compare if greater than (double)"
         ()
         "fcmpgt.d $drg, $drh, $rd"
         (+ (f-op 12) drg (f-ext 13) drh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpgtd" drg drh)))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fcmpgts "Floating point compare if greater than (single)"
         ()
         "fcmpgt.s $frg, $frh, $rd"
         (+ (f-op 12) frg (f-ext 12) frh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpgts" frg frh)))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fcmpund "Floating point unordered comparison (double)"
         ()
         "fcmpun.d $drg, $drh, $rd"
         (+ (f-op 12) drg (f-ext 11) drh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpund" drg drh)))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fcmpuns "Floating point unordered comparison (single)"
         ()
         "fcmpun.s $frg, $frh, $rd"
         (+ (f-op 12) frg (f-ext 10) frh rd (f-rsvd 0))
!        (set rd (zext DI (c-call BI "sh64_fcmpuns" frg frh)))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fcnvds "Floating point coversion (double to single)"
         ()
         "fcnv.ds $drgh, $frf"
         (+ (f-op 14) drgh (f-ext 7) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fcnvds" drgh))
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fcnvsd "Floating point conversion (single to double)"
         ()
         "fcnv.sd $frgh, $drf"
         (+ (f-op 14) frgh (f-ext 6) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fcnvsd" frgh))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 6))
! 			  (unit u-set-fp (out loadreg drf) (cycles 6))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi fdivd "Floating point divide (double)"
         ()
         "fdiv.d $drg, $drh, $drf"
         (+ (f-op 13) drg (f-ext 5) drh drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fdivd" drg drh))
!        (sh5-media-models ((unit u-use-dr (in usereg drg))
! 			  (unit u-use-dr (in usereg drh))
! 			  (unit u-fdivd (out loadreg drf))
! 			  (unit u-set-fr (out loadreg drf) (cycles 36))
! 			  (unit u-set-dr (out loadreg drf) (cycles 35))
! 			  (unit u-set-fp (out loadreg drf) (cycles 35))
! 			  (unit u-set-fv (out loadreg drf) (cycles 36))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 36)))))
  
  (dshmi fdivs "Floating point divide (single)"
         ()
         "fdiv.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 4) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fdivs" frg frh))
!        (sh5-media-models ((unit u-use-fr (in usereg frg))
! 			  (unit u-use-fr (in usereg frh))
! 			  (unit u-fdiv (out loadreg frf))
! 			  (unit u-set-fr (out loadreg frf) (cycles 19))
! 			  (unit u-set-dr (out loadreg frf) (cycles 20))
! 			  (unit u-set-fp (out loadreg frf) (cycles 20))
! 			  (unit u-set-fv (out loadreg frf) (cycles 20))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 20)))))
  
  (dshmi fgetscr "Floating point get from FPSCR"
         ()
         "fgetscr $frf"
         (+ (f-op 7) (f-left 63) (f-ext 2) (f-right 63) frf (f-rsvd 0))
!        (set frf (subword SF fpscr 0))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fiprs "Floating point inner product (single)"
         ()
         "fipr.s $fvg, $fvh, $frf"
         (+ (f-op 5) fvg (f-ext 6) fvh frf (f-rsvd 0))
!        (sequence ()
! 		 (set fvg fvg) ; to allow profiling
! 		 (set fvh fvh) ; to allow profiling
! 		 (set frf (c-call SF "sh64_fiprs" (index-of fvg) (index-of fvh))))
!        (sh5-media-models ((unit u-use-fv (in usereg fvg))
! 			  (unit u-use-fv (in usereg fvh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fldd "Floating point load (double)"
         ()
         "fld.d $rm, $disp10x8, $drf"
         (+ (f-op 39) rm disp10x8 drf (f-rsvd 0))
!        (set drf (mem DF (add rm disp10x8)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-fr (out loadreg drf) (cycles 6))
! 			  (unit u-load-dr (out loadreg drf) (cycles 3))
! 			  (unit u-load-fp (out loadreg drf) (cycles 3))
! 			  (unit u-load-fv (out loadreg drf) (cycles 6))
! 			  (unit u-load-mtrx (out loadreg drf) (cycles 6)))))
  
  (dshmi fldp "Floating point load (pair of singles)"
         ()
         "fld.p $rm, $disp10x8, $fpf"
         (+ (f-op 38) rm disp10x8 fpf (f-rsvd 0))
!        (sequence ()
! 		 (set fpf fpf) ; to allow profiling
! 		 (c-call VOID "sh64_fldp" pc rm disp10x8 (index-of fpf)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-fr (out loadreg fpf) (cycles 6))
! 			  (unit u-load-dr (out loadreg fpf) (cycles 3))
! 			  (unit u-load-fp (out loadreg fpf) (cycles 3))
! 			  (unit u-load-fv (out loadreg fpf) (cycles 6))
! 			  (unit u-load-mtrx (out loadreg fpf) (cycles 6)))))
  
  (dshmi flds "Floating point load (single)"
         ()
         "fld.s $rm, $disp10x4, $frf"
         (+ (f-op 37) rm disp10x4 frf (f-rsvd 0))
!        (set frf (mem SF (add rm disp10x4)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-fr (out loadreg frf) (cycles 3))
! 			  (unit u-load-dr (out loadreg frf) (cycles 6))
! 			  (unit u-load-fp (out loadreg frf) (cycles 6))
! 			  (unit u-load-fv (out loadreg frf) (cycles 6))
! 			  (unit u-load-mtrx (out loadreg frf) (cycles 6)))))
  
  (dshmi fldxd "Floating point extended load (double)"
         ()
         "fldx.d $rm, $rn, $drf"
         (+ (f-op 7) rm (f-ext 9) rn frf (f-rsvd 0))
!        (set drf (mem DF (add rm rn)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-fr (out loadreg drf) (cycles 6))
! 			  (unit u-load-dr (out loadreg drf) (cycles 3))
! 			  (unit u-load-fp (out loadreg drf) (cycles 3))
! 			  (unit u-load-fv (out loadreg drf) (cycles 6))
! 			  (unit u-load-mtrx (out loadreg drf) (cycles 6)))))
  
  (dshmi fldxp "Floating point extended load (pair of singles)"
         ()
         "fldx.p $rm, $rn, $fpf"
         (+ (f-op 7) rm (f-ext 13) rn fpf (f-rsvd 0))
!        (sequence ()
! 		 (set fpf fpf) ; Allows profiling
! 		 (c-call VOID "sh64_fldp" pc rm rn (index-of fpf)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-fr (out loadreg fpf) (cycles 6))
! 			  (unit u-load-dr (out loadreg fpf) (cycles 3))
! 			  (unit u-load-fp (out loadreg fpf) (cycles 3))
! 			  (unit u-load-fv (out loadreg fpf) (cycles 6))
! 			  (unit u-load-mtrx (out loadreg fpf) (cycles 6)))))
  
  (dshmi fldxs "Floating point extended load (single)"
         ()
         "fldx.s $rm, $rn, $frf"
         (+ (f-op 7) rm (f-ext 8) rn frf (f-rsvd 0))
!        (set frf (mem SF (add rm rn)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-fr (out loadreg frf) (cycles 3))
! 			  (unit u-load-dr (out loadreg frf) (cycles 6))
! 			  (unit u-load-fp (out loadreg frf) (cycles 6))
! 			  (unit u-load-fv (out loadreg frf) (cycles 6))
! 			  (unit u-load-mtrx (out loadreg frf) (cycles 6)))))
  
  (dshmi floatld "Floating point conversion (long to double)"
         ()
         "float.ld $frgh, $drf"
         (+ (f-op 14) frgh (f-ext 14) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_floatld" frgh))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 6))
! 			  (unit u-set-fp (out loadreg drf) (cycles 6))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi floatls "Floating point conversion (long to single)"
         ()
         "float.ls $frgh, $frf"
         (+ (f-op 14) frgh (f-ext 12) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_floatls" frgh))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi floatqd "Floating point conversion (quad to double)"
         ()
         "float.qd $drgh, $drf"
         (+ (f-op 14) drgh (f-ext 13) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_floatqd" drgh))
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 6))
! 			  (unit u-set-fp (out loadreg drf) (cycles 6))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi floatqs "Floating point conversion (quad to single)"
         ()
         "float.qs $drgh, $frf"
         (+ (f-op 14) drgh (f-ext 15) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_floatqs" drgh))
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fmacs "Floating point multiply and accumulate (single)"
         ()
         "fmac.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 14) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fadds" frf (c-call SF "sh64_fmuls" frg frh)))
!        (sh5-media-models ((unit u-use-fr (in usereg frg))
! 			  (unit u-use-fr (in usereg frh))
! 			  (unit u-use-fr (in usereg frf))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fmovd "Floating point move double"
         ()
         "fmov.d $drgh, $drf"
         (+ (f-op 14) drgh (f-ext 1) drf (f-rsvd 0))
!        (set drf drgh)
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 4))
! 			  (unit u-set-fp (out loadreg drf) (cycles 4))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi fmovdq "Floating point move (double to quad integer)"
         ()
         "fmov.dq $drgh, $rd"
         (+ (f-op 12) drgh (f-ext 1) rd (f-rsvd 0))
!        (set rd (subword DI drgh 0))
!        (sh5-media-models ((unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fmovls "Floating point move (lower to single)"
         ()
         "fmov.ls $rm, $frf"
         (+ (f-op 7) rm (f-ext 0) (f-right 63) frf (f-rsvd 0))
!        (set frf (subword SF (subword SI rm 1) 0))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 4))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fmovqd "Floating point move (quad to double)"
         ()
         "fmov.qd $rm, $drf"
         (+ (f-op 7) rm (f-ext 1) (f-right 63) frf (f-rsvd 0))
!        (set drf (subword DF rm 0))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 4))
! 			  (unit u-set-fp (out loadreg drf) (cycles 4))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi fmovs "Floating point move (single)"
         ()
         "fmov.s $frgh, $frf"
         (+ (f-op 14) frgh (f-ext 0) frf (f-rsvd 0))
!        (set frf frgh)
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 4))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fmovsl "Floating point move (single to lower)"
         ()
         "fmov.sl $frgh, $rd"
         (+ (f-op 12) frgh (f-ext 0) rd (f-rsvd 0))
!        (set rd (ext DI (subword SI frgh 1)))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi fmuld "Floating point multiply (double)"
         ()
         "fmul.d $drg, $drh, $drf"
         (+ (f-op 13) drg (f-ext 7) drh drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fmuld" drg drh))
!        (sh5-media-models ((unit u-use-dr (in usereg drg))
! 			  (unit u-use-dr (in usereg drh))
! 			  (unit u-fpu (cycles 4))
! 			  (unit u-set-fr (out loadreg drf) (cycles 10))
! 			  (unit u-set-dr (out loadreg drf) (cycles 9))
! 			  (unit u-set-fp (out loadreg drf) (cycles 9))
! 			  (unit u-set-fv (out loadreg drf) (cycles 10))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 10)))))
  
  (dshmi fmuls "Floating point multiply (single)"
         ()
         "fmul.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 6) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fmuls" frg frh))
!        (sh5-media-models ((unit u-use-fr (in usereg frg))
! 			  (unit u-use-fr (in usereg frh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fnegd "Floating point negate (double)"
         ()
         "fneg.d $drgh, $drf"
         (+ (f-op 6) drgh (f-ext 3) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fnegd" drgh))
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 4))
! 			  (unit u-set-fp (out loadreg drf) (cycles 4))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi fnegs "Floating point negate (single)"
         ()
         "fneg.s $frgh, $frf"
         (+ (f-op 6) frgh (f-ext 2) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fnegs" frgh))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 4))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi fputscr "Floating point put to FPSCR"
         ()
         "fputscr $frgh"
         (+ (f-op 12) frgh (f-ext 2) (f-dest 63) (f-rsvd 0))
!        (set fpscr (subword SI frgh 0))
!        (sh5-media-models ((unit u-exec (cycles 8)))))
  
  (dshmi fsqrtd "Floating point square root (double)"
         ()
         "fsqrt.d $drgh, $drf"
         (+ (f-op 14) drgh (f-ext 5) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fsqrtd" drgh))
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fsqrtd (out loadreg drf))
! 			  (unit u-set-fr (out loadreg drf) (cycles 36))
! 			  (unit u-set-dr (out loadreg drf) (cycles 35))
! 			  (unit u-set-fp (out loadreg drf) (cycles 35))
! 			  (unit u-set-fv (out loadreg drf) (cycles 36))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 36)))))
  
  (dshmi fsqrts "Floating point squart root (single)"
         ()
         "fsqrt.s $frgh, $frf"
         (+ (f-op 14) frgh (f-ext 4) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fsqrts" frgh))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fsqrt (out loadreg frf))
! 			  (unit u-set-fr (out loadreg frf) (cycles 19))
! 			  (unit u-set-dr (out loadreg frf) (cycles 20))
! 			  (unit u-set-fp (out loadreg frf) (cycles 20))
! 			  (unit u-set-fv (out loadreg frf) (cycles 20))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 20)))))
  
  (dshmi fstd "Floating point store (double)"
         ()
         "fst.d $rm, $disp10x8, $drf"
         (+ (f-op 47) rm disp10x8 drf (f-rsvd 0))
!        (set (mem DF (add rm disp10x8)) drf)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-dr (in usereg drf))
! 			  (unit u-exec))))
  
  (dshmi fstp "Floating point store (pair of singles)"
         ()
         "fst.p $rm, $disp10x8, $fpf"
         (+ (f-op 46) rm disp10x8 fpf (f-rsvd 0))
!        (sequence ()
! 		 (set fpf fpf) ; Allows profiling
! 		 (c-call VOID "sh64_fstp" pc rm disp10x8 (index-of fpf)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-fp (in usereg fpf))
! 			  (unit u-exec))))
  
  (dshmi fsts "Floating point store (single)"
         ()
         "fst.s $rm, $disp10x4, $frf"
         (+ (f-op 45) rm disp10x4 frf (f-rsvd 0))
!        (set (mem SF (add rm disp10x4)) frf)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-fr (in usereg frf))
! 			  (unit u-exec))))
  
  (dshmi fstxd "Floating point extended store (double)"
         ()
         "fstx.d $rm, $rn, $drf"
         (+ (f-op 15) rm (f-ext 9) rn drf (f-rsvd 0))
!        (set (mem DF (add rm rn)) drf)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-use-dr (in usereg drf))
! 			  (unit u-exec))))
  
  (dshmi fstxp "Floating point extended store (pair of singles)"
         ()
         "fstx.p $rm, $rn, $fpf"
         (+ (f-op 15) rm (f-ext 13) rn fpf (f-rsvd 0))
!        (sequence ()
! 		 (set fpf fpf) ; Allows profiling
! 		 (c-call VOID "sh64_fstp" pc rm rn (index-of fpf)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-use-fp (in usereg fpf))
! 			  (unit u-exec))))
  
  (dshmi fstxs "Floating point extended store (single)"
         ()
         "fstx.s $rm, $rn, $frf"
         (+ (f-op 15) rm (f-ext 8) rn frf (f-rsvd 0))
!        (set (mem SF (add rm rn)) frf)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-use-fr (in usereg frf))
! 			  (unit u-exec))))
  
  (dshmi fsubd "Floating point subtract (double)"
         ()
         "fsub.d $drg, $drh, $drf"
         (+ (f-op 13) frg (f-ext 3) frh frf (f-rsvd 0))
!        (set drf (c-call DF "sh64_fsubd" drg drh))
!        (sh5-media-models ((unit u-use-dr (in usereg drg))
! 			  (unit u-use-dr (in usereg drh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 6))
! 			  (unit u-set-fp (out loadreg drf) (cycles 6))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi fsubs "Floating point subtract (single)"
         ()
         "fsub.s $frg, $frh, $frf"
         (+ (f-op 13) frg (f-ext 2) frh frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_fsubs" frg frh))
!        (sh5-media-models ((unit u-use-fr (in usereg frg))
! 			  (unit u-use-fr (in usereg frh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi ftrcdl "Floating point conversion (double to long)"
         ()
         "ftrc.dl $drgh, $frf"
         (+ (f-op 14) drgh (f-ext 11) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_ftrcdl" drgh))
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi ftrcsl "Floating point conversion (single to long)"
         ()
         "ftrc.sl $frgh, $frf"
         (+ (f-op 14) frgh (f-ext 8) frf (f-rsvd 0))
!        (set frf (c-call SF "sh64_ftrcsl" frgh))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg frf) (cycles 6))
! 			  (unit u-set-dr (out loadreg frf) (cycles 7))
! 			  (unit u-set-fp (out loadreg frf) (cycles 7))
! 			  (unit u-set-fv (out loadreg frf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg frf) (cycles 7)))))
  
  (dshmi ftrcdq "Floating point conversion (double to quad)"
         ()
         "ftrc.dq $drgh, $drf"
         (+ (f-op 14) drgh (f-ext 9) frf (f-rsvd 0))
!        (set drf (c-call DF "sh64_ftrcdq" drgh))
!        (sh5-media-models ((unit u-use-dr (in usereg drgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 6))
! 			  (unit u-set-fp (out loadreg drf) (cycles 6))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi ftrcsq "Floating point conversion (single to quad)"
         ()
         "ftrc.sq $frgh, $drf"
         (+ (f-op 14) frgh (f-ext 10) drf (f-rsvd 0))
!        (set drf (c-call DF "sh64_ftrcsq" frgh))
!        (sh5-media-models ((unit u-use-fr (in usereg frgh))
! 			  (unit u-fpu (cycles 1))
! 			  (unit u-set-fr (out loadreg drf) (cycles 7))
! 			  (unit u-set-dr (out loadreg drf) (cycles 6))
! 			  (unit u-set-fp (out loadreg drf) (cycles 6))
! 			  (unit u-set-fv (out loadreg drf) (cycles 7))
! 			  (unit u-set-mtrx (out loadreg drf) (cycles 7)))))
  
  (dshmi ftrvs "Floating point matrix multiply"
         ()
         "ftrv.s $mtrxg, $fvh, $fvf"
         (+ (f-op 5) mtrxg (f-ext 14) fvh fvf (f-rsvd 0))
!        (sequence ()
! 		 (set mtrxg mtrxg) ; to allow profiling
! 		 (set fvh fvh) ; to allow profiling
! 		 (set fvf fvf) ; to allow profiling
! 		 (c-call "sh64_ftrvs" (index-of mtrxg) (index-of fvh) (index-of fvf)))
!        (sh5-media-models ((unit u-use-mtrx (in usereg mtrxg))
! 			  (unit u-use-fv (in usereg fvh))
! 			  (unit u-fpu (cycles 4))
! 			  (unit u-ftrvs (out loadreg fvf)))))
  
  (dshmi getcfg "Get configuration register"
         ()
         "getcfg $rm, $disp6, $rd"
         (+ (f-op 48) rm (f-ext 15) disp6 rd (f-rsvd 0))
!        (sequence ((SI address))
! 		 (set address (add rm disp6))
! 		 (save-cfg-address address)
! 		 (set rd (mem SI address)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-getcfg))))
  
  (dshmi getcon "Get control register"
         ()
         "getcon $crk, $rd"
         (+ (f-op 9) crk (f-ext 15) (f-right 63) rd (f-rsvd 0))
!        (set rd crk)
!        (sh5-media-models ((unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (dshmi gettr "Get target register"
         ()
         "gettr $trb, $rd"
!        (+ (f-op 17) (f-6-3 0) trb (f-ext 5) (f-right 63) rd (f-rsvd 0))
!        (set rd trb)
!        (sh5-media-models ((unit u-use-tr (in usereg trb))
! 			  (unit u-exec))))
  
  (dshmi icbi "Invalidate instruction cache block"
         ()
         "icbi $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 5) disp6x32 (f-dest 63) (f-rsvd 0))
!        (sequence ()
! 		 (set rm rm) ; for now to allow profiling
! 		 (unimp "icbi"))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi ldb "Load byte"
         ()
         "ld.b $rm, $disp10, $rd"
         (+ (f-op 32) rm disp10 rd (f-rsvd 0))
!        (set rd (ext DI (mem QI (add rm (ext DI disp10)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldl "Load long word"
         ()
         "ld.l $rm, $disp10x4, $rd"
         (+ (f-op 34) rm disp10x4 rd (f-rsvd 0))
!        (set rd (ext DI (mem SI (add rm (ext DI disp10x4)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldq "Load quad word"
         ()
         "ld.q $rm, $disp10x8, $rd"
         (+ (f-op 35) rm disp10x8 rd (f-rsvd 0))
!        (set rd (mem DI (add rm (ext DI disp10x8))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldub "Load unsigned byte"
         ()
         "ld.ub $rm, $disp10, $rd"
         (+ (f-op 36) rm disp10 rd (f-rsvd 0))
!        (set rd (zext DI (mem QI (add rm (ext DI disp10)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi lduw "Load unsigned word"
         ()
         "ld.uw $rm, $disp10x2, $rd"
         (+ (f-op 44) rm disp10 rd (f-rsvd 0))
!        (set rd (zext DI (mem HI (add rm (ext DI disp10x2)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldw "Load word"
         ()
         "ld.w $rm, $disp10x2, $rd"
         (+ (f-op 33) rm disp10 rd (f-rsvd 0))
!        (set rd (ext DI (mem HI (add rm (ext DI disp10x2)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (define-pmacro (-ldhi-byte)
    (if (and bytecount 1)
***************
*** 794,800 ****
  				   (set rd
  					(ext DI
  					 (sll SI val
! 					      (sub 32 (mul 8 bytecount))))))))))
  
  (dshmi ldhiq "Load high part (quad word)"
         ()
--- 1240,1250 ----
  				   (set rd
  					(ext DI
  					 (sll SI val
! 					      (sub 32 (mul 8 bytecount)))))))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldhiq "Load high part (quad word)"
         ()
***************
*** 818,824 ****
  				   (-ldhi-long)
  				   (set rd
  					(sll val
! 					     (sub 64 (mul 8 bytecount)))))))))
  
  (define-pmacro (-ldlo-byte)
    (if (and bytecount 1)
--- 1268,1278 ----
  				   (-ldhi-long)
  				   (set rd
  					(sll val
! 					     (sub 64 (mul 8 bytecount))))))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (define-pmacro (-ldlo-byte)
    (if (and bytecount 1)
***************
*** 853,859 ****
  			 (sequence () ; Little endian.
  				   (-ldlo-word)
  				   (-ldlo-byte)
! 				   (set rd (ext DI val)))))))
  
  (dshmi ldloq "Load low part (quad word)"
         ()
--- 1307,1317 ----
  			 (sequence () ; Little endian.
  				   (-ldlo-word)
  				   (-ldlo-byte)
! 				   (set rd (ext DI val))))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldloq "Load low part (quad word)"
         ()
***************
*** 876,918 ****
  				   (-ldlo-long)
  				   (-ldlo-word)
  				   (-ldlo-byte)
! 				   (set rd val))))))
  
  (dshmi ldxb "Load byte (extended displacement)"
         ()
         "ldx.b $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 0) rn rd (f-rsvd 0))
!        (set rd (ext DI (mem QI (add rm rn)))))
  
  (dshmi ldxl "Load long word (extended displacement)"
         ()
         "ldx.l $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 2) rn rd (f-rsvd 0))
!        (set rd (ext DI (mem SI (add rm rn)))))
  
  (dshmi ldxq "Load quad word (extended displacement)"
         ()
         "ldx.q $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set rd (mem DI (add rm rn))))
  
  (dshmi ldxub "Load unsigned byte (extended displacement)"
         ()
         "ldx.ub $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 4) rn rd (f-rsvd 0))
!        (set rd (zext DI (mem UQI (add rm rn)))))
  
  (dshmi ldxuw "Load unsigned word (extended displacement)"
         ()
         "ldx.uw $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 5) rn rd (f-rsvd 0))
!        (set rd (zext DI (mem UHI (add rm rn)))))
  
  (dshmi ldxw "Load word (extended displacement)"
         ()
         "ldx.w $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 1) rn rd (f-rsvd 0))
!        (set rd (ext DI (mem HI (add rm rn)))))
  
  \f
  ; Macros to facilitate multimedia instructions.
--- 1334,1410 ----
  				   (-ldlo-long)
  				   (-ldlo-word)
  				   (-ldlo-byte)
! 				   (set rd val)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldxb "Load byte (extended displacement)"
         ()
         "ldx.b $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 0) rn rd (f-rsvd 0))
!        (set rd (ext DI (mem QI (add rm rn))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldxl "Load long word (extended displacement)"
         ()
         "ldx.l $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 2) rn rd (f-rsvd 0))
!        (set rd (ext DI (mem SI (add rm rn))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldxq "Load quad word (extended displacement)"
         ()
         "ldx.q $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set rd (mem DI (add rm rn)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldxub "Load unsigned byte (extended displacement)"
         ()
         "ldx.ub $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 4) rn rd (f-rsvd 0))
!        (set rd (zext DI (mem UQI (add rm rn))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldxuw "Load unsigned word (extended displacement)"
         ()
         "ldx.uw $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 5) rn rd (f-rsvd 0))
!        (set rd (zext DI (mem UHI (add rm rn))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  (dshmi ldxw "Load word (extended displacement)"
         ()
         "ldx.w $rm, $rn, $rd"
         (+ (f-op 16) rm (f-ext 1) rn rd (f-rsvd 0))
!        (set rd (ext DI (mem HI (add rm rn))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-memory-access)
! 			  (unit u-load-gr (out loadreg rd)))))
  
  \f
  ; Macros to facilitate multimedia instructions.
***************
*** 965,989 ****
         ()
         "mabs.l $rm, $rd"
         (+ (f-op 10) rm (f-ext 10) (f-right 63) rd (f-rsvd 0))
!        (slice-long-unop abs))
  
  (dshmi mabsw "Multimedia absolute value (word)"
         ()
         "mabs.w $rm, $rd"
         (+ (f-op 10) rm (f-ext 9) (f-right 63) rd (f-rsvd 0))
!        (slice-word-unop abs))
  
  (dshmi maddl "Multimedia add (long word)"
         ()
         "madd.l $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 2) rn rd (f-rsvd 0))
!        (slice-long add))
  
  (dshmi maddw "Multimedia add (word)"
         ()
         "madd.w $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 1) rn rd (f-rsvd 0))
!        (slice-word add))
  
  (define-pmacro (-maddsl arg1 arg2) (saturate SI 32 (add (ext DI arg1)
  							(ext DI arg2))))
--- 1457,1493 ----
         ()
         "mabs.l $rm, $rd"
         (+ (f-op 10) rm (f-ext 10) (f-right 63) rd (f-rsvd 0))
!        (slice-long-unop abs)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (dshmi mabsw "Multimedia absolute value (word)"
         ()
         "mabs.w $rm, $rd"
         (+ (f-op 10) rm (f-ext 9) (f-right 63) rd (f-rsvd 0))
!        (slice-word-unop abs)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (dshmi maddl "Multimedia add (long word)"
         ()
         "madd.l $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 2) rn rd (f-rsvd 0))
!        (slice-long add)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi maddw "Multimedia add (word)"
         ()
         "madd.w $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 1) rn rd (f-rsvd 0))
!        (slice-word add)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (define-pmacro (-maddsl arg1 arg2) (saturate SI 32 (add (ext DI arg1)
  							(ext DI arg2))))
***************
*** 991,997 ****
         ()
         "madds.l $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 6) rn rd (f-rsvd 0))
!        (slice-long -maddsl))
  
  (define-pmacro (-maddsub arg1 arg2) (usaturate QI 8 (add (zext DI arg1)
  							 (zext DI arg2))))
--- 1495,1505 ----
         ()
         "madds.l $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 6) rn rd (f-rsvd 0))
!        (slice-long -maddsl)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-maddsub arg1 arg2) (usaturate QI 8 (add (zext DI arg1)
  							 (zext DI arg2))))
***************
*** 999,1005 ****
         ()
         "madds.ub $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 4) rn rd (f-rsvd 0))
!        (slice-byte -maddsub))
  
  (define-pmacro (-maddsw arg1 arg2) (saturate HI 16 (add (ext DI arg1)
  							(ext DI arg2))))
--- 1507,1517 ----
         ()
         "madds.ub $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 4) rn rd (f-rsvd 0))
!        (slice-byte -maddsub)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-maddsw arg1 arg2) (saturate HI 16 (add (ext DI arg1)
  							(ext DI arg2))))
***************
*** 1007,1013 ****
         ()
         "madds.w $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 5) rn rd (f-rsvd 0))
!        (slice-word -maddsw))
  
  (define-pmacro (-mcmpeq mode arg1 arg2)
    (if mode (eq arg1 arg2) (inv mode 0) (const mode 0)))
--- 1519,1529 ----
         ()
         "madds.w $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 5) rn rd (f-rsvd 0))
!        (slice-word -maddsw)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-mcmpeq mode arg1 arg2)
    (if mode (eq arg1 arg2) (inv mode 0) (const mode 0)))
***************
*** 1017,1037 ****
         ()
         "mcmpeq.b $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 0) rn rd (f-rsvd 0))
!        (slice-byte -mcmpeqb))
  
  (define-pmacro (-mcmpeql arg1 arg2) (-mcmpeq SI arg1 arg2))
  (dshmi mcmpeql "Multimedia compare equal (long word)"
         ()
         "mcmpeq.l $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 2) rn rd (f-rsvd 0))
!        (slice-long -mcmpeql))
  
  (define-pmacro (-mcmpeqw arg1 arg2) (-mcmpeq HI arg1 arg2))
  (dshmi mcmpeqw "Multimedia compare equal (word)"
         ()
         "mcmpeq.w $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 1) rn rd (f-rsvd 0))
!        (slice-word -mcmpeqw))
  
  (define-pmacro (-mcmpgt mode arg1 arg2)
    (if mode (gt arg1 arg2) (inv mode 0) (const mode 0)))
--- 1533,1565 ----
         ()
         "mcmpeq.b $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 0) rn rd (f-rsvd 0))
!        (slice-byte -mcmpeqb)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-mcmpeql arg1 arg2) (-mcmpeq SI arg1 arg2))
  (dshmi mcmpeql "Multimedia compare equal (long word)"
         ()
         "mcmpeq.l $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 2) rn rd (f-rsvd 0))
!        (slice-long -mcmpeql)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-mcmpeqw arg1 arg2) (-mcmpeq HI arg1 arg2))
  (dshmi mcmpeqw "Multimedia compare equal (word)"
         ()
         "mcmpeq.w $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 1) rn rd (f-rsvd 0))
!        (slice-word -mcmpeqw)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-mcmpgt mode arg1 arg2)
    (if mode (gt arg1 arg2) (inv mode 0) (const mode 0)))
***************
*** 1043,1069 ****
         ()
         "mcmpgt.l $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 6) rn rd (f-rsvd 0))
!        (slice-long -mcmpgtl))
  
  (define-pmacro (-mcmpgtub arg1 arg2) (-mcmpgtu QI arg1 arg2))
  (dshmi mcmpgtub "Multimediate compare unsigned greater than (byte)"
         ()
         "mcmpgt.ub $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 4) rn rd (f-rsvd 0))
!        (slice-byte -mcmpgtub))
  
  (define-pmacro (-mcmpgtw arg1 arg2) (-mcmpgt HI arg1 arg2))
  (dshmi mcmpgtw "Multimedia compare greater than (word)"
         ()
         "mcmpgt.w $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 5) rn rd (f-rsvd 0))
!        (slice-word -mcmpgtw))
  
  (dshmi mcmv "Multimedia conditional move"
         ()
         "mcmv $rm, $rn, $rd"
         (+ (f-op 18) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set rd (or (and rm rn) (and rd (inv rn)))))
  
  (dshmi mcnvslw "Multimedia convert/saturate (long to word)"
         ()
--- 1571,1612 ----
         ()
         "mcmpgt.l $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 6) rn rd (f-rsvd 0))
!        (slice-long -mcmpgtl)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-mcmpgtub arg1 arg2) (-mcmpgtu QI arg1 arg2))
  (dshmi mcmpgtub "Multimediate compare unsigned greater than (byte)"
         ()
         "mcmpgt.ub $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 4) rn rd (f-rsvd 0))
!        (slice-byte -mcmpgtub)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-mcmpgtw arg1 arg2) (-mcmpgt HI arg1 arg2))
  (dshmi mcmpgtw "Multimedia compare greater than (word)"
         ()
         "mcmpgt.w $rm, $rn, $rd"
         (+ (f-op 10) rm (f-ext 5) rn rd (f-rsvd 0))
!        (slice-word -mcmpgtw)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (dshmi mcmv "Multimedia conditional move"
         ()
         "mcmv $rm, $rn, $rd"
         (+ (f-op 18) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set rd (or (and rm rn) (and rd (inv rn))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mcnvslw "Multimedia convert/saturate (long to word)"
         ()
***************
*** 1074,1080 ****
  		 (set result1 (saturate HI 16 (subword SI rm 0)))
  		 (set result2 (saturate HI 16 (subword SI rn 1)))
  		 (set result3 (saturate HI 16 (subword SI rn 0)))
! 		 (set rd (-join-hi result3 result2 result1 result0))))
  
  (dshmi mcnvswb "Multimedia convert/saturate (word to byte)"
         ()
--- 1617,1627 ----
  		 (set result1 (saturate HI 16 (subword SI rm 0)))
  		 (set result2 (saturate HI 16 (subword SI rn 1)))
  		 (set result3 (saturate HI 16 (subword SI rn 0)))
! 		 (set rd (-join-hi result3 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (dshmi mcnvswb "Multimedia convert/saturate (word to byte)"
         ()
***************
*** 1091,1097 ****
  		 (set result6 (saturate QI 8 (subword HI rn 1)))
  		 (set result7 (saturate QI 8 (subword HI rn 0)))
  		 (set rd (-join-qi result7 result6 result5 result4
! 				 result3 result2 result1 result0))))
  
  (dshmi mcnvswub "Multimedia convert/saturate (word to unsigned byte)"
         ()
--- 1638,1648 ----
  		 (set result6 (saturate QI 8 (subword HI rn 1)))
  		 (set result7 (saturate QI 8 (subword HI rn 0)))
  		 (set rd (-join-qi result7 result6 result5 result4
! 				 result3 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (dshmi mcnvswub "Multimedia convert/saturate (word to unsigned byte)"
         ()
***************
*** 1108,1114 ****
  		 (set result6 (usaturate QI 8 (subword HI rn 1)))
  		 (set result7 (usaturate QI 8 (subword HI rn 0)))
  		 (set rd (-join-qi result7 result6 result5 result4 result3
! 				 result2 result1 result0))))
  
  ; mexter -- generate an mexterN instruction, where:
  ;   op = primary opcode
--- 1659,1669 ----
  		 (set result6 (usaturate QI 8 (subword HI rn 1)))
  		 (set result7 (usaturate QI 8 (subword HI rn 0)))
  		 (set rd (-join-qi result7 result6 result5 result4 result3
! 				 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  ; mexter -- generate an mexterN instruction, where:
  ;   op = primary opcode
***************
*** 1126,1132 ****
  		   (set rhs (srl (and rm mask) count))
  		   (set count (mul QI 8 (sub QI 8 n)))
  		   (set mask (srl DI (inv 0) count))
! 		   (set rd (or DI rhs (sll DI (and rn mask) count))))))
  
  (make-mextr 1 10  7)
  (make-mextr 2 10 11)
--- 1681,1690 ----
  		   (set rhs (srl (and rm mask) count))
  		   (set count (mul QI 8 (sub QI 8 n)))
  		   (set mask (srl DI (inv 0) count))
! 		   (set rd (or DI rhs (sll DI (and rn mask) count))))
! 	 (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			    (unit u-use-gr (in usereg rn))
! 			    (unit u-exec)))))
  
  (make-mextr 1 10  7)
  (make-mextr 2 10 11)
***************
*** 1151,1157 ****
  		 (set temp (saturate SI 32 (sll DI temp 1)))
  		 (set result1 (saturate SI 32 (add (ext DI result1)
  						   (ext DI temp))))
! 		 (set rd (-join-si result1 result0))))
  
  (dshmi mmacnfx.wl "Multimedia fractional multiple (word to long)"
         ()
--- 1709,1718 ----
  		 (set temp (saturate SI 32 (sll DI temp 1)))
  		 (set result1 (saturate SI 32 (add (ext DI result1)
  						   (ext DI temp))))
! 		 (set rd (-join-si result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mmacnfx.wl "Multimedia fractional multiple (word to long)"
         ()
***************
*** 1168,1186 ****
  		 (set temp (saturate SI 32 (sll DI temp 1)))
  		 (set result1 (saturate SI 32 (sub (ext DI result1)
  						   (ext DI temp))))
! 		 (set rd (-join-si result1 result0))))
  
  (dshmi mmull "Multimedia multiply (long word)"
         ()
         "mmul.l $rm, $rn, $rd"
         (+ (f-op 19) rm (f-ext 2) rn rd (f-rsvd 0))
!        (slice-long mul))
  
  (dshmi mmulw "Multimedia multiply (word)"
         ()
         "mmul.w $rm, $rn, $rd"
         (+ (f-op 19) rm (f-ext 1) rn rd (f-rsvd 0))
!        (slice-word mul))
  
  (dshmi mmulfxl "Multimedia fractional multiply (long word)"
         ()
--- 1729,1758 ----
  		 (set temp (saturate SI 32 (sll DI temp 1)))
  		 (set result1 (saturate SI 32 (sub (ext DI result1)
  						   (ext DI temp))))
! 		 (set rd (-join-si result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mmull "Multimedia multiply (long word)"
         ()
         "mmul.l $rm, $rn, $rd"
         (+ (f-op 19) rm (f-ext 2) rn rd (f-rsvd 0))
!        (slice-long mul)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec (cycles 2))
! 			  (unit u-set-gr (cycles 4) (out loadreg rd)))))
  
  (dshmi mmulw "Multimedia multiply (word)"
         ()
         "mmul.w $rm, $rn, $rd"
         (+ (f-op 19) rm (f-ext 1) rn rd (f-rsvd 0))
!        (slice-word mul)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi mmulfxl "Multimedia fractional multiply (long word)"
         ()
***************
*** 1191,1197 ****
  		 (set result0 (saturate SI 32 (sra temp 31)))
  		 (set temp (mul (zext DI (subword SI rm 0)) (zext DI (subword SI rn 0))))
  		 (set result1 (saturate SI 32 (sra temp 31)))
! 		 (set rd (-join-si result1 result0))))
  
  (dshmi mmulfxw "Multimedia fractional multiply (word)"
         ()
--- 1763,1773 ----
  		 (set result0 (saturate SI 32 (sra temp 31)))
  		 (set temp (mul (zext DI (subword SI rm 0)) (zext DI (subword SI rn 0))))
  		 (set result1 (saturate SI 32 (sra temp 31)))
! 		 (set rd (-join-si result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec (cycles 2))
! 			  (unit u-set-gr (cycles 4) (out loadreg rd)))))
  
  (dshmi mmulfxw "Multimedia fractional multiply (word)"
         ()
***************
*** 1206,1212 ****
  		 (set result2 (saturate HI 16 (sra temp 15)))
  		 (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
  		 (set result3 (saturate HI 16 (sra temp 15)))
! 		 (set rd (-join-hi result3 result2 result1 result0))))
  
  (dshmi mmulfxrpw "Multimedia fractional multiply round positive (word op)"
         ()
--- 1782,1792 ----
  		 (set result2 (saturate HI 16 (sra temp 15)))
  		 (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
  		 (set result3 (saturate HI 16 (sra temp 15)))
! 		 (set rd (-join-hi result3 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi mmulfxrpw "Multimedia fractional multiply round positive (word op)"
         ()
***************
*** 1222,1228 ****
  		 (set result2 (saturate HI 16 (sra (add temp c) 15)))
  		 (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
  		 (set result3 (saturate HI 16 (sra (add temp c) 15)))
! 		 (set rd (-join-hi result3 result2 result1 result0))))
  
  (dshmi mmulhiwl "Multimedia multiply higher halves (word to long)"
         ()
--- 1802,1812 ----
  		 (set result2 (saturate HI 16 (sra (add temp c) 15)))
  		 (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
  		 (set result3 (saturate HI 16 (sra (add temp c) 15)))
! 		 (set rd (-join-hi result3 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi mmulhiwl "Multimedia multiply higher halves (word to long)"
         ()
***************
*** 1231,1237 ****
         (sequence ((SI result1) (SI result0))
  		 (set result0 (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1))))
  		 (set result1 (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
! 		 (set rd (-join-si result1 result0))))
  
  (dshmi mmullowl "Multimedia multiply lower halves (word to long)"
         ()
--- 1815,1825 ----
         (sequence ((SI result1) (SI result0))
  		 (set result0 (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1))))
  		 (set result1 (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
! 		 (set rd (-join-si result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi mmullowl "Multimedia multiply lower halves (word to long)"
         ()
***************
*** 1240,1246 ****
         (sequence ((SI result1) (SI result0))
  		 (set result0 (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3))))
  		 (set result1 (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2))))
! 		 (set rd (-join-si result1 result0))))
  
  (dshmi mmulsumwq "Multimedia multiply and accumulate (word to quad)"
         ()
--- 1828,1838 ----
         (sequence ((SI result1) (SI result0))
  		 (set result0 (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3))))
  		 (set result1 (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2))))
! 		 (set rd (-join-si result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi mmulsumwq "Multimedia multiply and accumulate (word to quad)"
         ()
***************
*** 1251,1263 ****
  		 (set acc (add acc (mul SI (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))))
  		 (set acc (add acc (mul SI (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2)))))
  		 (set acc (add acc (mul SI (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3)))))
! 		 (set rd (add rd acc))))
  
  (dshmi movi "Move immediate"
         ()
         "movi $imm16, $rd"
         (+ (f-op 51) imm16 rd (f-rsvd 0))
!        (set rd (ext DI imm16)))
  
  (dshmi mpermw "Multimedia permutate word"
         ()
--- 1843,1859 ----
  		 (set acc (add acc (mul SI (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))))
  		 (set acc (add acc (mul SI (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2)))))
  		 (set acc (add acc (mul SI (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3)))))
! 		 (set rd (add rd acc)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi movi "Move immediate"
         ()
         "movi $imm16, $rd"
         (+ (f-op 51) imm16 rd (f-rsvd 0))
!        (set rd (ext DI imm16))
!        ())
  
  (dshmi mpermw "Multimedia permutate word"
         ()
***************
*** 1269,1275 ****
  		 (set result1 (subword HI rm (sub 3 (and (srl control 2) 3))))
  		 (set result2 (subword HI rm (sub 3 (and (srl control 4) 3))))
  		 (set result3 (subword HI rm (sub 3 (and (srl control 6) 3))))
! 		 (set rd (-join-hi result3 result2 result1 result0))))
  
  (dshmi msadubq "Multimedia absolute difference (byte)"
         ()
--- 1865,1874 ----
  		 (set result1 (subword HI rm (sub 3 (and (srl control 2) 3))))
  		 (set result2 (subword HI rm (sub 3 (and (srl control 4) 3))))
  		 (set result3 (subword HI rm (sub 3 (and (srl control 6) 3))))
! 		 (set rd (-join-hi result3 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi msadubq "Multimedia absolute difference (byte)"
         ()
***************
*** 1284,1324 ****
  		 (set acc (add DI acc (abs (sub (subword QI rm 5) (subword QI rn 5)))))
  		 (set acc (add DI acc (abs (sub (subword QI rm 6) (subword QI rn 6)))))
  		 (set acc (add DI acc (abs (sub (subword QI rm 7) (subword QI rn 7)))))
! 		 (set rd (add rd acc))))
  
  (define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
  (dshmi mshaldsl "Multimedia saturating arithmetic left shift (long word)"
         ()
         "mshalds.l $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 6) rn rd (f-rsvd 0))
!        (slice-long-unop -mshaldsl))
  
  (define-pmacro (-mshaldsw arg) (saturate HI 16 (sll DI arg (and rn 15))))
  (dshmi mshaldsw "Multimedia saturating arithmetic left shift (word)"
         ()
         "mshalds.w $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 5) rn rd (f-rsvd 0))
!        (slice-word-unop -mshaldsw))
  
  (define-pmacro (-mshardl arg) (sra arg (and rn 31)))
  (dshmi mshardl "Multimedia arithmetic right shift (long)"
         ()
         "mshard.l $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 10) rn rd (f-rsvd 0))
!        (slice-long-unop -mshardl))
  
  (define-pmacro (-mshardw arg) (sra arg (and rn 15)))
  (dshmi mshardw "Multimedia arithmetic right shift (word)"
         ()
         "mshard.w $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 9) rn rd (f-rsvd 0))
!        (slice-word-unop -mshardw))
  
  (dshmi mshardsq "Multimedia saturating arithmetic right shift (quad word)"
         ()
         "mshards.q $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 11) rn rd (f-rsvd 0))
!        (set rd (saturate DI 16 (sra rm (and rn 63)))))
  
  (dshmi mshfhib "Multimedia shuffle higher-half (byte)"
         ()
--- 1883,1944 ----
  		 (set acc (add DI acc (abs (sub (subword QI rm 5) (subword QI rn 5)))))
  		 (set acc (add DI acc (abs (sub (subword QI rm 6) (subword QI rn 6)))))
  		 (set acc (add DI acc (abs (sub (subword QI rm 7) (subword QI rn 7)))))
! 		 (set rd (add rd acc)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
  (dshmi mshaldsl "Multimedia saturating arithmetic left shift (long word)"
         ()
         "mshalds.l $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 6) rn rd (f-rsvd 0))
!        (slice-long-unop -mshaldsl)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-mshaldsw arg) (saturate HI 16 (sll DI arg (and rn 15))))
  (dshmi mshaldsw "Multimedia saturating arithmetic left shift (word)"
         ()
         "mshalds.w $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 5) rn rd (f-rsvd 0))
!        (slice-word-unop -mshaldsw)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-mshardl arg) (sra arg (and rn 31)))
  (dshmi mshardl "Multimedia arithmetic right shift (long)"
         ()
         "mshard.l $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 10) rn rd (f-rsvd 0))
!        (slice-long-unop -mshardl)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (define-pmacro (-mshardw arg) (sra arg (and rn 15)))
  (dshmi mshardw "Multimedia arithmetic right shift (word)"
         ()
         "mshard.w $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 9) rn rd (f-rsvd 0))
!        (slice-word-unop -mshardw)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mshardsq "Multimedia saturating arithmetic right shift (quad word)"
         ()
         "mshards.q $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 11) rn rd (f-rsvd 0))
!        (set rd (saturate DI 16 (sra rm (and rn 63))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (dshmi mshfhib "Multimedia shuffle higher-half (byte)"
         ()
***************
*** 1335,1341 ****
  		 (set result6 (subword QI rm 0))
  		 (set result7 (subword QI rn 0))
  		 (set rd (-join-qi result7 result6 result5 result4 result3
! 				 result2 result1 result0))))
  
  (dshmi mshfhil "Multimedia shuffle higher-half (long)"
         ()
--- 1955,1964 ----
  		 (set result6 (subword QI rm 0))
  		 (set result7 (subword QI rn 0))
  		 (set rd (-join-qi result7 result6 result5 result4 result3
! 				 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mshfhil "Multimedia shuffle higher-half (long)"
         ()
***************
*** 1344,1350 ****
         (sequence ((SI result1) (SI result0))
  		 (set result0 (subword SI rm 0))
  		 (set result1 (subword SI rn 0))
! 		 (set rd (-join-si result1 result0))))
  
  (dshmi mshfhiw "Multimedia shuffle higher-half (word)"
         ()
--- 1967,1976 ----
         (sequence ((SI result1) (SI result0))
  		 (set result0 (subword SI rm 0))
  		 (set result1 (subword SI rn 0))
! 		 (set rd (-join-si result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mshfhiw "Multimedia shuffle higher-half (word)"
         ()
***************
*** 1355,1361 ****
  		 (set result1 (subword HI rn 1))
  		 (set result2 (subword HI rm 0))
  		 (set result3 (subword HI rn 0))
! 		 (set rd (-join-hi result3 result2 result1 result0))))
  
  (dshmi mshflob "Multimedia shuffle lower-half (byte)"
         ()
--- 1981,1990 ----
  		 (set result1 (subword HI rn 1))
  		 (set result2 (subword HI rm 0))
  		 (set result3 (subword HI rn 0))
! 		 (set rd (-join-hi result3 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mshflob "Multimedia shuffle lower-half (byte)"
         ()
***************
*** 1372,1378 ****
  		 (set result6 (subword QI rm 4))
  		 (set result7 (subword QI rn 4))
  		 (set rd (-join-qi result7 result6 result5 result4 result3
! 				 result2 result1 result0))))
  
  (dshmi mshflol "Multimedia shuffle lower-half (long)"
         ()
--- 2001,2010 ----
  		 (set result6 (subword QI rm 4))
  		 (set result7 (subword QI rn 4))
  		 (set rd (-join-qi result7 result6 result5 result4 result3
! 				 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mshflol "Multimedia shuffle lower-half (long)"
         ()
***************
*** 1381,1387 ****
         (sequence ((SI result1) (SI result0))
  		 (set result0 (subword SI rm 1))
  		 (set result1 (subword SI rn 1))
! 		 (set rd (-join-si result1 result0))))
  
  (dshmi mshflow "Multimedia shuffle lower-half (word)"
         ()
--- 2013,2022 ----
         (sequence ((SI result1) (SI result0))
  		 (set result0 (subword SI rm 1))
  		 (set result1 (subword SI rn 1))
! 		 (set rd (-join-si result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi mshflow "Multimedia shuffle lower-half (word)"
         ()
***************
*** 1392,1438 ****
  		 (set result1 (subword HI rn 3))
  		 (set result2 (subword HI rm 2))
  		 (set result3 (subword HI rn 2))
! 		 (set rd (-join-hi result3 result2 result1 result0))))
  
  (define-pmacro (-mshlldl arg) (sll arg (and rn 31)))
  (dshmi mshlldl "Multimedia logical left shift (long word)"
         ()
         "mshlld.l $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 2) rn rd (f-rsvd 0))
!        (slice-long-unop -mshlldl))
  
  (define-pmacro (-mshlldw arg) (sll arg (and rn 15)))
  (dshmi mshlldw "Multimedia logical left shift (word)"
         ()
         "mshlld.w $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 1) rn rd (f-rsvd 0))
!        (slice-word-unop -mshlldw))
  
  (define-pmacro (-mshlrdl arg) (srl arg (and rn 31)))
  (dshmi mshlrdl "Multimedia logical right shift (long word)"
         ()
         "mshlrd.l $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 14) rn rd (f-rsvd 0))
!        (slice-long-unop -mshlrdl))
  
  (define-pmacro (-mshlrdw arg) (srl arg (and rn 15)))
  (dshmi mshlrdw "Multimedia logical right shift (word)"
         ()
         "mshlrd.w $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 13) rn rd (f-rsvd 0))
!        (slice-word-unop -mshlrdw))
  
  (dshmi msubl "Multimedia subtract (long word)"
         ()
         "msub.l $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 10) rn rd (f-rsvd 0))
!        (slice-long sub))
  
  (dshmi msubw "Multimedia add (word)"
         ()
         "msub.w $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 9) rn rd (f-rsvd 0))
!        (slice-word sub))
  
  (define-pmacro (-msubsl arg1 arg2) (saturate SI 32 (sub (ext DI arg1)
  							(ext DI arg2))))
--- 2027,2094 ----
  		 (set result1 (subword HI rn 3))
  		 (set result2 (subword HI rm 2))
  		 (set result3 (subword HI rn 2))
! 		 (set rd (-join-hi result3 result2 result1 result0)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (define-pmacro (-mshlldl arg) (sll arg (and rn 31)))
  (dshmi mshlldl "Multimedia logical left shift (long word)"
         ()
         "mshlld.l $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 2) rn rd (f-rsvd 0))
!        (slice-long-unop -mshlldl)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (define-pmacro (-mshlldw arg) (sll arg (and rn 15)))
  (dshmi mshlldw "Multimedia logical left shift (word)"
         ()
         "mshlld.w $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 1) rn rd (f-rsvd 0))
!        (slice-word-unop -mshlldw)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (define-pmacro (-mshlrdl arg) (srl arg (and rn 31)))
  (dshmi mshlrdl "Multimedia logical right shift (long word)"
         ()
         "mshlrd.l $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 14) rn rd (f-rsvd 0))
!        (slice-long-unop -mshlrdl)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (define-pmacro (-mshlrdw arg) (srl arg (and rn 15)))
  (dshmi mshlrdw "Multimedia logical right shift (word)"
         ()
         "mshlrd.w $rm, $rn, $rd"
         (+ (f-op 3) rm (f-ext 13) rn rd (f-rsvd 0))
!        (slice-word-unop -mshlrdw)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi msubl "Multimedia subtract (long word)"
         ()
         "msub.l $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 10) rn rd (f-rsvd 0))
!        (slice-long sub)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi msubw "Multimedia add (word)"
         ()
         "msub.w $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 9) rn rd (f-rsvd 0))
!        (slice-word sub)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (define-pmacro (-msubsl arg1 arg2) (saturate SI 32 (sub (ext DI arg1)
  							(ext DI arg2))))
***************
*** 1440,1446 ****
         ()
         "msubs.l $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 14) rn rd (f-rsvd 0))
!        (slice-long -msubsl))
  
  (define-pmacro (-msubsub arg1 arg2) (usaturate QI 8 (sub (zext DI arg1)
  							 (zext DI arg2))))
--- 2096,2106 ----
         ()
         "msubs.l $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 14) rn rd (f-rsvd 0))
!        (slice-long -msubsl)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-msubsub arg1 arg2) (usaturate QI 8 (sub (zext DI arg1)
  							 (zext DI arg2))))
***************
*** 1448,1454 ****
         ()
         "msubs.ub $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 12) rn rd (f-rsvd 0))
!        (slice-byte -msubsub))
  
  (define-pmacro (-msubsw arg1 arg2) (saturate HI 16 (sub (ext DI arg1)
  							(ext DI arg2))))
--- 2108,2118 ----
         ()
         "msubs.ub $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 12) rn rd (f-rsvd 0))
!        (slice-byte -msubsub)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (define-pmacro (-msubsw arg1 arg2) (saturate HI 16 (sub (ext DI arg1)
  							(ext DI arg2))))
***************
*** 1456,1673 ****
         ()
         "msubs.w $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 13) rn rd (f-rsvd 0))
!        (slice-byte -msubsw))
  
  (dshmi mulsl "Multiply signed long"
         ()
         "muls.l $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 14) rn rd (f-rsvd 0))
!        (set rd (mul (ext DI (subword SI rm 1)) (ext DI (subword SI rn 1)))))
  
  (dshmi mulul "Multiply unsigned long"
         ()
         "mulu.l $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 14) rn rd (f-rsvd 0))
!        (set rd (mul (zext DI (subword SI rm 1)) (zext DI (subword SI rn 1)))))
  
  (dshmi nop "No operation"
         ()
         "nop"
         (+ (f-op 27) (f-left 63) (f-ext 0) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (nop))
  
  (dshmi nsb "Number of consecutive sign bits"
         ()
         "nsb $rm, $rd"
         (+ (f-op 0) rm (f-ext 13) (f-right 63) rd (f-rsvd 0))
         ; Semantics requires a loop construct, so punt to C.
!        (set rd (c-call DI "sh64_nsb" rm)))
  
  (dshmi ocbi "Invalidate operand cache block"
         ()
         "ocbi $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 9) disp6x32 (f-dest 63) (f-rsvd 0))
!        (unimp "ocbi"))
  
  (dshmi ocbp "Purge operand cache block"
         ()
         "ocbp $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 8) disp6x32 (f-dest 63) (f-rsvd 0))
!        (unimp "ocbp"))
  
  (dshmi ocbwb "Write-back operand cache block"
         ()
         "ocbwb $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 12) disp6x32 (f-dest 63) (f-rsvd 0))
!        (unimp "ocbwb"))
  
  (dshmi or "OR"
         ()
         "or $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 9) rn rd (f-rsvd 0))
!        (set rd (or rm rn)))
  
  (dshmi ori "OR immediate"
         ()
         "ori $rm, $imm10, $rd"
         (+ (f-op 55) rm imm10 rd (f-rsvd 0))
!        (set rd (or rm (ext DI imm10))))
  
  (dshmi prefi "Prefetch instruction"
         ()
         "prefi $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 1) disp6x32 (f-right 63) (f-rsvd 0))
!        (unimp "prefi"))
  
  (dshmi pta "Prepare target register for SHmedia target"
         ()
         "pta$likely $disp16, $tra"
!        (+ (f-op 58) disp16 likely (f-8-2 0) tra (f-rsvd 0))
!        (set tra (add disp16 1)))
  
  (dshmi ptabs "Prepare target register with absolute value from register"
         ()
         "ptabs$likely $rn, $tra"
!        (+ (f-op 26) (f-left 63) (f-ext 1) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (set tra rn))
  
  (dshmi ptb "Prepare target register for SHcompact target"
         ()
         "ptb$likely $disp16, $tra"
!        (+ (f-op 59) disp16 likely (f-8-2 0) tra (f-rsvd 0))
!        (set tra disp16))
  
  (dshmi ptrel "Prepare target register with relative value from register"
         ()
         "ptrel$likely $rn, $tra"
!        (+ (f-op 26) (f-left 63) (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0))
!        (set tra (add pc rn)))
  
  (dshmi putcfg "Put configuration register"
         ()
         "putcfg $rm, $disp6, $rd"
         (+ (f-op 56) rm (f-ext 15) disp6 rd (f-rsvd 0))
!        (unimp "putcfg"))
  
  (dshmi putcon "Put control register"
         ()
         "putcon $rm, $crj"
         (+ (f-op 27) rm (f-ext 15) (f-right 63) crj (f-rsvd 0))
!        (set crj rm))
  
  (dshmi rte "Return from exception"
         ()
         "rte"
         (+ (f-op 27) (f-left 63) (f-ext 3) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (unimp "rte"))
  
  (dshmi shard "Arithmetic right shift"
         ()
         "shard $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 7) rn rd (f-rsvd 0))
!        (set rd (sra rm (and rn 63))))
  
  (dshmi shardl "Arithmetic right shift (long word)"
         ()
         "shard.l $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 6) rn rd (f-rsvd 0))
!        (set rd (ext DI (sra (subword SI rm 1) (and rn 63)))))
  
  (dshmi shari "Arithmetic right shift (immediate count)"
         ()
         "shari $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 7) uimm6 rd (f-rsvd 0))
!        (set rd (sra rm uimm6)))
  
  (dshmi sharil "Arithmetic right shift (long word, immediate count)"
         ()
         "shari.l $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 6) uimm6 rd (f-rsvd 0))
!        (set rd (ext DI (sra (subword SI rm 1) (and uimm6 63)))))
  
  (dshmi shlld "Logical left shift"
         ()
         "shlld $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 1) rn rd (f-rsvd 0))
!        (set rd (sll rm (and rn 63))))
  
  (dshmi shlldl "Logical left shift (long word)"
         ()
         "shlld.l $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 0) rn rd (f-rsvd 0))
!        (set rd (ext DI (sll (subword SI rm 1) (and rn 63)))))
  
  (dshmi shlli "Logical left shift (immediate count)"
         ()
         "shlli $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 1) uimm6 rd (f-rsvd 0))
!        (set rd (sll rm uimm6)))
  
  (dshmi shllil "Logical left shift (long word, immediate count)"
         ()
         "shlli.l $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 0) uimm6 rd (f-rsvd 0))
!        (set rd (ext DI (sll (subword SI rm 1) (and uimm6 63)))))
  
  (dshmi shlrd "Logical right shift"
         ()
         "shlrd $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set rd (srl rm (and rn 63))))
  
  (dshmi shlrdl "Logical right shift (long word)"
         ()
         "shlrd.l $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 2) rn rd (f-rsvd 0))
!        (set rd (ext DI (srl (subword SI rm 1) (and rn 63)))))
  
  (dshmi shlri "Logical right shift (immediate count)"
         ()
         "shlri $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 3) uimm6 rd (f-rsvd 0))
!        (set rd (srl rm uimm6)))
  
  (dshmi shlril "Logical right shift (long word, immediate count)"
         ()
         "shlri.l $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 2) uimm6 rd (f-rsvd 0))
!        (set rd (ext DI (srl (subword SI rm 1) (and uimm6 63)))))
  
  (dshmi shori "Shift-or immediate"
         ()
         "shori $uimm16, $rd"
         (+ (f-op 50) uimm16 rd (f-rsvd 0))
!        (set rd (or (sll rd 16) (zext DI uimm16))))
  
  (dshmi sleep "Sleep"
         ()
         "sleep"
         (+ (f-op 27) (f-left 63) (f-ext 7) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (unimp "sleep"))
  
  (dshmi stb "Store byte"
         ()
         "st.b $rm, $disp10, $rd"
         (+ (f-op 40) rm disp10 rd (f-rsvd 0))
!        (set (mem UQI (add rm (ext DI disp10))) (and QI rd #xff)))
  
  (dshmi stl "Store long word"
         ()
         "st.l $rm, $disp10x4, $rd"
         (+ (f-op 42) rm disp10x4 rd (f-rsvd 0))
!        (set (mem SI (add rm (ext DI disp10x4))) (and SI rd #xffffffff)))
  
  (dshmi stq "Store quad word"
         ()
         "st.q $rm, $disp10x8, $rd"
         (+ (f-op 43) rm disp10x8 rd (f-rsvd 0))
!        (set (mem DI (add rm (ext DI disp10x8))) rd))
  
  (dshmi stw "Store word"
         ()
         "st.w $rm, $disp10x2, $rd"
         (+ (f-op 41) rm disp10x2 rd (f-rsvd 0))
!        (set (mem HI (add rm (ext DI disp10x2))) (and HI rd #xffff)))
  
  (define-pmacro (-sthi-byte)
    (if (and bytecount 1)
--- 2120,2440 ----
         ()
         "msubs.w $rm, $rn, $rd"
         (+ (f-op 2) rm (f-ext 13) rn rd (f-rsvd 0))
!        (slice-byte -msubsw)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 2) (out loadreg rd)))))
  
  (dshmi mulsl "Multiply signed long"
         ()
         "muls.l $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 14) rn rd (f-rsvd 0))
!        (set rd (mul (ext DI (subword SI rm 1)) (ext DI (subword SI rn 1))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi mulul "Multiply unsigned long"
         ()
         "mulu.l $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 14) rn rd (f-rsvd 0))
!        (set rd (mul (zext DI (subword SI rm 1)) (zext DI (subword SI rn 1))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-set-gr (cycles 3) (out loadreg rd)))))
  
  (dshmi nop "No operation"
         ()
         "nop"
         (+ (f-op 27) (f-left 63) (f-ext 0) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (nop)
!        ())
  
  (dshmi nsb "Number of consecutive sign bits"
         ()
         "nsb $rm, $rd"
         (+ (f-op 0) rm (f-ext 13) (f-right 63) rd (f-rsvd 0))
         ; Semantics requires a loop construct, so punt to C.
!        (set rd (c-call DI "sh64_nsb" rm))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi ocbi "Invalidate operand cache block"
         ()
         "ocbi $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 9) disp6x32 (f-dest 63) (f-rsvd 0))
!        (sequence ()
! 		 (set rm rm) ; for now to allow profiling
! 		 (unimp "ocbi"))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi ocbp "Purge operand cache block"
         ()
         "ocbp $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 8) disp6x32 (f-dest 63) (f-rsvd 0))
!        (sequence ()
! 		 (set rm rm) ; for now to allow profiling
! 		 (unimp "ocbp"))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi ocbwb "Write-back operand cache block"
         ()
         "ocbwb $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 12) disp6x32 (f-dest 63) (f-rsvd 0))
!        (sequence ()
! 		 (set rm rm) ; for now to allow profiling
! 		 (unimp "ocbwb"))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi or "OR"
         ()
         "or $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 9) rn rd (f-rsvd 0))
!        (set rd (or rm rn))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi ori "OR immediate"
         ()
         "ori $rm, $imm10, $rd"
         (+ (f-op 55) rm imm10 rd (f-rsvd 0))
!        (set rd (or rm (ext DI imm10)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi prefi "Prefetch instruction"
         ()
         "prefi $rm, $disp6x32"
         (+ (f-op 56) rm (f-ext 1) disp6x32 (f-right 63) (f-rsvd 0))
!        (sequence ()
! 		 (set rm rm) ; for now to allow profiling
! 		 (unimp "prefi"))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi pta "Prepare target register for SHmedia target"
         ()
         "pta$likely $disp16, $tra"
!        (+ (f-op 58) disp16 likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-prediction (index-of tra) likely)
! 		 (set tra (add disp16 1)))
!        (sh5-media-models ((unit u-exec)
! 			  (unit u-pt (out targetreg tra)))))
  
  (dshmi ptabs "Prepare target register with absolute value from register"
         ()
         "ptabs$likely $rn, $tra"
!        (+ (f-op 26) (f-left 63) (f-ext 1) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-prediction (index-of tra) likely)
! 		 (set tra rn))
!        (sh5-media-models ((unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-pt (out targetreg tra)))))
  
  (dshmi ptb "Prepare target register for SHcompact target"
         ()
         "ptb$likely $disp16, $tra"
!        (+ (f-op 59) disp16 likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-prediction (index-of tra) likely)
! 		 (set tra disp16))
!        (sh5-media-models ((unit u-exec)
! 			  (unit u-pt (out targetreg tra)))))
  
  (dshmi ptrel "Prepare target register with relative value from register"
         ()
         "ptrel$likely $rn, $tra"
!        (+ (f-op 26) (f-left 63) (f-ext 5) rn likely (f-23-2 0) tra (f-rsvd 0))
!        (sequence ()
! 		 (save-branch-prediction (index-of tra) likely)
! 		 (set tra (add pc rn)))
!        (sh5-media-models ((unit u-use-gr (in usereg rn))
! 			  (unit u-exec)
! 			  (unit u-pt (out targetreg tra)))))
  
  (dshmi putcfg "Put configuration register"
         ()
         "putcfg $rm, $disp6, $rd"
         (+ (f-op 56) rm (f-ext 15) disp6 rd (f-rsvd 0))
!        (sequence ((SI address))
! 		 (set address (add rm disp6))
! 		 (save-cfg-address address)
! 		 (set (mem SI address) rd))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-putcfg))))
  
  (dshmi putcon "Put control register"
         ()
         "putcon $rm, $crj"
         (+ (f-op 27) rm (f-ext 15) (f-right 63) crj (f-rsvd 0))
!        (set crj rm)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec (cycles 5)))))
  
  (dshmi rte "Return from exception"
         ()
         "rte"
         (+ (f-op 27) (f-left 63) (f-ext 3) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (unimp "rte")
!        (sh5-media-models ((unit u-exec (cycles 8)))))
  
  (dshmi shard "Arithmetic right shift"
         ()
         "shard $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 7) rn rd (f-rsvd 0))
!        (set rd (sra rm (and rn 63)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi shardl "Arithmetic right shift (long word)"
         ()
         "shard.l $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 6) rn rd (f-rsvd 0))
!        (set rd (ext DI (sra (subword SI rm 1) (and rn 63))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi shari "Arithmetic right shift (immediate count)"
         ()
         "shari $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 7) uimm6 rd (f-rsvd 0))
!        (set rd (sra rm uimm6))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi sharil "Arithmetic right shift (long word, immediate count)"
         ()
         "shari.l $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 6) uimm6 rd (f-rsvd 0))
!        (set rd (ext DI (sra (subword SI rm 1) (and uimm6 63))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi shlld "Logical left shift"
         ()
         "shlld $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 1) rn rd (f-rsvd 0))
!        (set rd (sll rm (and rn 63)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi shlldl "Logical left shift (long word)"
         ()
         "shlld.l $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 0) rn rd (f-rsvd 0))
!        (set rd (ext DI (sll (subword SI rm 1) (and rn 63))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi shlli "Logical left shift (immediate count)"
         ()
         "shlli $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 1) uimm6 rd (f-rsvd 0))
!        (set rd (sll rm uimm6))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi shllil "Logical left shift (long word, immediate count)"
         ()
         "shlli.l $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 0) uimm6 rd (f-rsvd 0))
!        (set rd (ext DI (sll (subword SI rm 1) (and uimm6 63))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi shlrd "Logical right shift"
         ()
         "shlrd $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set rd (srl rm (and rn 63)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi shlrdl "Logical right shift (long word)"
         ()
         "shlrd.l $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 2) rn rd (f-rsvd 0))
!        (set rd (ext DI (srl (subword SI rm 1) (and rn 63))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi shlri "Logical right shift (immediate count)"
         ()
         "shlri $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 3) uimm6 rd (f-rsvd 0))
!        (set rd (srl rm uimm6))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi shlril "Logical right shift (long word, immediate count)"
         ()
         "shlri.l $rm, $uimm6, $rd"
         (+ (f-op 49) rm (f-ext 2) uimm6 rd (f-rsvd 0))
!        (set rd (ext DI (srl (subword SI rm 1) (and uimm6 63))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi shori "Shift-or immediate"
         ()
         "shori $uimm16, $rd"
         (+ (f-op 50) uimm16 rd (f-rsvd 0))
!        (set rd (or (sll rd 16) (zext DI uimm16)))
!        (sh5-media-models ((unit u-use-gr (in usereg rd))
! 			  (unit u-exec))))
  
  (dshmi sleep "Sleep"
         ()
         "sleep"
         (+ (f-op 27) (f-left 63) (f-ext 7) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (unimp "sleep")
!        ())
  
  (dshmi stb "Store byte"
         ()
         "st.b $rm, $disp10, $rd"
         (+ (f-op 40) rm disp10 rd (f-rsvd 0))
!        (set (mem UQI (add rm (ext DI disp10))) (and QI rd #xff))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi stl "Store long word"
         ()
         "st.l $rm, $disp10x4, $rd"
         (+ (f-op 42) rm disp10x4 rd (f-rsvd 0))
!        (set (mem SI (add rm (ext DI disp10x4))) (and SI rd #xffffffff))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi stq "Store quad word"
         ()
         "st.q $rm, $disp10x8, $rd"
         (+ (f-op 43) rm disp10x8 rd (f-rsvd 0))
!        (set (mem DI (add rm (ext DI disp10x8))) rd)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi stw "Store word"
         ()
         "st.w $rm, $disp10x2, $rd"
         (+ (f-op 41) rm disp10x2 rd (f-rsvd 0))
!        (set (mem HI (add rm (ext DI disp10x2))) (and HI rd #xffff))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (define-pmacro (-sthi-byte)
    (if (and bytecount 1)
***************
*** 1705,1711 ****
  			 (sequence ()
  				   (set val (srl rd (sub 32 (mul 8 bytecount))))
  				   (-sthi-word)
! 				   (-sthi-byte))))))
  
  (dshmi sthiq "Store high part (quad word)"
         ()
--- 2472,2480 ----
  			 (sequence ()
  				   (set val (srl rd (sub 32 (mul 8 bytecount))))
  				   (-sthi-word)
! 				   (-sthi-byte)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi sthiq "Store high part (quad word)"
         ()
***************
*** 1726,1732 ****
  				   (set val (srl rd (sub 64 (mul 8 bytecount))))
  				   (-sthi-long)
  				   (-sthi-word)
! 				   (-sthi-byte))))))
  
  (define-pmacro (-stlo-byte)
    (if (and bytecount 1)
--- 2495,2503 ----
  				   (set val (srl rd (sub 64 (mul 8 bytecount))))
  				   (-sthi-long)
  				   (-sthi-word)
! 				   (-sthi-byte)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (define-pmacro (-stlo-byte)
    (if (and bytecount 1)
***************
*** 1763,1769 ****
  			 (sequence ()
  				   (set val rd)
  				   (-stlo-byte)
! 				   (-stlo-word))))))
  
  (dshmi stloq "Store low part (quad word)"
         ()
--- 2534,2542 ----
  			 (sequence ()
  				   (set val rd)
  				   (-stlo-byte)
! 				   (-stlo-word)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi stloq "Store low part (quad word)"
         ()
***************
*** 1784,1826 ****
  				   (set val rd)
  				   (-stlo-byte)
  				   (-stlo-word)
! 				   (-stlo-long))))))
  
  (dshmi stxb "Store byte (extended displacement)"
         ()
         "stx.b $rm, $rn, $rd"
         (+ (f-op 24) rm (f-ext 0) rn rd (f-rsvd 0))
!        (set (mem UQI (add rm rn)) (subword QI rd 7)))
  
  (dshmi stxl "Store long (extended displacement)"
         ()
         "stx.l $rm, $rn, $rd"
         (+ (f-op 24) rm (f-ext 2) rn rd (f-rsvd 0))
!        (set (mem SI (add rm rn)) (subword SI rd 1)))
  
  (dshmi stxq "Store quad word (extended displacement)"
         ()
         "stx.q $rm, $rn, $rd"
         (+ (f-op 24) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set (mem DI (add rm rn)) rd))
  
  (dshmi stxw "Store word (extended displacement)"
         ()
         "stx.w $rm, $rn, $rd"
         (+ (f-op 24) rm (f-ext 1) rn rd (f-rsvd 0))
!        (set (mem HI (add rm rn)) (subword HI rd 3)))
  
  (dshmi sub "Subtract"
         ()
         "sub $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 11) rn rd (f-rsvd 0))
!        (set rd (sub rm rn)))
  
  (dshmi subl "Subtract long"
         ()
         "sub.l $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 10) rn rd (f-rsvd 0))
!        (set rd (ext DI (sub (subword SI rm 1) (subword SI rn 1)))))
  
  (dshmi swapq "Swap quad words"
         ()
--- 2557,2619 ----
  				   (set val rd)
  				   (-stlo-byte)
  				   (-stlo-word)
! 				   (-stlo-long)))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))
  
  (dshmi stxb "Store byte (extended displacement)"
         ()
         "stx.b $rm, $rn, $rd"
         (+ (f-op 24) rm (f-ext 0) rn rd (f-rsvd 0))
!        (set (mem UQI (add rm rn)) (subword QI rd 7))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi stxl "Store long (extended displacement)"
         ()
         "stx.l $rm, $rn, $rd"
         (+ (f-op 24) rm (f-ext 2) rn rd (f-rsvd 0))
!        (set (mem SI (add rm rn)) (subword SI rd 1))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi stxq "Store quad word (extended displacement)"
         ()
         "stx.q $rm, $rn, $rd"
         (+ (f-op 24) rm (f-ext 3) rn rd (f-rsvd 0))
!        (set (mem DI (add rm rn)) rd)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi stxw "Store word (extended displacement)"
         ()
         "stx.w $rm, $rn, $rd"
         (+ (f-op 24) rm (f-ext 1) rn rd (f-rsvd 0))
!        (set (mem HI (add rm rn)) (subword HI rd 3))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi sub "Subtract"
         ()
         "sub $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 11) rn rd (f-rsvd 0))
!        (set rd (sub rm rn))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi subl "Subtract long"
         ()
         "sub.l $rm, $rn, $rd"
         (+ (f-op 0) rm (f-ext 10) rn rd (f-rsvd 0))
!        (set rd (ext DI (sub (subword SI rm 1) (subword SI rn 1))))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi swapq "Swap quad words"
         ()
***************
*** 1830,1863 ****
  		 (set addr (add rm rn))
  		 (set temp (mem DI addr))
  		 (set (mem DI addr) rd)
! 		 (set rd temp)))
  
  (dshmi synci "Synchronise instruction fetch"
         ()
         "synci"
         (+ (f-op 27) (f-left 63) (f-ext 2) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (unimp "synci"))
  
  (dshmi synco "Synchronise data operations"
         ()
         "synco"
         (+ (f-op 27) (f-left 63) (f-ext 6) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (unimp "synco"))
  
  (dshmi trapa "Trap"
         ()
         "trapa $rm"
         (+ (f-op 27) rm (f-ext 1) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (c-call "sh64_trapa" rm pc))
  
  (dshmi xor "Exclusive OR"
         ()
         "xor $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 13) rn rd (f-rsvd 0))
!        (set rd (xor rm rn)))
  
  (dshmi xori "Exclusive OR immediate"
         ()
         "xori $rm, $imm6, $rd"
         (+ (f-op 49) rm (f-ext 13) rn rd (f-rsvd 0))
!        (set rd (xor rm (ext DI imm6))))
--- 2623,2668 ----
  		 (set addr (add rm rn))
  		 (set temp (mem DI addr))
  		 (set (mem DI addr) rd)
! 		 (set rd temp))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi synci "Synchronise instruction fetch"
         ()
         "synci"
         (+ (f-op 27) (f-left 63) (f-ext 2) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (unimp "synci")
!        ())
  
  (dshmi synco "Synchronise data operations"
         ()
         "synco"
         (+ (f-op 27) (f-left 63) (f-ext 6) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (unimp "synco")
!        ())
  
  (dshmi trapa "Trap"
         ()
         "trapa $rm"
         (+ (f-op 27) rm (f-ext 1) (f-right 63) (f-dest 63) (f-rsvd 0))
!        (c-call "sh64_trapa" rm pc)
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec (cycles 10)))))
  
  (dshmi xor "Exclusive OR"
         ()
         "xor $rm, $rn, $rd"
         (+ (f-op 1) rm (f-ext 13) rn rd (f-rsvd 0))
!        (set rd (xor rm rn))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-use-gr (in usereg rn))
! 			  (unit u-exec))))
  
  (dshmi xori "Exclusive OR immediate"
         ()
         "xori $rm, $imm6, $rd"
         (+ (f-op 49) rm (f-ext 13) rn rd (f-rsvd 0))
!        (set rd (xor rm (ext DI imm6)))
!        (sh5-media-models ((unit u-use-gr (in usereg rm))
! 			  (unit u-exec))))

[-- Attachment #4: sh-sid.cpu --]
[-- Type: text/plain, Size: 1345 bytes --]

; SuperH SHcompact instruction set description.  -*- Scheme -*-
; Copyright (C) 2006 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
\f
; Syntax for "delay" is different for SID vs SIM.
(define-pmacro (set-delay del targ src)
   (set (delay del targ) src)
)

; SID uses parallel insns to implement "delay",
(define-pmacro (isa-parallel-insns n)
  (parallel-insns n)
)

; Call save_delayed_pc for SID.
(define-pmacro (save-delayed-pc disp)
  (c-call VOID "save_delayed_pc" disp)
)

; Call save_branch_prediction for SID.
(define-pmacro (save-branch-prediction tra likely)
  (c-call "save_branch_prediction" tra likely)
)

; Call save_branch_optimization for SID.
(define-pmacro (save-branch-optimization likely)
  (c-call "save_branch_optimization" likely)
)

; Call sh64_save_cfg_address for SID.
(define-pmacro (save-cfg-address address)
  (c-call "sh64_save_cfg_address" address)
)

; For making profiling calls and dynamic configuration.
(define-pmacro (cg-profile caller callee)
  (c-call "cg_profile" caller callee)
)
(define-pmacro (cg-profile-delay caller callee delay)
  (c-call "cg_profile" caller callee delay)
)
(define-pmacro (notify-ret pr)
  (c-call VOID "notify_ret" pr)
)
; For dynamic configuration only.
(define-pmacro (cg-profile-jump caller callee)
  (c-call "cg_profile_jump" caller callee)
)

[-- Attachment #5: sh-sim.cpu --]
[-- Type: text/plain, Size: 961 bytes --]

; SuperH SHcompact instruction set description.  -*- Scheme -*-
; Copyright (C) 2006 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
\f
; Syntax for "delay" is different for SID vs SIM.
(define-pmacro (set-delay del targ src)
  (delay del (set targ src)))

; SIM does not use parallel insns to implement "delay".
(define-pmacro (isa-parallel-insns n)
  (parallel-insns 1)
)

; Not needed for the sim.
(define-pmacro (save-delayed-pc disp)
  (nop)
)

(define-pmacro (save-branch-prediction tra likely)
  (nop)
)

(define-pmacro (save-branch-optimization likely)
  (nop)
)

(define-pmacro (save-cfg-address address)
  (nop)
)

; For making profiling calls and dynamic configuration.
(define-pmacro (cg-profile caller callee)
  (nop)
)
(define-pmacro (cg-profile-delay caller callee delay)
  (nop)
)
(define-pmacro (notify-ret pr)
  (nop)
)
; For dynamic configuration only.
(define-pmacro (cg-profile-jump caller callee)
  (nop)
)


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2006-10-18 18:08 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2006-08-22 18:21 [patch][rfc] sh64: Add Pipeline Modelling and SID Support Dave Brolley
2006-08-22 18:34 ` Michael Snyder
2006-10-18 18:08 ` Dave Brolley

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