From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Frank Ch. Eigler" <fche@redhat.com>
To: sid@sources.redhat.com
Subject: configrun-sid patch: cache support
Date: Thu, 27 Sep 2001 14:29:00 -0000
Message-id: <20010927172944.Q21161@redhat.com>
X-SW-Source: 2001-q3/msg00061.html

Hi -

Taking advantage of Ben Elliston's generalized cache model
(see sid/component/cache), the configrun-sid script now presents
options to insert data and/or instruction caches into the CPU's
bus path to memory.  It makes it easy to experiment with
hypothetical cache configurations.

For a toy program, here's some teaser output:

% arm-elf-sid --icache=direct/8kb/16 --dcache=4way/64kb/32/random hello-arm.x
hello world
icache profile report
reads:        1343
read hits:    69%
writes:       0
write hits:   0%
replacements: 409
flushes:      0
dcache profile report
reads:        762
read hits:    88%
writes:       1005
write hits:   52%
replacements: 90
flushes:      0


- FChE
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