[patch] xstormy16 psw semantics

[DJ Delorie <dj@redhat.com>]

Sanyo noted that the PSW wasn't getting set right.  It is always set
after the move operation.  Plus, the alignfix macro was basing its
alignment logic on the contents of memory, not the address.  The
alignment logic isn't weird, it just ignores the LSB, so I took the
macro out and hard-coded the mask as needed.  Ok?

Also, I'm still waiting for approval for my previous patches:
http://sources.redhat.com/ml/sid/2003-q1/msg00012.html
http://sources.redhat.com/ml/sid/2003-q1/msg00011.html

[cgen]

	* xstormy16.cpu (set-mem-alignfix-psw): Remove.
	(movlmemimm): Just mask the address.
	(movhmemimm): Likewise.
	(movlmemgr): Likewise.
	(movhmemgr): Likewise.
	(set-psw): Always set the psw last.
	(set-psw-carry): Likewise.
	(set-psw-add): Likewise.
	(set-psw-sub): Likewise.
	
[sid]

	* xstormy16-sem.cxx: Regenerate.
	
  
Index: cgen/cpu/xstormy16.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/xstormy16.cpu,v
retrieving revision 1.5
diff -p -2 -r1.5  cgen/cpu/xstormy16.cpu
*** cgen/cpu/xstormy16.cpu	17 Dec 2002 03:54:41 -0000	1.5
--- cgen/cpu/xstormy16.cpu	13 Feb 2003 20:05:00 -0000
***************
*** 392,399 ****
    (sequence ((HI nvalue))
      (set nvalue value)
      (set psw (or (and psw #x0F9C)
  		 (or (sll index 12)
! 		     (basic-psw nvalue))))
!     (set (reg HI h-gr index) nvalue)))
  
  ; Update the PSW for destination register Rd.
--- 392,399 ----
    (sequence ((HI nvalue))
      (set nvalue value)
+     (set (reg HI h-gr index) nvalue)
      (set psw (or (and psw #x0F9C)
  		 (or (sll index 12)
! 		     (basic-psw nvalue))))))
  
  ; Update the PSW for destination register Rd.
***************
*** 413,440 ****
      (set dest nvalue)))
  
- ; Update the PSW for destination non-register dest, set dest to value,
- ; ensuring to write the correct (weird) alignment.
- (define-pmacro (set-mem-alignfix-psw dest value)
-   (sequence ((HI nvalue) (SI ndest))
-     (set nvalue value)
-     (set ndest dest)
-     (set psw (or (and psw #xFF9C)
- 		 (basic-psw nvalue)))
-     (if (and ndest 1)
-       (sequence ()
- 	(set ndest (sub ndest 1))
- 	(set nvalue (or (and (sll nvalue 8) #xFF00)
- 			(and (srl nvalue 8) #xFF)))))
-     (set dest nvalue)))
- 
  ; Update the PSW as with set-psw, but also set the carry flag.
  (define-pmacro (set-psw-carry Rd index value carry)
    (sequence ((HI nvalue))
      (set nvalue value)
      (set psw (or (or (and psw #x0F98)
  		     (sll carry 2))
  		 (or (sll index 12)
! 		     (basic-psw nvalue))))
!     (set (reg HI h-gr index) nvalue)))
  
  ; The all-purpose addition operation.
--- 413,425 ----
      (set dest nvalue)))
  
  ; Update the PSW as with set-psw, but also set the carry flag.
  (define-pmacro (set-psw-carry Rd index value carry)
    (sequence ((HI nvalue))
      (set nvalue value)
+     (set (reg HI h-gr index) nvalue)
      (set psw (or (or (and psw #x0F98)
  		     (sll carry 2))
  		 (or (sll index 12)
! 		     (basic-psw nvalue))))))
  
  ; The all-purpose addition operation.
***************
*** 442,445 ****
--- 427,431 ----
    (sequence ((HI value))
      (set value (addc a b c))
+     (set (reg HI h-gr index) value)
      (set psw (or (or (and psw #x0F80)
  		     (basic-psw value))
***************
*** 448,453 ****
  		     (or (and (srl HI (addc HI (and a #xF) (and b #xF) c) 
  				   1) #x8)
! 			 (sll index 12)))))
!     (set (reg HI h-gr index) value)))
  
  ; Set the PSW for a subtraction of a-b into Rd, but don't actually
--- 434,438 ----
  		     (or (and (srl HI (addc HI (and a #xF) (and b #xF) c) 
  				   1) #x8)
! 			 (sll index 12)))))))
  
  ; Set the PSW for a subtraction of a-b into Rd, but don't actually
***************
*** 470,473 ****
--- 455,459 ----
    (sequence ((HI value))
      (set value (subc a b c))
+     (set (reg HI h-gr index) value)
      (set psw (or (or (and psw #x0F80)
  		     (basic-psw value))
***************
*** 476,481 ****
  		     (or (and (srl HI (subc HI (and a #xF) (and b #xF) c)
  				   1) #x8)
! 			 (sll index 12)))))
!     (set (reg HI h-gr index) value)))
  
  ; A 17-bit rotate-left operation
--- 462,466 ----
  		     (or (and (srl HI (subc HI (and a #xF) (and b #xF) c)
  				   1) #x8)
! 			 (sll index 12)))))))
  
  ; A 17-bit rotate-left operation
***************
*** 517,521 ****
       (+ OP1_7 OP2A_8 ws2 lmem8 imm16)
       (if ws2
! 	 (set-mem-alignfix-psw (mem HI lmem8) imm16)
  	 (set-mem-psw (mem QI lmem8) (and imm16 #xFF)))
       ()
--- 502,506 ----
       (+ OP1_7 OP2A_8 ws2 lmem8 imm16)
       (if ws2
! 	 (set-mem-psw (mem HI (and lmem8 #xFFFE)) imm16)
  	 (set-mem-psw (mem QI lmem8) (and imm16 #xFF)))
       ()
***************
*** 527,531 ****
       (+ OP1_7 OP2A_A ws2 hmem8 imm16)
       (if ws2
! 	 (set-mem-alignfix-psw (mem HI hmem8) imm16)
  	 (set-mem-psw (mem QI hmem8) (and imm16 #xFF)))
       ()
--- 512,516 ----
       (+ OP1_7 OP2A_A ws2 hmem8 imm16)
       (if ws2
! 	 (set-mem-psw (mem HI (and hmem8 #xFFFE)) imm16)
  	 (set-mem-psw (mem QI hmem8) (and imm16 #xFF)))
       ()
***************
*** 559,563 ****
       (+ OP1_9 Rm ws2 lmem8)
       (if ws2 
! 	 (set-mem-alignfix-psw (mem HI lmem8) Rm)
  	 (set-mem-psw (mem QI lmem8) Rm))
       ()
--- 544,548 ----
       (+ OP1_9 Rm ws2 lmem8)
       (if ws2 
! 	 (set-mem-psw (mem HI (and lmem8 #xFFFE)) Rm)
  	 (set-mem-psw (mem QI lmem8) Rm))
       ()
***************
*** 569,573 ****
       (+ OP1_B Rm ws2 hmem8)
       (if ws2 
! 	 (set-mem-alignfix-psw (mem HI lmem8) Rm)
  	 (set-mem-psw (mem QI lmem8) Rm))
       ()
--- 554,558 ----
       (+ OP1_B Rm ws2 hmem8)
       (if ws2 
! 	 (set-mem-psw (mem HI (and lmem8 #xFFFE)) Rm)
  	 (set-mem-psw (mem QI lmem8) Rm))
       ()