From: Partha Palit <chessrook2001@yahoo.com>
To: Robert Cragie <rcc@jennic.com>, Andrew Lunn <andrew.lunn@ascom.ch>
Cc: ECOS <ecos-discuss@sources.redhat.com>, SID <sid@sources.redhat.com>
Subject: RE: [ECOS] generating interrupts in ARM-PID (SID simulator)
Date: Tue, 01 Jul 2003 20:50:00 -0000 [thread overview]
Message-ID: <20030701205014.61802.qmail@web12908.mail.yahoo.com> (raw)
In-Reply-To: <NMEDLDELHPEFHOMFIJBHEELPCMAA.rcc@jennic.com>
Hello,
I am back again with questions on generating
interrupt.
As recommened by Robert, I tried using the interrupt
11.It seemed to work, but it showed up as spurious
interrupt which is not handled by the ARM Hal. I guess
this is becuase ARM recognizes level triggered
interrupts as pointed out by Robert.
-->Q: Could anyone kindly tell how to generate pulses
of definite time period using sid-sched? I guess a
timer can be used, but in the SID configuration file I
see that the timers have inputs from the cpu itself.
Is there anything simpler?
Also I had to manually generate the interrupt in the
SID tksm GUI. Otherwise it was not working.
-->Q: What am I doing wrong ? Can the duration of the
pulse be controlled in the GUI? Presently, I am just
changing the value in the sched-event field..and I get
a spurious interrupt.
Thanks a lot.
-Partha
--- Robert Cragie <rcc@jennic.com> wrote:
> > > I am trying to generate external interrupts and
> handle
> > > it on a ARM-PID configuration. I am using SID as
> the
> > > simulator for ARM PID.Ofcourse, eCos is my RTOS.
> > >
> > > >From the SID configuration file, I understand
> that
> > > there is a interrupt controller which can be
> > > associated with 32 interrupts.One of the output
> pins
> > > of the interrupt controler is connected to the
> "nirq"
> > > pin of the processor.
> > > I use one the the interrutpt sources numbered
> "16" to
> > > associate with an event whose occurance I want
> to
> > > count.
>
> Only interrupts up to 15 can be handled by the
> interrupt controller (well,
> according to the PID manual anyway). Try connecting
> to interrupt number 11.
> This corresponds to the ASB0 interrupt, which seems
> to be unconnected in
> SID.
>
> So in configrun-sid:
>
> connect-pin sensor-sched 1-event -> intrctrl
> source-11
>
> However, note that the inputs to the ARM interrupt
> controller are level
> interrupts. If the scheduler generates a pulse, it
> could either get missed
> (short pulse) or cause continuous interruption
> problems (long pulse). So
> ideally in either case you'd want to latch the
> rising edge of the scheduler
> output and have some mechanism to clear the it in
> the DSR somehow. I'm not
> sure how you'd do this is SID, though.
>
> > > Now, the problem is that I am unable to catch
> the
> > > interrupt and process it using an ISR.
> Specifically, I
> > > register my own ISR at the the vector 16.
> However, it
> > > seems that I am unable to catch the interrupt.
> > >
> > > Could anyone kindly advise where I am making the
> > > mistake? Also, I m unable to figure out that if
> and
> > > how eCos can be configured to use the 32
> interrupts.
> > > Afterall, there is only one nirq line. How are
> the 32
> > > interrupts mapped? When, I check the hal_intr.h
> file,
> > > I find that at max there can be 8 interrupts.
>
> Try something like the following to add a handler
> for interrupt number 11
> (ASB0):
>
> #include <cyg/kernel/kapi.h>
> #include <cyg/hal/hal_intr.h>
>
> /* IRQ handler object */
>
> typedef struct tagIRQ_s
> {
> CYG_WORD tNum;
> cyg_interrupt sIRQrsrc;
> cyg_handle_t hIRQ;
> } IRQ_s;
>
> static IRQ_s s_sMyIRQ;
>
> /* snip */
>
> cyg_uint32 myISR(cyg_vector_t tVector,
> cyg_addrword_t tData)
> {
> /* Nothing to do in ISR apart from the mandatory
> procedures */
>
> /* Stop any further interrupts until handled */
> cyg_interrupt_mask(tVector);
>
> /* Acknowledge to system (this MUST be done) */
> cyg_interrupt_acknowledge(tVector);
>
> /* Cause DSR to be run */
> return CYG_ISR_CALL_DSR;
> }
>
> cyg_uint32 myDSR(cyg_vector_t tVector, cyg_ucount32
> u32Count, cyg_addrword_t
> tData)
> {
> /* DO YOUR INTERRUPT PROCESSING HERE */
>
> /* Finally reenable interrupts */
> cyg_interrupt_unmask(tVector);
> }
>
> /* snip - somewhere in your initialisation .... */
>
> s_sMyIRQ.tNum = CYGNUM_HAL_INTERRUPT_ASB0; /* 11
> */
>
> /* First, create and attach the Interrupt
> handlers */
> cyg_interrupt_create(s_sMyIRQ.tNum,
> /* Interrupt number
> */
> 99,
> /* Priority - what
> goes here? */
> (cyg_addrword_t)&s_sMyIRQ,
> /* Data item passed
> to interrupt handler - whatever you want */
> myISR,
> /* ISR */
> myDSR,
> /* DSR */
> &s_sMyIRQ.hIRQ,
> /* (ptr. to)
> Handle - filled in */
> &s_sMyIRQ.sIRQrsrc);
> /* (ptr. to)
> Resource reqd. by interrupt */
>
> cyg_interrupt_attach(s_sMyIRQ.hIRQ);
>
> /* Finally, enable the interrupt */
> cyg_interrupt_unmask(s_sMyIRQ.tNum);
>
> -----------------------
> Hope this helps
>
> Robert Cragie, Design Engineer
>
_______________________________________________________________
> Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
> http://www.jennic.com Tel: +44 (0) 114 281 2655
>
_______________________________________________________________
>
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next prev parent reply other threads:[~2003-07-01 20:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20030627094625.GN341@biferten.ma.tech.ascom.ch>
2003-06-27 13:40 ` Robert Cragie
2003-07-01 20:50 ` Partha Palit [this message]
2003-07-01 23:53 ` Frank Ch. Eigler
2003-07-02 10:10 ` Robert Cragie
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