-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Forgot the attachment. (as usual) On Friday 02 July 2004 02:37 pm, Robert Shideleff wrote: > This patch makes arm interrupts level sensitive, as they are in hardware. > The nirq and nfiq pins are no longer callbacks, but rather simple input > pins. They are 'pulled' to high at processor invocation and reset. Their > level is 'sense()-ed' at the beginning of each step. > > The patch file was taken from within the sid/component/cgen-cpu/arm7t > directory. > > This is necessary for proper operation of eCos, and for the ability to > model interrupts as they occur in actual hardware. > > Bob -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.2.4 (GNU/Linux) iD8DBQFA5avL8XjOGQDr37YRAjdcAKCBC6DmWAQ3ImhwCbFvc+Aj/vPAdgCfe19r TTOx2egnP+V7AyeCGB90/U0= =SlWB -----END PGP SIGNATURE-----