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From: DJ Delorie <dj@redhat.com>
To: binutils@sourceware.org, cgen@sourceware.org, sid@sourceware.org
Subject: [patch] mep ivc2 register names fix
Date: Wed, 27 May 2009 01:54:00 -0000	[thread overview]
Message-ID: <200905270153.n4R1rpVM011362@greed.delorie.com> (raw)


Minor tweaks to register names and fields.  Committed.

[cgen/cpu]

	* cpu/mep-ivc2.cpu (h-ccr-ivc2): Enable for C3 slots, fix
	accumulator names.
	(f-ivc2-ccrn-c3hi): New.
	(f-ivc2-ccrn-c3lo): New.
	(f-ivc2-ccrn-c3): New.
	(ivc2c3ccrn): Use it.

[sid/component/cgen-cpu/mep]

	* mep-cop1-32-decode.cxx: Regenerate.
	* mep-cop1-32-decode.h: Regenerate.
	* mep-cop1-32-sem.cxx: Regenerate.
	* mep-cop1-48-sem.cxx: Regenerate.

[opcodes]

	* mep-asm.c: Regenerate.
	* mep-desc.c: Regenerate.
	* mep-desc.h: Regenerate.
	* mep-dis.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.

Index: cgen/cpu/mep-ivc2.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/mep-ivc2.cpu,v
retrieving revision 1.2
diff -p -U3 -r1.2  cgen/cpu/mep-ivc2.cpu
--- cgen/cpu/mep-ivc2.cpu	22 May 2009 17:37:43 -0000	1.2
+++ cgen/cpu/mep-ivc2.cpu	27 May 2009 00:48:18 -0000
@@ -55,7 +55,7 @@
 (define-hardware
   (name h-ccr-ivc2)
   (comment "Coprocessor control registers for ivc2 coprocessor")
-  (attrs VIRTUAL all-mep-core-isas)
+  (attrs VIRTUAL all-mep-isas)
   (type register DI (64))
   (set (index newval) (c-call VOID "h_ccr_set" index newval))
   (get (index) (c-call DI "h_ccr_get" index))
@@ -71,23 +71,23 @@
 
 	 ($csar1 15)
 
-	 ($acc00 16)
-	 ($acc01 17)
-	 ($acc02 18)
-	 ($acc03 19)
-	 ($acc04 20)
-	 ($acc05 21)
-	 ($acc06 22)
-	 ($acc07 23)
-
-	 ($acc10 24)
-	 ($acc11 25)
-	 ($acc12 26)
-	 ($acc13 27)
-	 ($acc14 28)
-	 ($acc15 29)
-	 ($acc16 30)
-	 ($acc17 31)
+	 ($acc0_0 16)
+	 ($acc0_1 17)
+	 ($acc0_2 18)
+	 ($acc0_3 19)
+	 ($acc0_4 20)
+	 ($acc0_5 21)
+	 ($acc0_6 22)
+	 ($acc0_7 23)
+
+	 ($acc1_0 24)
+	 ($acc1_1 25)
+	 ($acc1_2 26)
+	 ($acc1_3 27)
+	 ($acc1_4 28)
+	 ($acc1_5 29)
+	 ($acc1_6 30)
+	 ($acc1_7 31)
 	 (.unsplice (.map -ccr-reg-pair (.iota 32)))
         )
   )
@@ -217,6 +217,8 @@
 (dnop simm16p0 "sImm16p0" (all-mep-isas) h-sint f-ivc2-simm16p0)
 
 
+(df f-ivc2-ccrn-c3hi "ccrn hi  2u28" (all-mep-isas) 28 2 UINT #f #f)
+(df f-ivc2-ccrn-c3lo "ccrn lo  4u4"  (all-mep-isas)  4 4 UINT #f #f)
 
 (df f-ivc2-crn     "ivc2 crn"      (all-mep-isas)  0 4 UINT #f #f)
 (df f-ivc2-crm     "ivc2 crm"      (all-mep-isas)  4 4 UINT #f #f)
@@ -228,6 +230,20 @@
 (df f-ivc2-cmov3   "ivc2 cmov op2" (all-mep-isas) 28 4 UINT #f #f)
 
 (define-multi-ifield
+  (name f-ivc2-ccrn-c3)
+  (comment "Coprocessor register number field")
+  (attrs all-mep-isas)
+  (mode UINT)
+  (subfields f-ivc2-ccrn-c3hi f-ivc2-ccrn-c3lo)
+  (insert (sequence ()
+		    (set (ifield f-ivc2-ccrn-c3hi)  (and (srl (ifield f-ivc2-ccrn-c3) 4) #x3))
+		    (set (ifield f-ivc2-ccrn-c3lo)  (and (ifield f-ivc2-ccrn-c3) #xf))))
+  (extract (set (ifield f-ivc2-ccrn-c3)
+		(or (sll (ifield f-ivc2-ccrn-c3hi) 4)
+		    (ifield f-ivc2-ccrn-c3lo))))
+  )
+
+(define-multi-ifield
   (name f-ivc2-ccrn)
   (comment "Coprocessor control register number field")
   (attrs all-mep-isas)
@@ -258,7 +274,7 @@
 (dnop ivc2rm   "reg Rm"                  (all-mep-isas (CDATA REGNUM)) h-gpr  f-ivc2-crm)
 (dnop ivc2crn  "copro Rn (0-31, 64-bit"  (all-mep-isas (CDATA REGNUM)) h-cr64 f-ivc2-crnx)
 (dnop ivc2ccrn "copro control reg CCRn"  (all-mep-isas (CDATA REGNUM)) h-ccr-ivc2  f-ivc2-ccrn)
-(dnop ivc2c3ccrn "copro control reg CCRn"  (all-mep-isas (CDATA REGNUM)) h-ccr-ivc2  f-ccrn)
+(dnop ivc2c3ccrn "copro control reg CCRn"  (all-mep-isas (CDATA REGNUM)) h-ccr-ivc2  f-ivc2-ccrn-c3)
 
 ; [--][--] [--][--] [--][--] [--]
 ; 0----+-- --1----+ ----2--- -+--

                 reply	other threads:[~2009-05-27  1:54 UTC|newest]

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