* sid-20110801 Patch to fix cache lru updating during expell
@ 2011-10-16 7:58 John Wehle
2011-10-27 4:16 ` John Wehle
0 siblings, 1 reply; 2+ messages in thread
From: John Wehle @ 2011-10-16 7:58 UTC (permalink / raw)
To: sid
Currently when the SID cache lru component replaces a line it just sets
the age of that line to zero without updating the age of any of the other
lines. This means that if there are a series of cache misses, then there
will be a series of new lines having the same age preventing the lru policy
from being able to work correctly.
The enclosed patch has been tested on FreeBSD with sid configured for
tomi Borealis (a processor under development by Venray Technology).
ChangeLog:
Sun Oct 16 00:39:23 EDT 2011 John Wehle (john@feith.com)
* component/cache/cache.cxx (cache_replacement_lru::expell):
Update the age of all the lines.
-- John
------------------------8<------------------------------8<---------------
--- component/cache/cache.cxx.ORIGINAL 2009-04-08 16:39:34.000000000 -0400
+++ component/cache/cache.cxx 2011-10-13 00:22:20.000000000 -0400
@@ -1052,7 +1050,15 @@ cache_replacement_lru::expell (cache_set
if (index < 0)
return 0;
- lru[index] = 0;
+ // update state by hand since the tag may not be set properly
+ for (unsigned i = 0; i < cset.num_lines (); i++)
+ {
+ if (i == index)
+ lru[i] = 0;
+ else
+ lru[i]++;
+ }
+
return &cset.get_line (index);
}
-------------------------------------------------------------------------
^ permalink raw reply [flat|nested] 2+ messages in thread
* sid-20110801 Patch to fix cache lru updating during expell
2011-10-16 7:58 sid-20110801 Patch to fix cache lru updating during expell John Wehle
@ 2011-10-27 4:16 ` John Wehle
0 siblings, 0 replies; 2+ messages in thread
From: John Wehle @ 2011-10-27 4:16 UTC (permalink / raw)
To: sid
Currently when the SID cache lru component replaces a line it just sets
the age of that line to zero without updating the age of any of the other
lines. This means that if there are a series of cache misses, then there
will be a series of new lines having the same age preventing the lru policy
from being able to work correctly.
The enclosed patch has been tested on FreeBSD with sid configured for
tomi Borealis (a processor under development by Venray Technology).
ChangeLog:
Sun Oct 16 00:39:23 EDT 2011 John Wehle (john@feith.com)
* component/cache/cache.cxx (cache_replacement_lru::expell):
Update the age of all the lines.
-- John
------------------------8<------------------------------8<---------------
--- component/cache/cache.cxx.ORIGINAL 2009-04-08 16:39:34.000000000 -0400
+++ component/cache/cache.cxx 2011-10-13 00:22:20.000000000 -0400
@@ -1052,7 +1050,15 @@ cache_replacement_lru::expell (cache_set
if (index < 0)
return 0;
- lru[index] = 0;
+ // update state by hand since the tag may not be set properly
+ for (unsigned i = 0; i < cset.num_lines (); i++)
+ {
+ if (i == index)
+ lru[i] = 0;
+ else
+ lru[i]++;
+ }
+
return &cset.get_line (index);
}
-------------------------------------------------------------------------
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