Index: sid/component/memory/generic.cxx
===================================================================
RCS file: /cvs/src/src/sid/component/memory/generic.cxx,v
retrieving revision 1.8
diff -c -p -r1.8 generic.cxx
*** sid/component/memory/generic.cxx	10 Jun 2003 18:27:10 -0000	1.8
--- sid/component/memory/generic.cxx	21 Oct 2003 19:16:36 -0000
***************
*** 1,6 ****
  // generic.cxx - a class of generic memories.  -*- C++ -*-
  
! // Copyright (C) 1999-2001,2003 Red Hat.
  // This file is part of SID and is licensed under the GPL.
  // See the file COPYING.SID for conditions for redistribution.
  
--- 1,6 ----
  // generic.cxx - a class of generic memories.  -*- C++ -*-
  
! // Copyright (C) 1999-2003 Red Hat.
  // This file is part of SID and is licensed under the GPL.
  // See the file COPYING.SID for conditions for redistribution.
  
*************** generic_memory::generic_memory() throw (
*** 55,61 ****
    imagemmap_pin (this, & generic_memory::imagemmap_handler),
    imagemsync_pin (this, & generic_memory::imagemsync_handler),
    read_latency (0),
!   write_latency (0)
  {
    this->max_buffer_length = 32UL * 1024UL * 1024UL;
    this->buffer = 0;
--- 55,64 ----
    imagemmap_pin (this, & generic_memory::imagemmap_handler),
    imagemsync_pin (this, & generic_memory::imagemsync_handler),
    read_latency (0),
!   write_latency (0),
!   base_address (0),
!   warn_rom_write (false),
!   allow_rom_write (false)
  {
    this->max_buffer_length = 32UL * 1024UL * 1024UL;
    this->buffer = 0;
*************** generic_memory::generic_memory() throw (
*** 82,87 ****
--- 85,98 ----
  
    add_attribute ("read-latency", & this->read_latency, "setting");
    add_attribute ("write-latency", & this->write_latency, "setting");
+   add_attribute ("base-address", & this->base_address, "setting");
+ 
+   add_attribute ("warn-rom-write-option?", & this->warn_rom_write, "setting");
+   add_attribute ("allow-rom-write-option?", & this->allow_rom_write, "setting");
+ 
+   // Undocumented, dangerous, do not use ...
+   add_attribute_ro ("buffer-base-UNSAFE", (host_int_4*) & this->buffer);
+   add_attribute_ro ("buffer-length-UNSAFE", & this->buffer_length);
  
    add_attribute_virtual ("state-snapshot", this,
  			 & generic_memory::save_state,
Index: sid/component/memory/generic.h
===================================================================
RCS file: /cvs/src/src/sid/component/memory/generic.h,v
retrieving revision 1.5
diff -c -p -r1.5 generic.h
*** sid/component/memory/generic.h	3 Aug 2001 06:02:46 -0000	1.5
--- sid/component/memory/generic.h	21 Oct 2003 19:16:36 -0000
*************** private:
*** 100,105 ****
--- 100,108 ----
  
    host_int_2 read_latency;
    host_int_2 write_latency;
+   host_int_4 base_address;
+   bool warn_rom_write;
+   bool allow_rom_write;
  
    string image_file_name;
    callback_pin<generic_memory> imageload_pin;
*************** public:
*** 125,131 ****
    // some macros to make manufacturing of the cartesian-product calls simpler
  #define SID_GB_WRITE(type2) \
        bus::status write(host_int_4 address, type2 data) throw () \
! 	  { return bus::unpermitted; } 
   
  #define SID_GB_READ(type2) \
        bus::status read(host_int_4 address, type2& data) throw () \
--- 128,141 ----
    // some macros to make manufacturing of the cartesian-product calls simpler
  #define SID_GB_WRITE(type2) \
        bus::status write(host_int_4 address, type2 data) throw () \
! 	  { if (! target->warn_rom_write && ! target->allow_rom_write) \
! 	       return bus::unpermitted;			\
! 	    cerr << "Warning: invalid write to ROM address 0x" << std::hex << target->base_address + address << endl; \
! 	    if (target->allow_rom_write)		\
! 	        return this->write_any(address,data);	\
! 	    else					\
! 		return bus::ok; }
! 
   
  #define SID_GB_READ(type2) \
        bus::status read(host_int_4 address, type2& data) throw () \
*************** protected:
*** 160,165 ****
--- 170,179 ----
    template <typename DataType>
    inline bus::status
    read_any(host_int_4 address, DataType& data);
+ 
+   template <typename DataType>
+   inline bus::status
+   write_any(host_int_4 address, DataType data);
  };
  
  
*************** public:
*** 190,200 ****
      SID_GB_WRITE(big_int_8);
        
  #undef SID_GB_WRITE
- 
- protected:
-   template <typename DataType>
-   inline bus::status
-   write_any(host_int_4 address, DataType data);
  };
  
  
--- 204,209 ----
*************** protected:
*** 203,209 ****
  
  template <typename DataType>
  inline bus::status
! generic_read_write_bus::write_any(host_int_4 address, DataType data)
  {
    const unsigned width = sizeof(typename DataType::value_type); 
  
--- 212,218 ----
  
  template <typename DataType>
  inline bus::status
! generic_read_only_bus::write_any(host_int_4 address, DataType data)
  {
    const unsigned width = sizeof(typename DataType::value_type);