From: Peter Gavin <pgavin@gmail.com>
To: "Frank Ch. Eigler" <fche@redhat.com>
Cc: cgen@sourceware.org, sid@sourceware.org
Subject: Re: cgen, GNU gdb/sim, and full system simulation
Date: Fri, 18 May 2012 12:46:00 -0000 [thread overview]
Message-ID: <CAKEMJMp8RP3xhvptyWQn4yqbTaXXOD7e4oSB2c4bg__ARrjtEg@mail.gmail.com> (raw)
In-Reply-To: <20120516163407.GC32524@redhat.com>
Hi Frank, thanks for the response.
> On Fri, May 11, 2012 at 01:57:11PM +0200, Peter Gavin wrote:
> Indeed. For full-system simulators, some projects have used the sid
> framework instead of gdb/sim.
Ok. But we're primarily doing this for GDB, and I suppose gdb can't
use sid, is that right?
> Actually, instruction fetching code can be hand-written in either
> gdb-sim (see e.g. sim/m32r/mloop.in extract-*) or sid frameworks
> (sid/component/cgen-cpu/m32r/m32rbf.cxx step_insns), and so that code
> can map all it likes.
Hmm, I'll look into this.
> To me, the more interesting question would be the choice to model
> virtual memory as a separate component between the CPU and the memory
> and I/O buses (which would suite sid's modeling very well), vs
> something purely internal to the CPU model.
Yeah, I was hoping I could just define a memory in the .cpu file with
define-hardware and have custom get and set methods, but it looks like
that won't work :)
-Pete
next prev parent reply other threads:[~2012-05-18 12:46 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CAKEMJMqCY3DrU++LRZQMRCFwxndp0EK+4n-ufHMTz7OUGG7aiQ@mail.gmail.com>
2012-05-16 17:07 ` Frank Ch. Eigler
2012-05-18 12:46 ` Peter Gavin [this message]
2012-05-18 12:52 ` Frank Ch. Eigler
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