From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23934 invoked by alias); 18 May 2012 12:46:33 -0000 Received: (qmail 23916 invoked by uid 22791); 18 May 2012 12:46:31 -0000 X-SWARE-Spam-Status: No, hits=-5.3 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,KHOP_RCVD_TRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE X-Spam-Check-By: sourceware.org Received: from mail-vb0-f41.google.com (HELO mail-vb0-f41.google.com) (209.85.212.41) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 18 May 2012 12:46:19 +0000 Received: by vbbey12 with SMTP id ey12so3237181vbb.0 for ; Fri, 18 May 2012 05:46:18 -0700 (PDT) MIME-Version: 1.0 Received: by 10.220.166.199 with SMTP id n7mr6776602vcy.47.1337345177869; Fri, 18 May 2012 05:46:17 -0700 (PDT) Received: by 10.220.190.135 with HTTP; Fri, 18 May 2012 05:46:17 -0700 (PDT) In-Reply-To: <20120516163407.GC32524@redhat.com> References: <20120516163407.GC32524@redhat.com> Date: Fri, 18 May 2012 12:46:00 -0000 Message-ID: Subject: Re: cgen, GNU gdb/sim, and full system simulation From: Peter Gavin To: "Frank Ch. Eigler" Cc: cgen@sourceware.org, sid@sourceware.org Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Mailing-List: contact sid-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: sid-owner@sourceware.org X-SW-Source: 2012-q2/txt/msg00003.txt.bz2 Hi Frank, thanks for the response. > On Fri, May 11, 2012 at 01:57:11PM +0200, Peter Gavin wrote: > Indeed. =C2=A0For full-system simulators, some projects have used the sid > framework instead of gdb/sim. Ok. But we're primarily doing this for GDB, and I suppose gdb can't use sid, is that right? > Actually, instruction fetching code can be hand-written in either > gdb-sim (see e.g. sim/m32r/mloop.in extract-*) or sid frameworks > (sid/component/cgen-cpu/m32r/m32rbf.cxx step_insns), and so that code > can map all it likes. Hmm, I'll look into this. > To me, the more interesting question would be the choice to model > virtual memory as a separate component between the CPU and the memory > and I/O buses (which would suite sid's modeling very well), vs > something purely internal to the CPU model. Yeah, I was hoping I could just define a memory in the .cpu file with define-hardware and have custom get and set methods, but it looks like that won't work :) -Pete