From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11854 invoked by alias); 23 Aug 2002 15:50:43 -0000 Mailing-List: contact sid-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: sid-owner@sources.redhat.com Received: (qmail 11843 invoked from network); 23 Aug 2002 15:50:42 -0000 Received: from unknown (HELO www.jennic.com) (213.143.5.74) by sources.redhat.com with SMTP; 23 Aug 2002 15:50:42 -0000 Received: from jensun01.jennic.com (jensun01.jennic.com [99.99.98.151]) by www.jennic.com (8.9.3/8.9.3) with ESMTP id QAA22656 for ; Fri, 23 Aug 2002 16:15:37 +0100 Received: from jenpc60 (jenpc60 [99.99.98.60]) by jensun01.jennic.com (8.9.3/8.9.3) with SMTP id QAA15368 for ; Fri, 23 Aug 2002 16:50:41 +0100 (BST) From: "Robert Cragie" To: Subject: FW: FW: Trying to run on pid7t board Date: Fri, 23 Aug 2002 08:50:00 -0000 Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Priority: 3 (Normal) X-MSMail-Priority: Normal X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2615.200 Importance: Normal X-SW-Source: 2002-q3/txt/msg00029.txt.bz2 Er, perhaps that wasn't quite right, as it would copy SPSR to CPSR unconditionally. This version also should address copying user registers back if pc is not in reglist. I am assuming that h-gr-usr contains the values swapped out when the mode changed, but I'm not quite sure how they are indexed. I realise there is no test for privileged op. yet - later. Am I on the right track? (define-pmacro (ldmia-psr-action bit-num) (sequence () (if (and reglist (sll 1 15)) (set (reg WI h-gr bit-num) (mem WI addr)) (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))) (set addr (add addr 4))) ) (define-pmacro (ldmia-psr-action-r15 ignored) (sequence () (set pc (mem WI addr)) (set addr (add addr 4)) (set (reg h-cpsr) (reg h-spsr))) ) (dnai ldmia-psr "Load multiple registers (postindex, increment, update PSR)" () "FIXME" (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1) (f-write-back? 0) (f-load? 1) rn reglist) (sequence ((WI addr)) (set addr rn) (multi-action 0 ldmia-action) (multi-action 1 ldmia-action) (multi-action 2 ldmia-action) (multi-action 3 ldmia-action) (multi-action 4 ldmia-action) (multi-action 5 ldmia-action) (multi-action 6 ldmia-action) (multi-action 7 ldmia-action) (multi-action 8 ldmia-psr-action) (multi-action 9 ldmia-psr-action) (multi-action 10 ldmia-psr-action) (multi-action 11 ldmia-psr-action) (multi-action 12 ldmia-psr-action) (multi-action 13 ldmia-psr-action) (multi-action 14 ldmia-psr-action) (multi-action 15 ldmia-psr-action-r15)) ) Robert Cragie, Design Engineer _______________________________________________________________ Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK http://www.jennic.com Tel: +44 (0) 114 281 2655 -----Original Message----- From: sid-owner@sources.redhat.com [mailto:sid-owner@sources.redhat.com]On Behalf Of Robert Cragie Sent: 23 August 2002 16:20 To: Ben Elliston Cc: sid@sources.redhat.com Subject: RE: FW: Trying to run on pid7t board I can't find the directory you are referring to. What I have done is this: In sid/src/cgen/cpu/arm7.cpu, I have added the following instruction: (dnai ldmia-psr "Load multiple registers (postindex, increment, update PSR)" () "FIXME" (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1) (f-write-back? 0) (f-load? 1) rn reglist) (sequence ((WI addr)) (set addr rn) (multi-action 0 ldmia-action) (multi-action 1 ldmia-action) (multi-action 2 ldmia-action) (multi-action 3 ldmia-action) (multi-action 4 ldmia-action) (multi-action 5 ldmia-action) (multi-action 6 ldmia-action) (multi-action 7 ldmia-action) (multi-action 8 ldmia-action) (multi-action 9 ldmia-action) (multi-action 10 ldmia-action) (multi-action 11 ldmia-action) (multi-action 12 ldmia-action) (multi-action 13 ldmia-action) (multi-action 14 ldmia-action) (multi-action 15 ldmia-action-r15) (set (reg h-cpsr) (reg h-spsr))) ) Will this work OK? I realise this is an incomplete implementation, and only addresses the failed instruction, but one step at a time, as I am not at all familiar with Scheme or CGEN. So how do I rebuild sid to get this change in? I tried 'make all' in the build directory originally created by src/configure and it didn't seem to do anything. Robert Cragie, Design Engineer _______________________________________________________________ Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK http://www.jennic.com Tel: +44 (0) 114 281 2655 > -----Original Message----- > From: Ben Elliston [mailto:bje@redhat.com] > Sent: 23 August 2002 13:52 > To: Robert Cragie > Cc: sid@sources.redhat.com > Subject: Re: FW: Trying to run on pid7t board > > > >>>>> "Robert" == Robert Cragie writes: > > Robert> 0x8250: X_INVALID > > Robert> ldmeqfd sp,{r0-r14,pc}^ > > Robert> I confess I know very little about this, but I notice in > Robert> CGEN, in arm7.cpu, only two ldmia's are supported (PUSWL = > Robert> 01001 and PUSWL = 01011). The opcode above (PUSWL: 01101) > Robert> (i.e. restore user mode banked registers) is not included, > Robert> so does this need to be in here too in some guise? Would > Robert> this be causing the invalid prefetch? > > Yes. It should not take too much work to add that missing instruction > variant and regenerate the cpu files from the CGEN description. "make > cgen-all" in the cgen-cpu/arm7t subdirectory ought to do it. > > Ben >