From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3496 invoked by alias); 26 Feb 2009 21:54:11 -0000 Received: (qmail 3487 invoked by uid 22791); 26 Feb 2009 21:54:10 -0000 X-SWARE-Spam-Status: No, hits=-1.5 required=5.0 tests=BAYES_05,J_CHICKENPOX_73,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS,SPF_PASS,UNPARSEABLE_RELAY X-Spam-Check-By: sourceware.org Received: from main.gmane.org (HELO ciao.gmane.org) (80.91.229.2) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 26 Feb 2009 21:54:03 +0000 Received: from list by ciao.gmane.org with local (Exim 4.43) id 1LcoB4-0006I4-A6 for sid@sources.redhat.com; Thu, 26 Feb 2009 21:53:59 +0000 Received: from px.frc.utn.edu.ar ([px.frc.utn.edu.ar]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Thu, 26 Feb 2009 21:53:58 +0000 Received: from dgaydou by px.frc.utn.edu.ar with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Thu, 26 Feb 2009 21:53:58 +0000 To: sid@sources.redhat.com From: David Gaydou Subject: msr instruction dont change cpsr bits Date: Thu, 26 Feb 2009 21:54:00 -0000 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit User-Agent: Loom/3.14 (http://gmane.org/) X-IsSubscribed: yes Mailing-List: contact sid-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: sid-owner@sourceware.org X-SW-Source: 2009-q1/txt/msg00013.txt.bz2 Hi, i've just discover this fantastic tool and i'm playing around with it to lern a bit. I've started with configrun-sid --cpu=arm --gdb=2004 -EL --save-temps --no-run control.elf where control.elf was built using arm-elf-gcc and tested with arm-elf-gdb target=sim. When i simulate on sid, gdb i r show that the instruction msr dont change the bits on cpsr register: . . . r11 0x0 0 r12 0x0 0 sp 0x0 0 lr 0x0 0 pc 0x60 96 fps 0x0 0 cpsr 0xd3 211 (gdb) s stacks_init () at head.s:78 78 msr CPSR_c, #FIQ_MODE|IRQ_DISABLE|FIQ_DISABLE (gdb) i r r0 0x40004000 1073758208 r1 0xaa 170 r2 0x55 85 r3 0x3 3 r4 0x0 0 r5 0x0 0 r6 0x0 0 r7 0x0 0 r8 0x0 0 r9 0x0 0 r10 0x0 0 r11 0x0 0 r12 0x0 0 sp 0x0 0 lr 0x0 0 pc 0x64 100 fps 0x0 0 cpsr 0xd3 211 (gdb) The value of cpsr after msr instruction should be 0xd1 (arm-elf-gdb, target=sim confirm this). Apart from this, the rest of the instructions seem to be excecuted correctly. Is there any solution for this problem, what im doing wrong? Thanks for your help!