From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 19084 invoked by alias); 28 Oct 2010 09:59:51 -0000 Received: (qmail 19066 invoked by uid 22791); 28 Oct 2010 09:59:50 -0000 X-SWARE-Spam-Status: No, hits=-5.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_HI,SPF_HELO_PASS,TW_VL,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 28 Oct 2010 09:59:42 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o9S9xf3P000378 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 28 Oct 2010 05:59:41 -0400 Received: from Gift.redhat.com (vpn1-7-124.ams2.redhat.com [10.36.7.124]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id o9S9xa2R031717; Thu, 28 Oct 2010 05:59:38 -0400 From: Nick Clifton To: cgen@sourceware.org Cc: sid@sourceware.org, dj@redhat.com Subject: RFA: XStormy16: Fix implementation of MOVF instruction Date: Thu, 28 Oct 2010 09:59:00 -0000 Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Mailing-List: contact sid-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: sid-owner@sourceware.org X-SW-Source: 2010-q4/txt/msg00001.txt.bz2 Hi Guys, The patch below fixes the emulation of the XStormy16's MOVF instruction. There were two problems - firstly when memory addresses were being aligned they were also being truncated to 16-bits. (The MOVF instruction allows access to a 32-bit address space). Secondly the pre-decrement and post-increment addressing modes were not propagating the carry into the base register. Tested by running lots of different xstormy16 programs under SID. OK to apply ? Cheers Nick Clifton cgen/ChangeLog 2010-10-28 Nick Clifton * cpu/xstormy16.cpu (alignfix-mem-far): New macro. Like alignfix-mem, but works with 32-bit addresses. (set-alignfix-mem-far): New macro. Like set-alignfix-mem but works with 32-bit addresses. (movfgrgri, movfgrgripostinc, movfgrgripredec, movfgrgrii, movfgrgriipostinc, movfgrgriipredec): Use alignfix-mem-far. (movfgrigr, movfgripostincgr, movfgripredecgr): Use set-alignfix-mem-far. (movfgrgriipostinc, movfgriipostincgr): Propagate addition to source register into base register. (movfgrgriipredec, movfgriipredecgr): Propagate subtraction from source register into base register. sid/component/cgen-cpu/xstormy16/ChangeLog 2010-10-28 Nick Clifton * xstormy16-sem.cxx: Regenerate. Index: cgen/cpu/xstormy16.cpu =================================================================== RCS file: /cvs/src/src/cgen/cpu/xstormy16.cpu,v retrieving revision 1.15 diff -u -3 -p -r1.15 xstormy16.cpu --- cgen/cpu/xstormy16.cpu 1 Jun 2010 22:06:50 -0000 1.15 +++ cgen/cpu/xstormy16.cpu 28 Oct 2010 09:44:15 -0000 @@ -524,6 +524,12 @@ (define-pmacro (set-alignfix-mem where what) (set (mem HI (and where #xFFFE)) what)) +(define-pmacro (alignfix-mem-far where) + (mem HI (and where #xFFFFFFFE))) + +(define-pmacro (set-alignfix-mem-far where what) + (set (mem HI (and where #xFFFFFFFE)) what)) + (dni movlmemimm "Move immediate to low memory" () @@ -824,7 +830,7 @@ ("movf$ws2 $Rdm,($Rs)") (+ OP1_7 OP2A_4 ws2 Rs OP4M_0 Rdm) (if ws2 - (set-psw Rdm (index-of Rdm) (alignfix-mem (or (sll SI R8 16) Rs)) ws2) + (set-psw Rdm (index-of Rdm) (alignfix-mem-far (or (sll SI R8 16) Rs)) ws2) (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (or (sll SI R8 16) Rs))) ws2)) () ) @@ -836,7 +842,7 @@ (+ OP1_6 OP2A_4 ws2 Rs OP4M_0 Rdm) (sequence () (if ws2 - (set-psw Rdm (index-of Rdm) (alignfix-mem (join SI HI R8 Rs)) ws2) + (set-psw Rdm (index-of Rdm) (alignfix-mem-far (join SI HI R8 Rs)) ws2) (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (join SI HI R8 Rs))) ws2)) (set Rs (add Rs (add ws2 1)))) () @@ -850,7 +856,7 @@ (sequence () (set Rs (sub Rs (add ws2 1))) (if ws2 - (set-psw Rdm (index-of Rdm) (alignfix-mem (join SI HI R8 Rs)) ws2) + (set-psw Rdm (index-of Rdm) (alignfix-mem-far (join SI HI R8 Rs)) ws2) (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (join SI HI R8 Rs))) ws2))) () ) @@ -862,7 +868,7 @@ (+ OP1_7 OP2A_6 ws2 Rs OP4M_0 Rdm) (sequence () (if ws2 - (set-alignfix-mem (join SI HI R8 Rs) Rdm) + (set-alignfix-mem-far (join SI HI R8 Rs) Rdm) (set (mem QI (join SI HI R8 Rs)) Rdm)) (set-psw-nowrite (index-of Rdm) Rdm ws2)) () @@ -875,7 +881,7 @@ (+ OP1_6 OP2A_6 ws2 Rs OP4M_0 Rdm) (sequence () (if ws2 - (set-alignfix-mem (join SI HI R8 Rs) Rdm) + (set-alignfix-mem-far (join SI HI R8 Rs) Rdm) (set (mem QI (join SI HI R8 Rs)) Rdm)) (set-psw-nowrite (index-of Rdm) Rdm ws2) (set Rs (add Rs (add ws2 1)))) @@ -891,7 +897,7 @@ (set-psw-nowrite (index-of Rdm) Rdm ws2) (set Rs (sub Rs (add ws2 1))) (if ws2 - (set-alignfix-mem (join SI HI R8 Rs) Rdm) + (set-alignfix-mem-far (join SI HI R8 Rs) Rdm) (set (mem QI (join SI HI R8 Rs)) Rdm))) () ) @@ -902,7 +908,7 @@ ("movf$ws2 $Rdm,($Rb,$Rs,$imm12)") (+ OP1_7 OP2A_4 ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12) (if ws2 - (set-psw Rdm (index-of Rdm) (alignfix-mem (add (join SI HI Rb Rs) imm12)) ws2) + (set-psw Rdm (index-of Rdm) (alignfix-mem-far (add (join SI HI Rb Rs) imm12)) ws2) (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add (join SI HI Rb Rs) imm12))) ws2)) () ) @@ -914,9 +920,13 @@ (+ OP1_6 OP2A_4 ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12) (sequence () (if ws2 - (set-psw Rdm (index-of Rdm) (alignfix-mem (add (join SI HI Rb Rs) imm12)) ws2) + (set-psw Rdm (index-of Rdm) (alignfix-mem-far (add (join SI HI Rb Rs) imm12)) ws2) (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add (join SI HI Rb Rs) imm12))) ws2)) - (set Rs (add Rs (add ws2 1)))) + (set Rs (add Rs (add ws2 1))) + ; Note - despite the XStormy16 ISA documentation the + ; addition *is* propogated into the base register. + (if (eq Rs 0) (set Rb (add Rb 1))) + ) () ) @@ -926,9 +936,12 @@ ("movf$ws2 $Rdm,($Rb,--$Rs,$imm12)") (+ OP1_6 OP2A_C ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12) (sequence () + ; Note - despite the XStormy16 ISA documentation the + ; subtraction *is* propogated into the base register. + (if (eq Rs 0) (set Rb (sub Rb 1))) (set Rs (sub Rs (add ws2 1))) (if ws2 - (set-psw Rdm (index-of Rdm) (alignfix-mem (add (join SI HI Rb Rs) imm12)) ws2) + (set-psw Rdm (index-of Rdm) (alignfix-mem-far (add (join SI HI Rb Rs) imm12)) ws2) (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add (join SI HI Rb Rs) imm12))) ws2))) () ) @@ -958,7 +971,11 @@ (set (mem HI (and (add (join SI HI Rb Rs) imm12) #xFFFFFFFE)) Rdm) (set (mem QI (add (join SI HI Rb Rs) imm12)) Rdm)) (set-psw-nowrite (index-of Rdm) Rdm ws2) - (set Rs (add Rs (add ws2 1)))) + (set Rs (add Rs (add ws2 1))) + ; Note - despite the XStormy16 ISA documentation the + ; addition *is* propogated into the base register. + (if (eq Rs 0) (set Rb (add Rb 1))) + ) () ) @@ -968,6 +985,9 @@ ("movf$ws2 ($Rb,--$Rs,$imm12),$Rdm") (+ OP1_6 OP2A_E ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12) (sequence () + ; Note - despite the XStormy16 ISA documentation the + ; subtraction *is* propogated into the base register. + (if (eq Rs 0) (set Rb (sub Rb 1))) (set Rs (sub Rs (add ws2 1))) (set-psw-nowrite (index-of Rdm) Rdm ws2) (if ws2