From mboxrd@z Thu Jan 1 00:00:00 1970 From: fche@redhat.com (Frank Ch. Eigler) To: "james chen" Cc: , sid@sources.redhat.com Subject: Re: [ECOS] Arm emulator Date: Fri, 07 Sep 2001 11:43:00 -0000 Message-id: References: <000701c12bb2$898125c0$c408aa0a@inc.inventec> X-SW-Source: 2001-q3/msg00056.html "james chen" writes on ecos-discuss: : [...] I find that it was ARM instructions emulating that takes many : PC CPU resource. In my PC( CE333) I only get 1 MIPS in emulating ARM : instructions [using an enhanced gdb/arm simulator], are there any : way to improve it. [...] A target:host instruction ratio of 1:100 is about typical for an instruction set simulator that uses ordinary fetch/decode/execute algorithms. Advanced interpretation techniques like cached decode structures, native host translation, can help a lot, but are pretty hard to create. The sid simulator uses an ARM kernel generated by the cgen tool (both on http://sources.redhat.com/ ), and it does have a small degree of this sort of thing, but I don't know how it performs in comparison to the old armulator snapshot (gdb's arm sim). sid has a feature that may assist simulation speed in an indirect way: state save/restore, which lets you theoretically rerun a program from a saved snapshot. That saves time in skipping e.g. initialization. Apart from these, and simple mechanical improvements (like compiling everything with maximum optimization), I can't think of a way of significantly improving speed. - FChE